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@@ -9,6 +9,10 @@
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#include <exception/irq.h>
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#include <driver/interrupt/apic/apic.h>
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+
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+#pragma GCC push_options
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+#pragma GCC optimize("O0")
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+
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spinlock_t xhci_controller_init_lock = {0};
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static int xhci_ctrl_count = 0;
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@@ -52,7 +56,6 @@ hardware_intr_controller xhci_hc_intr_controller =
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例子:不能在一个32bit的寄存器中的偏移量8的位置开始读取1个字节
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这种情况下,我们必须从32bit的寄存器的0地址处开始读取32bit,然后通过移位的方式得到其中的字节。
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*/
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-
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#define xhci_read_cap_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase + offset))
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#define xhci_get_ptr_cap_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase + offset))
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#define xhci_write_cap_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase + offset) = (uint8_t)value)
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@@ -112,15 +115,15 @@ hardware_intr_controller xhci_hc_intr_controller =
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* @brief 设置link TRB的命令(dword3)
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*
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*/
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-#define xhci_TRB_set_link_cmd(trb_vaddr) \
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- do \
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- { \
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+#define xhci_TRB_set_link_cmd(trb_vaddr) \
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+ do \
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+ { \
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struct xhci_TRB_normal_t *ptr = (struct xhci_TRB_normal_t *)(trb_vaddr); \
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- ptr->TRB_type = TRB_TYPE_LINK; \
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- ptr->ioc = 0; \
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- ptr->chain = 0; \
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- ptr->ent = 0; \
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- ptr->cycle = 1; \
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+ ptr->TRB_type = TRB_TYPE_LINK; \
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+ ptr->ioc = 0; \
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+ ptr->chain = 0; \
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+ ptr->ent = 0; \
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+ ptr->cycle = 1; \
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} while (0)
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@@ -195,11 +198,13 @@ static int xhci_hc_stop(int id)
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if (unlikely((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 1))
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return 0;
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-
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+ io_mfence();
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00000000);
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+ io_mfence();
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char timeout = 17;
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while ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
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{
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+ io_mfence();
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usleep(1000);
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if (--timeout == 0)
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return -ETIMEDOUT;
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@@ -218,9 +223,11 @@ static int xhci_hc_reset(int id)
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{
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int retval = 0;
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kdebug("usbsts=%#010lx", xhci_read_op_reg32(id, XHCI_OPS_USBSTS));
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+ io_mfence();
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if ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
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{
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+ io_mfence();
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kdebug("stopping usb hc...");
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retval = xhci_hc_stop(id);
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@@ -230,12 +237,16 @@ static int xhci_hc_reset(int id)
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int timeout = 500;
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uint32_t cmd = xhci_read_op_reg32(id, XHCI_OPS_USBCMD);
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+ io_mfence();
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kdebug("cmd=%#010lx", cmd);
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cmd |= (1 << 1);
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, cmd);
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+ io_mfence();
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kdebug("after rst, sts=%#010lx", xhci_read_op_reg32(id, XHCI_OPS_USBSTS));
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+ io_mfence();
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while (xhci_read_op_reg32(id, XHCI_OPS_USBCMD) & (1 << 1))
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{
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+ io_mfence();
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usleep(1000);
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if (--timeout == 0)
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return -ETIMEDOUT;
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@@ -259,14 +270,15 @@ static int xhci_hc_stop_legacy(int id)
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if (xhci_read_cap_reg8(id, current_offset) == XHCI_XECP_ID_LEGACY)
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{
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-
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+ io_mfence();
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xhci_write_cap_reg32(id, current_offset, xhci_read_cap_reg32(id, current_offset) | XHCI_XECP_LEGACY_OS_OWNED);
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-
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+ io_mfence();
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int timeout = XHCI_XECP_LEGACY_TIMEOUT;
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while ((xhci_read_cap_reg32(id, current_offset) & XHCI_XECP_LEGACY_OWNING_MASK) != XHCI_XECP_LEGACY_OS_OWNED)
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{
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+ io_mfence();
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usleep(1000);
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if (--timeout == 0)
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{
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@@ -277,9 +289,10 @@ static int xhci_hc_stop_legacy(int id)
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return 0;
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}
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-
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+ io_mfence();
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int next_off = ((xhci_read_cap_reg32(id, current_offset) & 0xff00) >> 8) << 2;
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+ io_mfence();
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current_offset = next_off ? (current_offset + next_off) : 0;
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} while (current_offset);
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@@ -296,7 +309,9 @@ static int xhci_hc_stop_legacy(int id)
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*/
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static int xhci_hc_start_sched(int id)
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{
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+ io_mfence();
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, (1 << 0) | (1 >> 2) | (1 << 3));
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+ io_mfence();
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usleep(100 * 1000);
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}
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@@ -308,7 +323,9 @@ static int xhci_hc_start_sched(int id)
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*/
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static int xhci_hc_stop_sched(int id)
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{
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+ io_mfence();
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xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00);
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+ io_mfence();
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}
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@@ -336,13 +353,14 @@ static uint32_t xhci_hc_get_protocol_offset(int id, uint32_t list_off, const int
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do
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{
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uint32_t dw0 = xhci_read_cap_reg32(id, list_off);
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+ io_mfence();
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uint32_t next_list_off = (dw0 >> 8) & 0xff;
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next_list_off = next_list_off ? (list_off + (next_list_off << 2)) : 0;
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if ((dw0 & 0xff) == XHCI_XECP_ID_PROTOCOL && ((dw0 & 0xff000000) >> 24) == version)
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{
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uint32_t dw2 = xhci_read_cap_reg32(id, list_off + 8);
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-
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+ io_mfence();
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if (offset != NULL)
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*offset = (uint32_t)(dw2 & 0xff) - 1;
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if (count != NULL)
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@@ -368,8 +386,9 @@ static int xhci_hc_pair_ports(int id)
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{
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struct xhci_caps_HCSPARAMS1_reg_t hcs1;
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+ io_mfence();
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memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
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-
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+ io_mfence();
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xhci_hc[id].port_num = hcs1.max_ports;
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@@ -385,15 +404,18 @@ static int xhci_hc_pair_ports(int id)
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while (next_off)
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{
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+ io_mfence();
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next_off = xhci_hc_get_protocol_offset(id, next_off, 2, &offset, &cnt, &protocol_flags);
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+ io_mfence();
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if (cnt)
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{
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for (int i = 0; i < cnt; ++i)
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{
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+ io_mfence();
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xhci_hc[id].ports[offset + i].offset = xhci_hc[id].port_num_u2++;
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xhci_hc[id].ports[offset + i].flags = XHCI_PROTOCOL_USB2;
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-
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+ io_mfence();
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if (protocol_flags & 2)
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xhci_hc[id].ports[offset + i].flags |= XHCI_PROTOCOL_HSO;
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@@ -405,12 +427,15 @@ static int xhci_hc_pair_ports(int id)
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next_off = xhci_hc[id].ext_caps_off;
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while (next_off)
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{
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+ io_mfence();
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next_off = xhci_hc_get_protocol_offset(id, next_off, 3, &offset, &cnt, &protocol_flags);
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+ io_mfence();
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if (cnt)
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{
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for (int i = 0; i < cnt; ++i)
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{
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+ io_mfence();
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xhci_hc[id].ports[offset + i].offset = xhci_hc[id].port_num_u3++;
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xhci_hc[id].ports[offset + i].flags = XHCI_PROTOCOL_USB3;
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}
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@@ -424,13 +449,13 @@ static int xhci_hc_pair_ports(int id)
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{
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if (unlikely(i == j))
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continue;
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-
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+ io_mfence();
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if ((xhci_hc[id].ports[i].offset == xhci_hc[id].ports[j].offset) &&
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((xhci_hc[id].ports[i].flags & XHCI_PROTOCOL_INFO) != (xhci_hc[id].ports[j].flags & XHCI_PROTOCOL_INFO)))
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{
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xhci_hc[id].ports[i].paired_port_num = j;
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xhci_hc[id].ports[i].flags |= XHCI_PROTOCOL_HAS_PAIR;
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-
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+ io_mfence();
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xhci_hc[id].ports[j].paired_port_num = i;
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xhci_hc[id].ports[j].flags |= XHCI_PROTOCOL_HAS_PAIR;
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}
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@@ -440,6 +465,7 @@ static int xhci_hc_pair_ports(int id)
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for (int i = 0; i < xhci_hc[id].port_num; ++i)
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{
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+ io_mfence();
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if (XHCI_PORT_IS_USB3(id, i) ||
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(XHCI_PORT_IS_USB2(id, i) && (!XHCI_PORT_HAS_PAIR(id, i))))
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xhci_hc[id].ports[i].flags |= XHCI_PROTOCOL_ACTIVE;
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@@ -481,11 +507,12 @@ static uint64_t xhci_create_ring(int trbs)
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{
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int total_size = trbs * sizeof(struct xhci_TRB_t);
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const uint64_t vaddr = (uint64_t)kmalloc(total_size, 0);
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+ io_mfence();
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memset((void *)vaddr, 0, total_size);
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-
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+ io_mfence();
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xhci_TRB_set_link_cmd(vaddr + total_size - sizeof(struct xhci_TRB_t));
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-
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+ io_mfence();
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return vaddr;
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}
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@@ -499,18 +526,19 @@ static uint64_t xhci_create_ring(int trbs)
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static uint64_t xhci_create_event_ring(int trbs, uint64_t *ret_ring_addr)
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{
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const uint64_t table_vaddr = (const uint64_t)kmalloc(64, 0);
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+ io_mfence();
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if (unlikely(table_vaddr == NULL))
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return -ENOMEM;
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memset((void *)table_vaddr, 0, 64);
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const uint64_t seg_vaddr = (const uint64_t)kmalloc(trbs * sizeof(struct xhci_TRB_t), 0);
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-
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+ io_mfence();
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if (unlikely(seg_vaddr == NULL))
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return -ENOMEM;
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memset((void *)seg_vaddr, 0, trbs * sizeof(struct xhci_TRB_t));
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-
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+ io_mfence();
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*(uint64_t *)(table_vaddr) = virt_2_phys(seg_vaddr);
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*(uint64_t *)(table_vaddr + 8) = trbs;
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@@ -522,13 +550,17 @@ static uint64_t xhci_create_event_ring(int trbs, uint64_t *ret_ring_addr)
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void xhci_hc_irq_enable(uint64_t irq_num)
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{
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int cid = xhci_find_hcid_by_irq_num(irq_num);
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+ io_mfence();
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if (WARN_ON(cid == -1))
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return;
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kdebug("start msi");
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+ io_mfence();
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pci_start_msi(xhci_hc[cid].pci_dev_hdr);
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kdebug("start sched");
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+ io_mfence();
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xhci_hc_start_sched(cid);
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kdebug("start ports");
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+ io_mfence();
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xhci_hc_start_ports(cid);
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kdebug("enabled");
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}
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@@ -536,29 +568,34 @@ void xhci_hc_irq_enable(uint64_t irq_num)
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void xhci_hc_irq_disable(uint64_t irq_num)
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{
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int cid = xhci_find_hcid_by_irq_num(irq_num);
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+ io_mfence();
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if (WARN_ON(cid == -1))
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return;
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xhci_hc_stop_sched(cid);
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+ io_mfence();
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pci_disable_msi(xhci_hc[cid].pci_dev_hdr);
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+ io_mfence();
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}
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uint64_t xhci_hc_irq_install(uint64_t irq_num, void *arg)
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{
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int cid = xhci_find_hcid_by_irq_num(irq_num);
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+ io_mfence();
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if (WARN_ON(cid == -1))
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return -EINVAL;
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struct xhci_hc_irq_install_info_t *info = (struct xhci_hc_irq_install_info_t *)arg;
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struct msi_desc_t msi_desc;
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memset(&msi_desc, 0, sizeof(struct msi_desc_t));
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-
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+ io_mfence();
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msi_desc.pci_dev = (struct pci_device_structure_header_t *)xhci_hc[cid].pci_dev_hdr;
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msi_desc.assert = info->assert;
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msi_desc.edge_trigger = info->edge_trigger;
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msi_desc.processor = info->processor;
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msi_desc.pci.msi_attribute.is_64 = 1;
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+ io_mfence();
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int retval = pci_enable_msi(&msi_desc);
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kdebug("pci retval = %d", retval);
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kdebug("xhci irq %d installed.", irq_num);
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@@ -569,9 +606,11 @@ void xhci_hc_irq_uninstall(uint64_t irq_num)
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{
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int cid = xhci_find_hcid_by_irq_num(irq_num);
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+ io_mfence();
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if (WARN_ON(cid == -1))
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return;
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xhci_hc_stop(cid);
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+ io_mfence();
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}
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* @brief xhci主机控制器的中断处理函数
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@@ -599,11 +638,14 @@ static int xhci_reset_port(const int id, const int port)
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uint64_t port_status_offset = XHCI_OPS_PRS + port * 16;
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+ io_mfence();
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if ((xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC) & (1 << 9)) == 0)
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{
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kdebug("port is power off, starting...");
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+ io_mfence();
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xhci_write_cap_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9));
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+ io_mfence();
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usleep(2000);
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if ((xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC) & (1 << 9)) == 0)
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@@ -613,10 +655,10 @@ static int xhci_reset_port(const int id, const int port)
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}
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}
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-
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+ io_mfence();
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xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | XHCI_PORTUSB_CHANGE_BITS);
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-
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+ io_mfence();
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if (XHCI_PORT_IS_USB3(id, port))
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xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | (1 << 31));
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@@ -629,7 +671,9 @@ static int xhci_reset_port(const int id, const int port)
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int timeout = 200;
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while (timeout)
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{
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+ io_mfence();
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uint32_t val = xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC);
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+ io_mfence();
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if (XHCI_PORT_IS_USB3(id, port) && (val & (1 << 31)) == 0)
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break;
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else if (XHCI_PORT_IS_USB2(id, port) && (val & (1 << 4)) == 0)
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@@ -647,12 +691,14 @@ static int xhci_reset_port(const int id, const int port)
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usleep(USB_TIME_RST_REC * 1000);
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uint32_t val = xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC);
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-
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+ io_mfence();
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if (val & (1 << 1))
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{
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+ io_mfence();
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xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | XHCI_PORTUSB_CHANGE_BITS);
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+ io_mfence();
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}
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retval = 0;
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}
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@@ -691,6 +737,7 @@ static int xhci_hc_start_ports(int id)
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{
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if (XHCI_PORT_IS_USB3(id, i) && XHCI_PORT_IS_ACTIVE(id, i))
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{
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+ io_mfence();
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if (likely(xhci_reset_port(id, i) == 0))
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@@ -731,14 +778,18 @@ static int xhci_hc_init_intr(int id)
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struct xhci_caps_HCSPARAMS1_reg_t hcs1;
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struct xhci_caps_HCSPARAMS2_reg_t hcs2;
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+ io_mfence();
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memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
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+ io_mfence();
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memcpy(&hcs2, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS2), sizeof(struct xhci_caps_HCSPARAMS2_reg_t));
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+ io_mfence();
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uint32_t max_segs = (1 << (uint32_t)(hcs2.ERST_Max));
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uint32_t max_interrupters = hcs1.max_intrs;
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retval = xhci_create_event_ring(4096, &xhci_hc[id].event_ring_vaddr);
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+ io_mfence();
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if (unlikely((int64_t)(retval) == -ENOMEM))
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return -ENOMEM;
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xhci_hc[id].event_ring_table_vaddr = retval;
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@@ -747,15 +798,21 @@ static int xhci_hc_init_intr(int id)
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xhci_hc[id].current_event_ring_cycle = 1;
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- xhci_write_intr_reg32(id, 0, XHCI_IR_MAN, 0x3);
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- xhci_write_intr_reg32(id, 0, XHCI_IR_MOD, 0);
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- xhci_write_intr_reg32(id, 0, XHCI_IR_TABLE_SIZE, 1);
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+ io_mfence();
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+ xhci_write_intr_reg32(id, 0, XHCI_IR_MAN, 0x3);
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+ io_mfence();
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+ xhci_write_intr_reg32(id, 0, XHCI_IR_MOD, 0);
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+ io_mfence();
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+ xhci_write_intr_reg32(id, 0, XHCI_IR_TABLE_SIZE, 1);
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+ io_mfence();
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xhci_write_intr_reg64(id, 0, XHCI_IR_DEQUEUE, virt_2_phys(xhci_hc[id].event_ring_vaddr) | (1 << 3));
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- xhci_write_intr_reg64(id, 0, XHCI_IR_TABLE_ADDR, virt_2_phys(xhci_hc[id].event_ring_table_vaddr));
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+ io_mfence();
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+ xhci_write_intr_reg64(id, 0, XHCI_IR_TABLE_ADDR, virt_2_phys(xhci_hc[id].event_ring_table_vaddr));
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+ io_mfence();
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xhci_write_op_reg32(id, XHCI_OPS_USBSTS, (1 << 10) | (1 << 4) | (1 << 3) | (1 << 2));
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-
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+ io_mfence();
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struct xhci_hc_irq_install_info_t install_info;
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@@ -766,7 +823,9 @@ static int xhci_hc_init_intr(int id)
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char *buf = (char *)kmalloc(16, 0);
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memset(buf, 0, 16);
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sprintk(buf, "xHCI HC%d", id);
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+ io_mfence();
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irq_register(xhci_controller_irq_num[id], &install_info, &xhci_hc_irq_handler, id, &xhci_hc_intr_controller, buf);
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+ io_mfence();
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kfree(buf);
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kdebug("xhci host controller %d: interrupt registered. irq num=%d", id, xhci_controller_irq_num[id]);
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@@ -790,7 +849,7 @@ void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
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spin_lock(&xhci_controller_init_lock);
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kinfo("Initializing xhci host controller: bus=%#02x, device=%#02x, func=%#02x, VendorID=%#04x, irq_line=%d, irq_pin=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, dev_hdr->header.Vendor_ID, dev_hdr->Interrupt_Line, dev_hdr->Interrupt_PIN);
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-
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+ io_mfence();
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int cid = xhci_hc_find_available_id();
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if (cid < 0)
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{
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@@ -801,13 +860,14 @@ void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
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memset(&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
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xhci_hc[cid].controller_id = cid;
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xhci_hc[cid].pci_dev_hdr = dev_hdr;
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+ io_mfence();
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pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0x4, 0x0006);
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-
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+ io_mfence();
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xhci_hc[cid].vbase = SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + XHCI_MAPPING_OFFSET + 65536 * xhci_hc[cid].controller_id;
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mm_map_phys_addr(xhci_hc[cid].vbase, dev_hdr->BAR0 & (~0xf), 65536, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD, true);
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-
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+ io_mfence();
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uint16_t iversion = *(uint16_t *)(xhci_hc[cid].vbase + XHCI_CAPS_HCIVERSION);
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@@ -824,9 +884,11 @@ void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
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xhci_hc[cid].vbase_op = xhci_hc[cid].vbase + xhci_read_cap_reg8(cid, XHCI_CAPS_CAPLENGTH);
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-
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- xhci_hc[cid].db_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_DBOFF) & (~0x3);
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+ io_mfence();
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+ xhci_hc[cid].db_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_DBOFF) & (~0x3);
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+ io_mfence();
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xhci_hc[cid].rts_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_RTSOFF) & (~0x1f);
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+ io_mfence();
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xhci_hc[cid].ext_caps_off = 1UL * (hcc1.xECP) * 4;
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xhci_hc[cid].context_size = (hcc1.csz) ? 64 : 32;
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@@ -845,25 +907,27 @@ void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
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pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd8, 0xffffffff);
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pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd0, 0xffffffff);
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}
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-
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+ io_mfence();
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FAIL_ON_TO(xhci_hc_stop_legacy(cid), failed);
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-
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+ io_mfence();
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FAIL_ON_TO(xhci_hc_reset(cid), failed);
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+ io_mfence();
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FAIL_ON_TO(xhci_hc_pair_ports(cid), failed);
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+ io_mfence();
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kdebug("ops pgsize=%#010lx", xhci_read_op_reg32(cid, XHCI_OPS_PAGESIZE));
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xhci_hc[cid].page_size = (xhci_read_op_reg32(cid, XHCI_OPS_PAGESIZE) & 0xffff) << 12;
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kdebug("page size=%d", xhci_hc[cid].page_size);
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-
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+ io_mfence();
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xhci_hc[cid].dcbaap_vaddr = (uint64_t)kmalloc(2048, 0);
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memset((void *)xhci_hc[cid].dcbaap_vaddr, 0, 2048);
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-
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+ io_mfence();
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kdebug("dcbaap_vaddr=%#018lx", xhci_hc[cid].dcbaap_vaddr);
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if (unlikely(!xhci_is_aligned64(xhci_hc[cid].dcbaap_vaddr)))
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{
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@@ -872,7 +936,7 @@ void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
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}
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xhci_write_op_reg64(cid, XHCI_OPS_DCBAAP, virt_2_phys(xhci_hc[cid].dcbaap_vaddr));
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-
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+ io_mfence();
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xhci_hc[cid].cmd_ring_vaddr = xhci_create_ring(XHCI_CMND_RING_TRBS);
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if (unlikely(!xhci_is_aligned64(xhci_hc[cid].cmd_ring_vaddr)))
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@@ -883,17 +947,21 @@ void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
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xhci_hc[cid].cmd_trb_cycle = XHCI_TRB_CYCLE_ON;
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-
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+ io_mfence();
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xhci_write_op_reg64(cid, XHCI_OPS_CRCR, virt_2_phys(xhci_hc[cid].cmd_ring_vaddr) | xhci_hc[cid].cmd_trb_cycle);
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uint32_t max_slots = hcs1.max_slots;
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kdebug("max slots = %d", max_slots);
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+ io_mfence();
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xhci_write_op_reg32(cid, XHCI_OPS_CONFIG, max_slots);
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+ io_mfence();
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xhci_write_op_reg32(cid, XHCI_OPS_DNCTRL, (1 << 1));
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+ io_mfence();
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FAIL_ON_TO(xhci_hc_init_intr(cid), failed_free_dyn);
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+ io_mfence();
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++xhci_ctrl_count;
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spin_unlock(&xhci_controller_init_lock);
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return;
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@@ -912,13 +980,15 @@ failed_free_dyn:;
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kfree((void *)xhci_hc[cid].event_ring_vaddr);
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failed:;
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+ io_mfence();
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mm_unmap(xhci_hc[cid].vbase, 65536);
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-
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+ io_mfence();
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memset((void *)&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
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failed_exceed_max:;
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kerror("Failed to initialize controller: bus=%d, dev=%d, func=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func);
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spin_unlock(&xhci_controller_init_lock);
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-}
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+}
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+#pragma GCC pop_options
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