apic.c 14 KB

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  1. #include "apic.h"
  2. #include "../../../common/kprint.h"
  3. #include "../../../common/printk.h"
  4. #include "../../../common/cpu.h"
  5. #include "../../../common/glib.h"
  6. #include "../../../exception/gate.h"
  7. #include "../../acpi/acpi.h"
  8. // 导出定义在irq.c中的中段门表
  9. extern void (*interrupt_table[24])(void);
  10. bool flag_support_apic = false;
  11. bool flag_support_x2apic = false;
  12. uint local_apic_version;
  13. uint local_apic_max_LVT_entries;
  14. static struct acpi_Multiple_APIC_Description_Table_t *madt;
  15. static struct acpi_IO_APIC_Structure_t *io_apic_ICS;
  16. /**
  17. * @brief 初始化io_apic
  18. *
  19. */
  20. void apic_io_apic_init()
  21. {
  22. ul madt_addr;
  23. kdebug("madt_addr = %#018lx", (ul)madt_addr);
  24. acpi_iter_SDT(acpi_get_MADT, &madt_addr);
  25. madt = (struct acpi_Multiple_APIC_Description_Table_t *)madt_addr;
  26. kdebug("MADT->local intr controller addr=%#018lx", madt->Local_Interrupt_Controller_Address);
  27. kdebug("MADT->length= %d bytes", madt->header.Length);
  28. // 寻找io apic的ICS
  29. void *ent = (void *)(madt_addr) + sizeof(struct acpi_Multiple_APIC_Description_Table_t);
  30. struct apic_Interrupt_Controller_Structure_header_t *header = (struct apic_Interrupt_Controller_Structure_header_t *)ent;
  31. while (header->length > 2)
  32. {
  33. header = (struct apic_Interrupt_Controller_Structure_header_t *)ent;
  34. if (header->type == 1)
  35. {
  36. struct acpi_IO_APIC_Structure_t *t = (struct acpi_IO_APIC_Structure_t *)ent;
  37. kdebug("IO apic addr = %#018lx", t->IO_APIC_Address);
  38. io_apic_ICS = t;
  39. break;
  40. }
  41. ent += header->length;
  42. }
  43. kdebug("Global_System_Interrupt_Base=%d", io_apic_ICS->Global_System_Interrupt_Base);
  44. apic_ioapic_map.addr_phys = io_apic_ICS->IO_APIC_Address;
  45. apic_ioapic_map.virtual_index_addr = (unsigned char *)APIC_IO_APIC_VIRT_BASE_ADDR;
  46. apic_ioapic_map.virtual_data_addr = (uint *)(APIC_IO_APIC_VIRT_BASE_ADDR + 0x10);
  47. apic_ioapic_map.virtual_EOI_addr = (uint *)(APIC_IO_APIC_VIRT_BASE_ADDR + 0x40);
  48. // 填写页表,完成地址映射
  49. mm_map_phys_addr((ul)apic_ioapic_map.virtual_index_addr, apic_ioapic_map.addr_phys, PAGE_2M_SIZE, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD);
  50. // 设置IO APIC ID 为0x0f000000
  51. *apic_ioapic_map.virtual_index_addr = 0x00;
  52. io_mfence();
  53. *apic_ioapic_map.virtual_data_addr = 0x0f000000;
  54. io_mfence();
  55. kdebug("I/O APIC ID:%#010x", ((*apic_ioapic_map.virtual_data_addr) >> 24) & 0xff);
  56. io_mfence();
  57. // 获取IO APIC Version
  58. *apic_ioapic_map.virtual_index_addr = 0x01;
  59. io_mfence();
  60. kdebug("IO APIC Version=%d, Max Redirection Entries=%d", *apic_ioapic_map.virtual_data_addr & 0xff, (((*apic_ioapic_map.virtual_data_addr) >> 16) & 0xff) + 1);
  61. // 初始化RTE表项,将所有RTE表项屏蔽
  62. for (int i = 0x10; i < 0x40; i += 2)
  63. {
  64. // 以0x20为起始中断向量号,初始化RTE
  65. apic_ioapic_write_rte(i, 0x10020 + ((i - 0x10) >> 1));
  66. }
  67. // 不需要手动启动IO APIC,只要初始化了RTE寄存器之后,io apic就会自动启用了。
  68. // 而且不是每台电脑都有RCBA寄存器,因此不需要手动启用IO APIC
  69. /*
  70. // get RCBA address
  71. io_out32(0xcf8, 0x8000f8f0);
  72. uint x = io_in32(0xcfc);
  73. uint *p;
  74. printk_color(RED, BLACK, "Get RCBA Address:%#010x\n", x);
  75. x = x & 0xffffc000UL;
  76. printk_color(RED, BLACK, "Get RCBA Address:%#010x\n", x);
  77. // get OIC address
  78. if (x > 0xfec00000 && x < 0xfee00000)
  79. {
  80. p = (unsigned int *)(x + 0x31feUL-apic_ioapic_map.addr_phys+apic_ioapic_map.virtual_index_addr);
  81. }
  82. // enable IOAPIC
  83. x = (*p & 0xffffff00) | 0x100;
  84. io_mfence();
  85. *p = x;
  86. io_mfence();
  87. */
  88. }
  89. /**
  90. * @brief 初始化local apic
  91. *
  92. */
  93. void apic_local_apic_init()
  94. {
  95. // 映射Local APIC 寄存器地址
  96. mm_map_phys_addr(APIC_LOCAL_APIC_VIRT_BASE_ADDR, 0xfee00000, PAGE_2M_SIZE, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD);
  97. uint a, b, c, d;
  98. cpu_cpuid(1, 0, &a, &b, &c, &d);
  99. kdebug("CPUID 0x01, eax:%#010lx, ebx:%#010lx, ecx:%#010lx, edx:%#010lx", a, b, c, d);
  100. // 判断是否支持APIC和xAPIC
  101. if ((1 << 9) & d)
  102. {
  103. flag_support_apic = true;
  104. kdebug("This computer support APIC&xAPIC");
  105. }
  106. else
  107. {
  108. flag_support_apic = false;
  109. kerror("This computer does not support APIC&xAPIC");
  110. while (1)
  111. ;
  112. }
  113. // 判断是否支持x2APIC
  114. if ((1 << 21) & c)
  115. {
  116. flag_support_x2apic = true;
  117. kdebug("This computer support x2APIC");
  118. }
  119. else
  120. {
  121. kerror("This computer does not support x2APIC");
  122. }
  123. uint eax, edx;
  124. // 启用xAPIC 和x2APIC
  125. __asm__ __volatile__("movq $0x1b, %%rcx \n\t" // 读取IA32_APIC_BASE寄存器
  126. "rdmsr \n\t"
  127. "bts $10, %%rax \n\t"
  128. "bts $11, %%rax \n\t"
  129. "wrmsr \n\t"
  130. "movq $0x1b, %%rcx \n\t"
  131. "rdmsr \n\t"
  132. : "=a"(eax), "=d"(edx)::"memory");
  133. kdebug("After enable xAPIC and x2APIC: edx=%#010x, eax=%#010x", edx, eax);
  134. // 检测是否成功启用xAPIC和x2APIC
  135. if (eax & 0xc00)
  136. kinfo("xAPIC & x2APIC enabled!");
  137. /*
  138. io_mfence();
  139. uint *svr = (uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_SVR);
  140. uint tmp_svr = *svr;
  141. tmp_svr &= (~(1 << 12));
  142. tmp_svr |= (1 << 8);
  143. kdebug("tmp_svr = %#018lx", tmp_svr);
  144. io_mfence();
  145. *svr = tmp_svr;
  146. io_mfence();
  147. kdebug("svr = %#018lx", *svr);
  148. */
  149. // 设置SVR寄存器,开启local APIC、禁止EOI广播
  150. __asm__ __volatile__("movq $0x80f, %%rcx \n\t"
  151. "rdmsr \n\t"
  152. "bts $8, %%rax \n\t"
  153. "bts $12, %%rax \n\t"
  154. "movq $0x80f, %%rcx \n\t"
  155. "wrmsr \n\t"
  156. "movq $0x80f , %%rcx \n\t"
  157. "rdmsr \n\t"
  158. : "=a"(eax), "=d"(edx)::"memory", "rcx");
  159. /*
  160. //enable SVR[8]
  161. __asm__ __volatile__( "movq $0x80f, %%rcx \n\t"
  162. "rdmsr \n\t"
  163. "bts $8, %%rax \n\t"
  164. "bts $12,%%rax\n\t"
  165. "wrmsr \n\t"
  166. "movq $0x80f, %%rcx \n\t"
  167. "rdmsr \n\t"
  168. :"=a"(eax),"=d"(edx)
  169. :
  170. :"memory");
  171. */
  172. kdebug("After setting SVR: edx=%#010x, eax=%#010x", edx, eax);
  173. if (eax & 0x100)
  174. kinfo("APIC Software Enabled.");
  175. if (eax & 0x1000)
  176. kinfo("EOI-Broadcast Suppression Enabled.");
  177. // 获取Local APIC的基础信息 (参见英特尔开发手册Vol3A 10-39)
  178. // Table 10-6. Local APIC Register Address Map Supported by x2APIC
  179. // 获取 Local APIC ID
  180. // 0x802处是x2APIC ID 位宽32bits 的 Local APIC ID register
  181. __asm__ __volatile__("movq $0x802, %%rcx \n\t"
  182. "rdmsr \n\t"
  183. : "=a"(eax), "=d"(edx)::"memory");
  184. kdebug("get Local APIC ID: edx=%#010x, eax=%#010x", edx, eax);
  185. kdebug("local_apic_id=%#018lx", *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_ID));
  186. // 获取Local APIC Version
  187. // 0x803处是 Local APIC Version register
  188. __asm__ __volatile__("movq $0x803, %%rcx \n\t"
  189. "rdmsr \n\t"
  190. : "=a"(eax), "=d"(edx)::"memory");
  191. local_apic_max_LVT_entries = ((eax >> 16) & 0xff) + 1;
  192. local_apic_version = eax & 0xff;
  193. kdebug("local APIC Version:%#010x,Max LVT Entry:%#010x,SVR(Suppress EOI Broadcast):%#04x\t", local_apic_version, local_apic_max_LVT_entries, (eax >> 24) & 0x1);
  194. if ((eax & 0xff) < 0x10)
  195. {
  196. kdebug("82489DX discrete APIC");
  197. }
  198. else if (((eax & 0xff) >= 0x10) && ((eax & 0xff) <= 0x15))
  199. kdebug("Integrated APIC.");
  200. // 由于尚未配置LVT对应的处理程序,因此先屏蔽所有的LVT
  201. // mask all LVT
  202. __asm__ __volatile__( //"movq $0x82f, %%rcx \n\t" //CMCI
  203. //"wrmsr \n\t"
  204. "movq $0x832, %%rcx \n\t" // Timer
  205. "wrmsr \n\t"
  206. "movq $0x833, %%rcx \n\t" // Thermal Monitor
  207. "wrmsr \n\t"
  208. "movq $0x834, %%rcx \n\t" // Performance Counter
  209. "wrmsr \n\t"
  210. "movq $0x835, %%rcx \n\t" // LINT0
  211. "wrmsr \n\t"
  212. "movq $0x836, %%rcx \n\t" // LINT1
  213. "wrmsr \n\t"
  214. "movq $0x837, %%rcx \n\t" // Error
  215. "wrmsr \n\t"
  216. :
  217. : "a"(0x10000), "d"(0x00)
  218. : "memory");
  219. /*
  220. io_mfence();
  221. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_CMCI) = 0x1000000;
  222. io_mfence();
  223. kdebug("cmci = %#018lx", *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_CMCI));
  224. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_TIMER) = 0x1000000;
  225. io_mfence();
  226. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_THERMAL) = 0x1000000;
  227. io_mfence();
  228. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_PERFORMANCE_MONITOR) = 0x1000000;
  229. io_mfence();
  230. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT0) = 0x1000000;
  231. io_mfence();
  232. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT1) = 0x1000000;
  233. io_mfence();
  234. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_ERROR) = 0x1000000;
  235. io_mfence();
  236. */
  237. kdebug("All LVT Masked");
  238. // 获取TPR寄存器的值
  239. __asm__ __volatile__("movq $0x808, %%rcx \n\t"
  240. "rdmsr \n\t"
  241. : "=a"(eax), "=d"(edx)::"memory");
  242. kdebug("LVT_TPR=%#010x", eax);
  243. // 获取PPR寄存器的值
  244. __asm__ __volatile__("movq $0x80a, %%rcx \n\t"
  245. "rdmsr \n\t"
  246. : "=a"(eax), "=d"(edx)::"memory");
  247. kdebug("LVT_PPR=%#010x", eax);
  248. }
  249. /**
  250. * @brief 初始化apic控制器
  251. *
  252. */
  253. void apic_init()
  254. {
  255. // 初始化中断门, 中断使用第二个ist
  256. for (int i = 32; i <= 55; ++i)
  257. set_intr_gate(i, 2, interrupt_table[i - 32]);
  258. // 屏蔽类8259A芯片
  259. io_out8(0x21, 0xff);
  260. io_out8(0xa1, 0xff);
  261. kdebug("8259A Masked.");
  262. // enable IMCR
  263. io_out8(0x22, 0x70);
  264. io_out8(0x23, 0x01);
  265. apic_local_apic_init();
  266. apic_io_apic_init();
  267. sti();
  268. }
  269. /**
  270. * @brief 中断服务程序
  271. *
  272. * @param rsp 中断栈指针
  273. * @param number 中断向量号
  274. */
  275. void do_IRQ(struct pt_regs *rsp, ul number)
  276. {
  277. unsigned char x = io_in8(0x60);
  278. irq_desc_t *irq = &interrupt_desc[number - 32];
  279. // 执行中断上半部处理程序
  280. if (irq->handler != NULL)
  281. irq->handler(number, irq->parameter, rsp);
  282. else
  283. kwarn("Intr vector [%d] does not have a handler!");
  284. // 向中断控制器发送应答消息
  285. if (irq->controller != NULL && irq->controller->ack != NULL)
  286. irq->controller->ack(number);
  287. else
  288. {
  289. // 向EOI寄存器写入0x00表示结束中断
  290. __asm__ __volatile__("movq $0x00, %%rdx \n\t"
  291. "movq $0x00, %%rax \n\t"
  292. "movq $0x80b, %%rcx \n\t"
  293. "wrmsr \n\t" ::
  294. : "memory");
  295. }
  296. }
  297. /**
  298. * @brief 读取RTE寄存器
  299. * 由于RTE位宽为64位而IO window寄存器只有32位,因此需要两次读取
  300. * @param index 索引值
  301. * @return ul
  302. */
  303. ul apic_ioapic_read_rte(unsigned char index)
  304. {
  305. // 由于处理器的乱序执行的问题,需要加入内存屏障以保证结果的正确性。
  306. ul ret;
  307. // 先读取高32bit
  308. *apic_ioapic_map.virtual_index_addr = index + 1;
  309. io_mfence();
  310. ret = *apic_ioapic_map.virtual_data_addr;
  311. ret <<= 32;
  312. io_mfence();
  313. // 读取低32bit
  314. *apic_ioapic_map.virtual_index_addr = index;
  315. io_mfence();
  316. ret |= *apic_ioapic_map.virtual_data_addr;
  317. io_mfence();
  318. return ret;
  319. }
  320. /**
  321. * @brief 写入RTE寄存器
  322. *
  323. * @param index 索引值
  324. * @param value 要写入的值
  325. */
  326. void apic_ioapic_write_rte(unsigned char index, ul value)
  327. {
  328. // 先写入低32bit
  329. *apic_ioapic_map.virtual_index_addr = index;
  330. io_mfence();
  331. *apic_ioapic_map.virtual_data_addr = value & 0xffffffff;
  332. io_mfence();
  333. // 再写入高32bit
  334. value >>= 32;
  335. io_mfence();
  336. *apic_ioapic_map.virtual_index_addr = index + 1;
  337. io_mfence();
  338. *apic_ioapic_map.virtual_data_addr = value & 0xffffffff;
  339. io_mfence();
  340. }
  341. // =========== 中断控制操作接口 ============
  342. void apic_ioapic_enable(ul irq_num)
  343. {
  344. ul index = 0x10 + ((irq_num - 32) << 1);
  345. ul value = apic_ioapic_read_rte(index);
  346. value &= (~0x10000UL);
  347. apic_ioapic_write_rte(index, value);
  348. }
  349. void apic_ioapic_disable(ul irq_num)
  350. {
  351. ul index = 0x10 + ((irq_num - 32) << 1);
  352. ul value = apic_ioapic_read_rte(index);
  353. value |= (0x10000UL);
  354. apic_ioapic_write_rte(index, value);
  355. }
  356. ul apic_ioapic_install(ul irq_num, void *arg)
  357. {
  358. struct apic_IO_APIC_RTE_entry *entry = (struct apic_IO_APIC_RTE_entry *)arg;
  359. // RTE表项值写入对应的RTE寄存器
  360. apic_ioapic_write_rte(0x10 + ((irq_num - 32) << 1), *(ul *)entry);
  361. return 0;
  362. }
  363. void apic_ioapic_uninstall(ul irq_num)
  364. {
  365. // 将对应的RTE表项设置为屏蔽状态
  366. apic_ioapic_write_rte(0x10 + ((irq_num - 32) << 1), 0x10000UL);
  367. }
  368. void apic_ioapic_level_ack(ul irq_num) // 电平触发
  369. {
  370. // 向EOI寄存器写入0x00表示结束中断
  371. /*io_mfence();
  372. uint *eoi = (uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_EOI);
  373. *eoi = 0x00;
  374. io_mfence(); */
  375. __asm__ __volatile__("movq $0x00, %%rdx \n\t"
  376. "movq $0x00, %%rax \n\t"
  377. "movq $0x80b, %%rcx \n\t"
  378. "wrmsr \n\t" ::
  379. : "memory");
  380. *apic_ioapic_map.virtual_EOI_addr = irq_num;
  381. }
  382. void apic_ioapic_edge_ack(ul irq_num) // 边沿触发
  383. {
  384. // 向EOI寄存器写入0x00表示结束中断
  385. /*
  386. uint *eoi = (uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_EOI);
  387. *eoi = 0x00;
  388. */
  389. __asm__ __volatile__("movq $0x00, %%rdx \n\t"
  390. "movq $0x00, %%rax \n\t"
  391. "movq $0x80b, %%rcx \n\t"
  392. "wrmsr \n\t" ::
  393. : "memory");
  394. }