pci.c 18 KB

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  1. #include "pci.h"
  2. #include <common/kprint.h>
  3. #include <mm/slab.h>
  4. #include <debug/bug.h>
  5. #include <common/errno.h>
  6. static uint count_device_list = 0;
  7. static void pci_checkBus(uint8_t bus);
  8. /**
  9. * @brief 将设备信息结构体加到链表里面
  10. *
  11. */
  12. #define ADD_DEVICE_STRUCT_TO_LIST(ret) \
  13. do \
  14. { \
  15. if (count_device_list > 0) \
  16. { \
  17. ++count_device_list; \
  18. list_add(pci_device_structure_list, &(ret->header.list)); \
  19. } \
  20. else \
  21. { \
  22. ++count_device_list; \
  23. list_init(&(ret->header.list)); \
  24. pci_device_structure_list = &(ret->header.list); \
  25. } \
  26. } while (0)
  27. /**
  28. * @brief 从pci配置空间读取信息
  29. *
  30. * @param bus 总线号
  31. * @param slot 设备号
  32. * @param func 功能号
  33. * @param offset 字节偏移量
  34. * @return uint 寄存器值
  35. */
  36. uint32_t pci_read_config(uchar bus, uchar slot, uchar func, uchar offset)
  37. {
  38. uint lbus = (uint)bus;
  39. uint lslot = (uint)slot;
  40. uint lfunc = ((uint)func) & 7;
  41. // 构造pci配置空间地址
  42. uint address = (uint)((lbus << 16) | (lslot << 11) | (lfunc << 8) | (offset & 0xfc) | ((uint)0x80000000));
  43. io_out32(PORT_PCI_CONFIG_ADDRESS, address);
  44. // 读取返回的数据
  45. uint32_t ret = (uint)(io_in32(PORT_PCI_CONFIG_DATA));
  46. return ret;
  47. }
  48. /**
  49. * @brief 向pci配置空间写入信息
  50. *
  51. * @param bus 总线号
  52. * @param slot 设备号
  53. * @param func 功能号
  54. * @param offset 字节偏移量
  55. * @return uint 返回码
  56. */
  57. uint pci_write_config(uchar bus, uchar slot, uchar func, uchar offset, uint32_t data)
  58. {
  59. uint lbus = (uint)bus;
  60. uint lslot = (uint)slot;
  61. uint lfunc = ((uint)func) & 7;
  62. // 构造pci配置空间地址
  63. uint address = (uint)((lbus << 16) | (lslot << 11) | (lfunc << 8) | (offset & 0xfc) | ((uint)0x80000000));
  64. io_out32(PORT_PCI_CONFIG_ADDRESS, address);
  65. // 写入数据
  66. io_out32(PORT_PCI_CONFIG_DATA, data);
  67. return 0;
  68. }
  69. /**
  70. * @brief 读取type为0x0的pci设备的header
  71. * 本函数只应被 pci_read_header()调用
  72. * @param header 返回的header
  73. * @param bus 总线号
  74. * @param slot 插槽号
  75. * @param func 功能号
  76. */
  77. static void pci_read_general_device_header(struct pci_device_structure_general_device_t *header, uchar bus, uchar slot, uchar func)
  78. {
  79. uint32_t tmp32;
  80. header->BAR0 = pci_read_config(bus, slot, func, 0x10);
  81. header->BAR1 = pci_read_config(bus, slot, func, 0x14);
  82. header->BAR2 = pci_read_config(bus, slot, func, 0x18);
  83. header->BAR3 = pci_read_config(bus, slot, func, 0x1c);
  84. header->BAR4 = pci_read_config(bus, slot, func, 0x20);
  85. header->BAR5 = pci_read_config(bus, slot, func, 0x24);
  86. header->Cardbus_CIS_Pointer = pci_read_config(bus, slot, func, 0x28);
  87. tmp32 = pci_read_config(bus, slot, func, 0x2c);
  88. header->Subsystem_Vendor_ID = tmp32 & 0xffff;
  89. header->Subsystem_ID = (tmp32 >> 16) & 0xffff;
  90. header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x30);
  91. tmp32 = pci_read_config(bus, slot, func, 0x34);
  92. header->Capabilities_Pointer = tmp32 & 0xff;
  93. header->reserved0 = (tmp32 >> 8) & 0xff;
  94. header->reserved1 = (tmp32 >> 16) & 0xffff;
  95. header->reserved2 = pci_read_config(bus, slot, func, 0x38);
  96. tmp32 = pci_read_config(bus, slot, func, 0x3c);
  97. header->Interrupt_Line = tmp32 & 0xff;
  98. header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
  99. header->Min_Grant = (tmp32 >> 16) & 0xff;
  100. header->Max_Latency = (tmp32 >> 24) & 0xff;
  101. }
  102. /**
  103. * @brief 读取type为0x1的pci_to_pci_bridge的header
  104. * 本函数只应被 pci_read_header()调用
  105. * @param header 返回的header
  106. * @param bus 总线号
  107. * @param slot 插槽号
  108. * @param func 功能号
  109. */
  110. static void pci_read_pci_to_pci_bridge_header(struct pci_device_structure_pci_to_pci_bridge_t *header, uchar bus, uchar slot, uchar func)
  111. {
  112. uint32_t tmp32;
  113. header->BAR0 = pci_read_config(bus, slot, func, 0x10);
  114. header->BAR1 = pci_read_config(bus, slot, func, 0x14);
  115. tmp32 = pci_read_config(bus, slot, func, 0x18);
  116. header->Primary_Bus_Number = tmp32 & 0xff;
  117. header->Secondary_Bus_Number = (tmp32 >> 8) & 0xff;
  118. header->Subordinate_Bus_Number = (tmp32 >> 16) & 0xff;
  119. header->Secondary_Latency_Timer = (tmp32 >> 24) & 0xff;
  120. tmp32 = pci_read_config(bus, slot, func, 0x1c);
  121. header->io_base = tmp32 & 0xff;
  122. header->io_limit = (tmp32 >> 8) & 0xff;
  123. header->Secondary_Status = (tmp32 >> 16) & 0xffff;
  124. tmp32 = pci_read_config(bus, slot, func, 0x20);
  125. header->Memory_Base = tmp32 & 0xffff;
  126. header->Memory_Limit = (tmp32 >> 16) & 0xffff;
  127. tmp32 = pci_read_config(bus, slot, func, 0x24);
  128. header->Prefetchable_Memory_Base = tmp32 & 0xffff;
  129. header->Prefetchable_Memory_Limit = (tmp32 >> 16) & 0xffff;
  130. header->Prefetchable_Base_Upper_32_Bits = pci_read_config(bus, slot, func, 0x28);
  131. header->Prefetchable_Limit_Upper_32_Bits = pci_read_config(bus, slot, func, 0x2c);
  132. tmp32 = pci_read_config(bus, slot, func, 0x30);
  133. header->io_Base_Upper_16_Bits = tmp32 & 0xffff;
  134. header->io_Limit_Upper_16_Bits = (tmp32 >> 16) & 0xffff;
  135. tmp32 = pci_read_config(bus, slot, func, 0x34);
  136. header->Capability_Pointer = tmp32 & 0xff;
  137. header->reserved0 = (tmp32 >> 8) & 0xff;
  138. header->reserved1 = (tmp32 >> 16) & 0xffff;
  139. header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x38);
  140. tmp32 = pci_read_config(bus, slot, func, 0x3c);
  141. header->Interrupt_Line = tmp32 & 0xff;
  142. header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
  143. header->Bridge_Control = (tmp32 >> 16) & 0xffff;
  144. }
  145. /**
  146. * @brief 读取type为0x2的pci_to_cardbus_bridge的header
  147. * 本函数只应被 pci_read_header()调用
  148. * @param header 返回的header
  149. * @param bus 总线号
  150. * @param slot 插槽号
  151. * @param func 功能号
  152. */
  153. static void pci_read_pci_to_cardbus_bridge_header(struct pci_device_structure_pci_to_cardbus_bridge_t *header, uchar bus, uchar slot, uchar func)
  154. {
  155. uint32_t tmp32;
  156. header->CardBus_Socket_ExCa_base_address = pci_read_config(bus, slot, func, 0x10);
  157. tmp32 = pci_read_config(bus, slot, func, 0x14);
  158. header->Offset_of_capabilities_list = tmp32 & 0xff;
  159. header->Reserved = (tmp32 >> 8) & 0xff;
  160. header->Secondary_status = (tmp32 >> 16) & 0xff;
  161. tmp32 = pci_read_config(bus, slot, func, 0x18);
  162. header->PCI_bus_number = tmp32 & 0xff;
  163. header->CardBus_bus_number = (tmp32 >> 8) & 0xff;
  164. header->Subordinate_bus_number = (tmp32 >> 16) & 0xff;
  165. header->CardBus_latency_timer = (tmp32 >> 24) & 0xff;
  166. header->Memory_Base_Address0 = pci_read_config(bus, slot, func, 0x1c);
  167. header->Memory_Limit0 = pci_read_config(bus, slot, func, 0x20);
  168. header->Memory_Base_Address1 = pci_read_config(bus, slot, func, 0x24);
  169. header->Memory_Limit1 = pci_read_config(bus, slot, func, 0x28);
  170. header->IO_Base_Address0 = pci_read_config(bus, slot, func, 0x2c);
  171. header->IO_Limit0 = pci_read_config(bus, slot, func, 0x30);
  172. header->IO_Base_Address1 = pci_read_config(bus, slot, func, 0x34);
  173. header->IO_Limit1 = pci_read_config(bus, slot, func, 0x38);
  174. tmp32 = pci_read_config(bus, slot, func, 0x3c);
  175. header->Interrupt_Line = tmp32 & 0xff;
  176. header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
  177. header->Bridge_Control = (tmp32 >> 16) & 0xffff;
  178. tmp32 = pci_read_config(bus, slot, func, 0x40);
  179. header->Subsystem_Device_ID = tmp32 & 0xffff;
  180. header->Subsystem_Vendor_ID = (tmp32 >> 16) & 0xffff;
  181. header->PC_Card_legacy_mode_base_address_16_bit = pci_read_config(bus, slot, func, 0x44);
  182. }
  183. /**
  184. * @brief 读取pci设备标头
  185. *
  186. * @param type 标头类型
  187. * @param bus 总线号
  188. * @param slot 插槽号
  189. * @param func 功能号
  190. * @param add_to_list 添加到链表
  191. * @return 返回的header
  192. */
  193. void *pci_read_header(int *type, uchar bus, uchar slot, uchar func, bool add_to_list)
  194. {
  195. struct pci_device_structure_header_t *common_header = (struct pci_device_structure_header_t *)kmalloc(127, 0);
  196. common_header->bus = bus;
  197. common_header->device = slot;
  198. common_header->func = func;
  199. uint32_t tmp32;
  200. // 先读取公共header
  201. tmp32 = pci_read_config(bus, slot, func, 0x0);
  202. common_header->Vendor_ID = tmp32 & 0xffff;
  203. common_header->Device_ID = (tmp32 >> 16) & 0xffff;
  204. tmp32 = pci_read_config(bus, slot, func, 0x4);
  205. common_header->Command = tmp32 & 0xffff;
  206. common_header->Status = (tmp32 >> 16) & 0xffff;
  207. tmp32 = pci_read_config(bus, slot, func, 0x8);
  208. common_header->RevisionID = tmp32 & 0xff;
  209. common_header->ProgIF = (tmp32 >> 8) & 0xff;
  210. common_header->SubClass = (tmp32 >> 16) & 0xff;
  211. common_header->Class_code = (tmp32 >> 24) & 0xff;
  212. tmp32 = pci_read_config(bus, slot, func, 0xc);
  213. common_header->CacheLineSize = tmp32 & 0xff;
  214. common_header->LatencyTimer = (tmp32 >> 8) & 0xff;
  215. common_header->HeaderType = (tmp32 >> 16) & 0xff;
  216. common_header->BIST = (tmp32 >> 24) & 0xff;
  217. void *ret;
  218. if (common_header->Vendor_ID == 0xffff)
  219. {
  220. *type = -ENXIO;
  221. kfree(common_header);
  222. return NULL;
  223. }
  224. // 根据公共头部,判断该结构所属的类型
  225. switch (common_header->HeaderType)
  226. {
  227. case 0x0: // general device
  228. ret = common_header;
  229. pci_read_general_device_header((struct pci_device_structure_general_device_t *)ret, bus, slot, func);
  230. if (add_to_list)
  231. ADD_DEVICE_STRUCT_TO_LIST(((struct pci_device_structure_general_device_t *)ret));
  232. *type = 0x0;
  233. return ret;
  234. break;
  235. case 0x1:
  236. ret = common_header;
  237. pci_read_pci_to_pci_bridge_header((struct pci_device_structure_pci_to_pci_bridge_t *)ret, bus, slot, func);
  238. if (add_to_list)
  239. ADD_DEVICE_STRUCT_TO_LIST(((struct pci_device_structure_pci_to_pci_bridge_t *)ret));
  240. *type = 0x1;
  241. return ret;
  242. break;
  243. case 0x2:
  244. ret = common_header;
  245. pci_read_pci_to_cardbus_bridge_header((struct pci_device_structure_pci_to_cardbus_bridge_t *)ret, bus, slot, func);
  246. if (add_to_list)
  247. ADD_DEVICE_STRUCT_TO_LIST(((struct pci_device_structure_pci_to_cardbus_bridge_t *)ret));
  248. *type = 0x2;
  249. return ret;
  250. break;
  251. default: // 错误的头类型 这里不应该被执行
  252. // kerror("PCI->pci_read_header(): Invalid header type.");
  253. *type = -EINVAL;
  254. // kerror("vendor id=%#010lx", common_header->Vendor_ID);
  255. // kerror("header type = %d", common_header->HeaderType);
  256. kfree(common_header);
  257. return NULL;
  258. break;
  259. }
  260. }
  261. static void pci_checkFunction(uint8_t bus, uint8_t device, uint8_t function)
  262. {
  263. int header_type;
  264. struct pci_device_structure_header_t *header = pci_read_header(&header_type, bus, device, function, true);
  265. if (header_type == -EINVAL)
  266. {
  267. // kerror("pci_checkFunction(): wrong header type!");
  268. // 此处内存已经在read header函数里面释放,不用重复释放
  269. return;
  270. }
  271. // header = ((struct pci_device_structure_general_device_t *)raw_header)->header;
  272. if ((header->Class_code == 0x6) && (header->SubClass == 0x4))
  273. {
  274. uint8_t SecondaryBus = ((struct pci_device_structure_pci_to_pci_bridge_t *)header)->Secondary_Bus_Number;
  275. pci_checkBus(SecondaryBus);
  276. }
  277. }
  278. static int pci_checkDevice(uint8_t bus, uint8_t device)
  279. {
  280. int header_type;
  281. struct pci_device_structure_header_t *header = pci_read_header(&header_type, bus, device, 0, false);
  282. if (header_type == -EINVAL)
  283. {
  284. // 此处内存已经在read header函数里面释放,不用重复释放
  285. return -EINVAL;
  286. }
  287. if (header_type == -ENXIO)
  288. {
  289. // kerror("DEVICE INVALID");
  290. return -ENXIO;
  291. }
  292. uint16_t vendorID = header->Vendor_ID;
  293. if (vendorID == 0xffff) // 设备不存在
  294. {
  295. kfree(header);
  296. return -ENXIO;
  297. }
  298. pci_checkFunction(bus, device, 0);
  299. header_type = header->HeaderType;
  300. if ((header_type & 0x80) != 0)
  301. {
  302. kdebug("Multi func device");
  303. // 这是一个多function的设备,因此查询剩余的function
  304. for (uint8_t func = 1; func < 8; ++func)
  305. {
  306. struct pci_device_structure_header_t *tmp_header;
  307. tmp_header = (struct pci_device_structure_header_t *)pci_read_header(&header_type, bus, device, func, false);
  308. if (tmp_header->Vendor_ID != 0xffff)
  309. pci_checkFunction(bus, device, func);
  310. // 释放内存
  311. kfree(tmp_header);
  312. }
  313. }
  314. kfree(header);
  315. return 0;
  316. }
  317. static void pci_checkBus(uint8_t bus)
  318. {
  319. for (uint8_t device = 0; device < 32; ++device)
  320. {
  321. pci_checkDevice(bus, device);
  322. }
  323. }
  324. /**
  325. * @brief 扫描所有pci总线上的所有设备
  326. *
  327. */
  328. void pci_checkAllBuses()
  329. {
  330. kinfo("Checking all devices in PCI bus...");
  331. int header_type;
  332. struct pci_device_structure_header_t *header = pci_read_header(&header_type, 0, 0, 0, false);
  333. if (header_type == EINVAL)
  334. {
  335. kBUG("pci_checkAllBuses(): wrong header type!");
  336. // 此处内存已经在read header函数里面释放,不用重复释放
  337. return;
  338. }
  339. header_type = header->HeaderType;
  340. if ((header_type & 0x80) == 0) // Single pci host controller
  341. {
  342. pci_checkBus(0);
  343. }
  344. else
  345. {
  346. // Multiple PCI host controller
  347. // 那么总线0,设备0,功能1则是总线1的pci主机控制器,以此类推
  348. struct pci_device_structure_header_t *tmp_header;
  349. for (uint8_t func = 0; func < 8; ++func)
  350. {
  351. tmp_header = (struct pci_device_structure_header_t *)pci_read_header(&header_type, 0, 0, func, false);
  352. if (WARN_ON(header->Vendor_ID != 0xffff)) // @todo 这里的判断条件可能有点问题
  353. {
  354. kfree(tmp_header);
  355. break;
  356. }
  357. pci_checkBus(func);
  358. kfree(tmp_header);
  359. }
  360. }
  361. kfree(header);
  362. }
  363. void pci_init()
  364. {
  365. kinfo("Initializing PCI bus...");
  366. pci_checkAllBuses();
  367. kinfo("Total pci device and function num = %d", count_device_list);
  368. struct pci_device_structure_header_t *ptr = container_of(pci_device_structure_list, struct pci_device_structure_header_t, list);
  369. for (int i = 0; i < count_device_list; ++i)
  370. {
  371. if (ptr->HeaderType == 0x0)
  372. {
  373. if (ptr->Status & 0x10)
  374. {
  375. kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\tcap_pointer=%#010lx\tbar5=%#010lx", i, ptr->Class_code, ptr->SubClass, ptr->Status, ((struct pci_device_structure_general_device_t *)ptr)->Capabilities_Pointer, ((struct pci_device_structure_general_device_t *)ptr)->BAR5);
  376. uint32_t tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, ((struct pci_device_structure_general_device_t *)ptr)->Capabilities_Pointer);
  377. }
  378. else
  379. {
  380. kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\t", i, ptr->Class_code, ptr->SubClass, ptr->Status);
  381. }
  382. }
  383. else if (ptr->HeaderType == 0x1)
  384. {
  385. if (ptr->Status & 0x10)
  386. {
  387. kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\tcap_pointer=%#010lx", i, ptr->Class_code, ptr->SubClass, ptr->Status, ((struct pci_device_structure_pci_to_pci_bridge_t *)ptr)->Capability_Pointer);
  388. }
  389. else
  390. {
  391. kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\t", i, ptr->Class_code, ptr->SubClass, ptr->Status);
  392. }
  393. }
  394. else if (ptr->HeaderType == 0x2)
  395. {
  396. kinfo("[ pci device %d ] class code = %d\tsubclass=%d\tstatus=%#010lx\t", i, ptr->Class_code, ptr->SubClass, ptr->Status);
  397. }
  398. ptr = container_of(list_next(&(ptr->list)), struct pci_device_structure_header_t, list);
  399. }
  400. kinfo("PCI bus initialized.")
  401. }
  402. /**
  403. * @brief 获取 device structure
  404. *
  405. * @param class_code
  406. * @param sub_class
  407. * @param res 返回的结果数组
  408. */
  409. void pci_get_device_structure(uint8_t class_code, uint8_t sub_class, struct pci_device_structure_header_t *res[], uint32_t *count_res)
  410. {
  411. struct pci_device_structure_header_t *ptr = container_of(pci_device_structure_list, struct pci_device_structure_header_t, list);
  412. *count_res = 0;
  413. for (int i = 0; i < count_device_list; ++i)
  414. {
  415. if ((ptr->Class_code == class_code) && (ptr->SubClass == sub_class))
  416. {
  417. kdebug("[%d] class_code=%d, sub_class=%d, progIF=%d, bar5=%#010lx", i, ptr->Class_code, ptr->SubClass, ptr->ProgIF, ((struct pci_device_structure_general_device_t *)ptr)->BAR5);
  418. res[*count_res] = ptr;
  419. ++(*count_res);
  420. }
  421. ptr = container_of(list_next(&(ptr->list)), struct pci_device_structure_header_t, list);
  422. }
  423. }
  424. /**
  425. * @brief 寻找符合指定类型的capability list
  426. *
  427. * @param pci_dev pci设备header
  428. * @param cap_type c要寻找的capability类型
  429. * @return uint64_t cap list的偏移量
  430. */
  431. uint32_t pci_enumerate_capability_list(struct pci_device_structure_header_t *pci_dev, int cap_type)
  432. {
  433. uint32_t cap_offset;
  434. switch (pci_dev->HeaderType)
  435. {
  436. case 0x00:
  437. cap_offset = ((struct pci_device_structure_general_device_t *)pci_dev)->Capabilities_Pointer;
  438. break;
  439. case 0x10:
  440. cap_offset = ((struct pci_device_structure_pci_to_pci_bridge_t *)pci_dev)->Capability_Pointer;
  441. break;
  442. default:
  443. // 不支持
  444. return -ENOSYS;
  445. }
  446. uint32_t tmp;
  447. while (1)
  448. {
  449. tmp = pci_read_config(pci_dev->bus, pci_dev->device, pci_dev->func, cap_offset);
  450. if (tmp & 0xff != cap_type)
  451. {
  452. if ((tmp & 0xff00) >> 8)
  453. {
  454. cap_offset = (tmp & 0xff00);
  455. continue;
  456. }
  457. else
  458. return -ENOSYS;
  459. }
  460. return cap_offset;
  461. }
  462. }