xhci.c 33 KB

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  1. #include "xhci.h"
  2. #include <common/kprint.h>
  3. #include <debug/bug.h>
  4. #include <process/spinlock.h>
  5. #include <mm/mm.h>
  6. #include <mm/slab.h>
  7. #include <debug/traceback/traceback.h>
  8. #include <common/time.h>
  9. #include <exception/irq.h>
  10. #include <driver/interrupt/apic/apic.h>
  11. spinlock_t xhci_controller_init_lock; // xhci控制器初始化锁(在usb_init中被初始化)
  12. static int xhci_ctrl_count = 0; // xhci控制器计数
  13. static struct xhci_host_controller_t xhci_hc[XHCI_MAX_HOST_CONTROLLERS] = {0};
  14. void xhci_hc_irq_enable(uint64_t irq_num);
  15. void xhci_hc_irq_disable(uint64_t irq_num);
  16. uint64_t xhci_hc_irq_install(uint64_t irq_num, void *arg);
  17. void xhci_hc_irq_uninstall(uint64_t irq_num);
  18. static int xhci_hc_find_available_id();
  19. static int xhci_hc_stop(int id);
  20. static int xhci_hc_reset(int id);
  21. static int xhci_hc_stop_legacy(int id);
  22. static int xhci_hc_start_sched(int id);
  23. static int xhci_hc_stop_sched(int id);
  24. static uint32_t xhci_hc_get_protocol_offset(int id, uint32_t list_off, const int version, uint32_t *offset, uint32_t *count, uint16_t *protocol_flag);
  25. static int xhci_hc_pair_ports(int id);
  26. static uint64_t xhci_create_ring(int trbs);
  27. static uint64_t xhci_create_event_ring(int trbs, uint64_t *ret_ring_addr);
  28. void xhci_hc_irq_handler(uint64_t irq_num, uint64_t cid, struct pt_regs *regs);
  29. static int xhci_hc_init_intr(int id);
  30. static int xhci_hc_start_ports(int id);
  31. hardware_intr_controller xhci_hc_intr_controller =
  32. {
  33. .enable = xhci_hc_irq_enable,
  34. .disable = xhci_hc_irq_disable,
  35. .install = xhci_hc_irq_install,
  36. .uninstall = xhci_hc_irq_uninstall,
  37. .ack = apic_local_apic_edge_ack,
  38. };
  39. /*
  40. 注意!!!
  41. 尽管采用MMI/O的方式访问寄存器,但是对于指定大小的寄存器,
  42. 在发起读请求的时候,只能从寄存器的起始地址位置开始读取。
  43. 例子:不能在一个32bit的寄存器中的偏移量8的位置开始读取1个字节
  44. 这种情况下,我们必须从32bit的寄存器的0地址处开始读取32bit,然后通过移位的方式得到其中的字节。
  45. */
  46. #define xhci_read_cap_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase + offset))
  47. #define xhci_get_ptr_cap_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase + offset))
  48. #define xhci_write_cap_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase + offset) = (uint8_t)value)
  49. #define xhci_read_cap_reg32(id, offset) (*(uint32_t *)(xhci_hc[id].vbase + offset))
  50. #define xhci_get_ptr_cap_reg32(id, offset) ((uint32_t *)(xhci_hc[id].vbase + offset))
  51. #define xhci_write_cap_reg32(id, offset, value) (*(uint32_t *)(xhci_hc[id].vbase + offset) = (uint32_t)value)
  52. #define xhci_read_cap_reg64(id, offset) (*(uint64_t *)(xhci_hc[id].vbase + offset))
  53. #define xhci_get_ptr_reg64(id, offset) ((uint64_t *)(xhci_hc[id].vbase + offset))
  54. #define xhci_write_cap_reg64(id, offset, value) (*(uint64_t *)(xhci_hc[id].vbase + offset) = (uint64_t)value)
  55. #define xhci_read_op_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase_op + offset))
  56. #define xhci_get_ptr_op_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase_op + offset))
  57. #define xhci_write_op_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase_op + offset) = (uint8_t)value)
  58. #define xhci_read_op_reg32(id, offset) (*(uint32_t *)(xhci_hc[id].vbase_op + offset))
  59. #define xhci_get_ptr_op_reg32(id, offset) ((uint32_t *)(xhci_hc[id].vbase_op + offset))
  60. #define xhci_write_op_reg32(id, offset, value) (*(uint32_t *)(xhci_hc[id].vbase_op + offset) = (uint32_t)value)
  61. #define xhci_read_op_reg64(id, offset) (*(uint64_t *)(xhci_hc[id].vbase_op + offset))
  62. #define xhci_get_ptr_op_reg64(id, offset) ((uint64_t *)(xhci_hc[id].vbase_op + offset))
  63. #define xhci_write_op_reg64(id, offset, value) (*(uint64_t *)(xhci_hc[id].vbase_op + offset) = (uint64_t)value)
  64. /**
  65. * @brief 计算中断寄存器组虚拟地址
  66. * @param id 主机控制器id
  67. * @param num xhci中断寄存器组号
  68. */
  69. #define xhci_calc_intr_vaddr(id, num) (xhci_hc[id].vbase + xhci_hc[id].rts_offset + XHCI_RT_IR0 + num * XHCI_IR_SIZE)
  70. /**
  71. * @brief 读取/写入中断寄存器
  72. * @param id 主机控制器id
  73. * @param num xhci中断寄存器组号
  74. * @param intr_offset 寄存器在当前寄存器组中的偏移量
  75. */
  76. #define xhci_read_intr_reg32(id, num, intr_offset) (*(uint32_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset))
  77. #define xhci_write_intr_reg32(id, num, intr_offset, value) (*(uint32_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset) = value)
  78. #define xhci_read_intr_reg64(id, num, intr_offset) (*(uint64_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset))
  79. #define xhci_write_intr_reg64(id, num, intr_offset, value) (*(uint64_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset) = value)
  80. #define xhci_is_aligned64(addr) ((addr & 0x3f) == 0) // 是否64bytes对齐
  81. /**
  82. * @brief 判断端口信息
  83. * @param cid 主机控制器id
  84. * @param pid 端口id
  85. */
  86. #define XHCI_PORT_IS_USB2(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_INFO) == XHCI_PROTOCOL_USB2)
  87. #define XHCI_PORT_IS_USB3(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_INFO) == XHCI_PROTOCOL_USB3)
  88. #define XHCI_PORT_IS_USB2_HSO(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_HSO) == XHCI_PROTOCOL_HSO)
  89. #define XHCI_PORT_HAS_PAIR(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_HAS_PAIR) == XHCI_PROTOCOL_HAS_PAIR)
  90. #define XHCI_PORT_IS_ACTIVE(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_ACTIVE) == XHCI_PROTOCOL_ACTIVE)
  91. /**
  92. * @brief 设置link TRB的命令(dword3)
  93. *
  94. */
  95. #define xhci_TRB_set_link_cmd(trb_vaddr) \
  96. do \
  97. { \
  98. struct xhci_TRB_normal_t *ptr = (struct xhci_TRB_normal_t *)trb_vaddr; \
  99. ptr->TRB_type = TRB_TYPE_LINK; \
  100. ptr->ioc = 0; \
  101. ptr->chain = 0; \
  102. ptr->ent = 0; \
  103. ptr->cycle = 1; \
  104. } while (0)
  105. #define FAIL_ON(value, to) \
  106. do \
  107. { \
  108. if (unlikely(value != 0)) \
  109. goto to; \
  110. } while (0)
  111. // Common TRB types
  112. enum
  113. {
  114. TRB_TYPE_NORMAL = 1,
  115. TRB_TYPE_SETUP_STAGE,
  116. TRB_TYPE_DATA_STAGE,
  117. TRB_TYPE_STATUS_STAGE,
  118. TRB_TYPE_ISOCH,
  119. TRB_TYPE_LINK,
  120. TRB_TYPE_EVENT_DATA,
  121. TRB_TYPE_NO_OP,
  122. TRB_TYPE_ENABLE_SLOT,
  123. TRB_TYPE_DISABLE_SLOT = 10,
  124. TRB_TYPE_ADDRESS_DEVICE = 11,
  125. TRB_TYPE_CONFIG_EP,
  126. TRB_TYPE_EVALUATE_CONTEXT,
  127. TRB_TYPE_RESET_EP,
  128. TRB_TYPE_STOP_EP = 15,
  129. TRB_TYPE_SET_TR_DEQUEUE,
  130. TRB_TYPE_RESET_DEVICE,
  131. TRB_TYPE_FORCE_EVENT,
  132. TRB_TYPE_DEG_BANDWIDTH,
  133. TRB_TYPE_SET_LAT_TOLERANCE = 20,
  134. TRB_TYPE_GET_PORT_BAND = 21,
  135. TRB_TYPE_FORCE_HEADER,
  136. TRB_TYPE_NO_OP_CMD, // 24 - 31 = reserved
  137. TRB_TYPE_TRANS_EVENT = 32,
  138. TRB_TYPE_COMMAND_COMPLETION,
  139. TRB_TYPE_PORT_STATUS_CHANGE,
  140. TRB_TYPE_BANDWIDTH_REQUEST,
  141. TRB_TYPE_DOORBELL_EVENT,
  142. TRB_TYPE_HOST_CONTROLLER_EVENT = 37,
  143. TRB_TYPE_DEVICE_NOTIFICATION,
  144. TRB_TYPE_MFINDEX_WRAP,
  145. // 40 - 47 = reserved
  146. // 48 - 63 = Vendor Defined
  147. };
  148. /**
  149. * @brief 在controller数组之中寻找可用插槽
  150. *
  151. * 注意:该函数只能被获得init锁的进程所调用
  152. * @return int 可用id(无空位时返回-1)
  153. */
  154. static int xhci_hc_find_available_id()
  155. {
  156. if (unlikely(xhci_ctrl_count >= XHCI_MAX_HOST_CONTROLLERS))
  157. return -1;
  158. for (int i = 0; i < XHCI_MAX_HOST_CONTROLLERS; ++i)
  159. {
  160. if (xhci_hc[i].pci_dev_hdr == NULL)
  161. return i;
  162. }
  163. return -1;
  164. }
  165. /**
  166. * @brief 停止xhci主机控制器
  167. *
  168. * @param id 主机控制器id
  169. * @return int
  170. */
  171. static int xhci_hc_stop(int id)
  172. {
  173. // 判断是否已经停止
  174. if (unlikely((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 1))
  175. return 0;
  176. xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00000000);
  177. char timeout = 17;
  178. while ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
  179. {
  180. usleep(1000);
  181. if (--timeout == 0)
  182. return -ETIMEDOUT;
  183. }
  184. return 0;
  185. }
  186. /**
  187. * @brief reset xHCI主机控制器
  188. *
  189. * @param id 主机控制器id
  190. * @return int
  191. */
  192. static int xhci_hc_reset(int id)
  193. {
  194. int retval = 0;
  195. kdebug("usbsts=%#010lx", xhci_read_op_reg32(id, XHCI_OPS_USBSTS));
  196. // 判断HCHalted是否置位
  197. if ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
  198. {
  199. kdebug("stopping usb hc...");
  200. // 未置位,需要先尝试停止usb主机控制器
  201. retval = xhci_hc_stop(id);
  202. if (unlikely(retval))
  203. return retval;
  204. }
  205. int timeout = 500; // wait 500ms
  206. // reset
  207. uint32_t cmd = xhci_read_op_reg32(id, XHCI_OPS_USBCMD);
  208. kdebug("cmd=%#010lx", cmd);
  209. cmd |= (1 << 1);
  210. xhci_write_op_reg32(id, XHCI_OPS_USBCMD, cmd);
  211. kdebug("after rst, sts=%#010lx", xhci_read_op_reg32(id, XHCI_OPS_USBSTS));
  212. while (xhci_read_op_reg32(id, XHCI_OPS_USBCMD) & (1 << 1))
  213. {
  214. usleep(1000);
  215. if (--timeout == 0)
  216. return -ETIMEDOUT;
  217. }
  218. // kdebug("reset done!, timeout=%d", timeout);
  219. return retval;
  220. }
  221. /**
  222. * @brief 停止指定xhci控制器的legacy support
  223. *
  224. * @param id 控制器id
  225. * @return int
  226. */
  227. static int xhci_hc_stop_legacy(int id)
  228. {
  229. uint64_t current_offset = xhci_hc[id].ext_caps_off;
  230. do
  231. {
  232. // 判断当前entry是否为legacy support entry
  233. if (xhci_read_cap_reg8(id, current_offset) == XHCI_XECP_ID_LEGACY)
  234. {
  235. // 接管控制权
  236. xhci_write_cap_reg32(id, current_offset, xhci_read_cap_reg32(id, current_offset) | XHCI_XECP_LEGACY_OS_OWNED);
  237. // 等待响应完成
  238. int timeout = XHCI_XECP_LEGACY_TIMEOUT;
  239. while ((xhci_read_cap_reg32(id, current_offset) & XHCI_XECP_LEGACY_OWNING_MASK) != XHCI_XECP_LEGACY_OS_OWNED)
  240. {
  241. usleep(1000);
  242. if (--timeout == 0)
  243. {
  244. kerror("The BIOS doesn't stop legacy support.");
  245. return -ETIMEDOUT;
  246. }
  247. }
  248. // 处理完成
  249. return 0;
  250. }
  251. // 读取下一个entry的偏移增加量
  252. int next_off = ((xhci_read_cap_reg32(id, current_offset) & 0xff00) >> 8) << 2;
  253. // 将指针跳转到下一个entry
  254. current_offset = next_off ? (current_offset + next_off) : 0;
  255. } while (current_offset);
  256. // 当前controller不存在legacy支持,也问题不大,不影响
  257. return 0;
  258. }
  259. /**
  260. * @brief 启用指定xhci控制器的调度
  261. *
  262. * @param id 控制器id
  263. * @return int
  264. */
  265. static int xhci_hc_start_sched(int id)
  266. {
  267. xhci_write_op_reg32(id, XHCI_OPS_USBCMD, (1 << 0) | (1 >> 2) | (1 << 3));
  268. usleep(100 * 1000);
  269. }
  270. /**
  271. * @brief 停止指定xhci控制器的调度
  272. *
  273. * @param id 控制器id
  274. * @return int
  275. */
  276. static int xhci_hc_stop_sched(int id)
  277. {
  278. xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00);
  279. }
  280. /**
  281. * @brief
  282. *
  283. * @return uint32_t
  284. */
  285. /**
  286. * @brief 在Ex capability list中寻找符合指定的协议号的寄存器offset、count、flag信息
  287. *
  288. * @param id 主机控制器id
  289. * @param list_off 列表项位置距离控制器虚拟基地址的偏移量
  290. * @param version 要寻找的端口版本号(2或3)
  291. * @param offset 返回的 Compatible Port Offset
  292. * @param count 返回的 Compatible Port Count
  293. * @param protocol_flag 返回的与协议相关的flag
  294. * @return uint32_t 下一个列表项的偏移量
  295. */
  296. static uint32_t xhci_hc_get_protocol_offset(int id, uint32_t list_off, const int version, uint32_t *offset, uint32_t *count, uint16_t *protocol_flag)
  297. {
  298. if (count)
  299. *count = 0;
  300. do
  301. {
  302. uint32_t dw0 = xhci_read_cap_reg32(id, list_off);
  303. uint32_t next_list_off = (dw0 >> 8) & 0xff;
  304. next_list_off = next_list_off ? (list_off + (next_list_off << 2)) : 0;
  305. if ((dw0 & 0xff) == XHCI_XECP_ID_PROTOCOL && ((dw0 & 0xff000000) >> 24) == version)
  306. {
  307. uint32_t dw2 = xhci_read_cap_reg32(id, list_off + 8);
  308. if (offset != NULL)
  309. *offset = (uint32_t)(dw2 & 0xff) - 1; // 使其转换为zero based
  310. if (count != NULL)
  311. *count = (uint32_t)((dw2 & 0xff00) >> 8);
  312. if (protocol_flag != NULL)
  313. *protocol_flag = (uint16_t)((dw2 >> 16) & 0x0fff);
  314. return next_list_off;
  315. }
  316. list_off = next_list_off;
  317. } while (list_off);
  318. return 0;
  319. }
  320. /**
  321. * @brief 配对xhci主机控制器的usb2、usb3端口
  322. *
  323. * @param id 主机控制器id
  324. * @return int 返回码
  325. */
  326. static int xhci_hc_pair_ports(int id)
  327. {
  328. struct xhci_caps_HCSPARAMS1_reg_t hcs1;
  329. memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
  330. // 从hcs1获取端口数量
  331. xhci_hc[id].port_num = hcs1.max_ports;
  332. // 找到所有的端口并标记其端口信息
  333. xhci_hc[id].port_num_u2 = 0;
  334. xhci_hc[id].port_num_u3 = 0;
  335. uint32_t next_off = xhci_hc[id].ext_caps_off;
  336. uint32_t offset, cnt;
  337. uint16_t protocol_flags;
  338. // 寻找所有的usb2端口
  339. while (next_off)
  340. {
  341. next_off = xhci_hc_get_protocol_offset(id, next_off, 2, &offset, &cnt, &protocol_flags);
  342. if (cnt)
  343. {
  344. for (int i = 0; i < cnt; ++i)
  345. {
  346. xhci_hc[id].ports[offset + i].offset = xhci_hc[id].port_num_u2++;
  347. xhci_hc[id].ports[offset + i].flags = XHCI_PROTOCOL_USB2;
  348. // usb2 high speed only
  349. if (protocol_flags & 2)
  350. xhci_hc[id].ports[offset + i].flags |= XHCI_PROTOCOL_HSO;
  351. }
  352. }
  353. }
  354. // 寻找所有的usb3端口
  355. next_off = xhci_hc[id].ext_caps_off;
  356. while (next_off)
  357. {
  358. next_off = xhci_hc_get_protocol_offset(id, next_off, 3, &offset, &cnt, &protocol_flags);
  359. if (cnt)
  360. {
  361. for (int i = 0; i < cnt; ++i)
  362. {
  363. xhci_hc[id].ports[offset + i].offset = xhci_hc[id].port_num_u3++;
  364. xhci_hc[id].ports[offset + i].flags = XHCI_PROTOCOL_USB3;
  365. }
  366. }
  367. }
  368. // 将对应的USB2端口和USB3端口进行配对
  369. for (int i = 0; i < xhci_hc[id].port_num; ++i)
  370. {
  371. for (int j = 0; j < xhci_hc[id].port_num; ++j)
  372. {
  373. if (unlikely(i == j))
  374. continue;
  375. if ((xhci_hc[id].ports[i].offset == xhci_hc[id].ports[j].offset) &&
  376. ((xhci_hc[id].ports[i].flags & XHCI_PROTOCOL_INFO) != (xhci_hc[id].ports[j].flags & XHCI_PROTOCOL_INFO)))
  377. {
  378. xhci_hc[id].ports[i].paired_port_num = j;
  379. xhci_hc[id].ports[i].flags |= XHCI_PROTOCOL_HAS_PAIR;
  380. xhci_hc[id].ports[j].paired_port_num = i;
  381. xhci_hc[id].ports[j].flags |= XHCI_PROTOCOL_HAS_PAIR;
  382. }
  383. }
  384. }
  385. // 标记所有的usb3、单独的usb2端口为激活状态
  386. for (int i = 0; i < xhci_hc[id].port_num; ++i)
  387. {
  388. if (XHCI_PORT_IS_USB3(id, i) ||
  389. (XHCI_PORT_IS_USB2(id, i) && (!XHCI_PORT_HAS_PAIR(id, i))))
  390. xhci_hc[id].ports[i].flags |= XHCI_PROTOCOL_ACTIVE;
  391. }
  392. kinfo("Found %d ports on root hub, usb2 ports:%d, usb3 ports:%d", xhci_hc[id].port_num, xhci_hc[id].port_num_u2, xhci_hc[id].port_num_u3);
  393. /*
  394. // 打印配对结果
  395. for (int i = 1; i <= xhci_hc[id].port_num; ++i)
  396. {
  397. if (XHCI_PORT_IS_USB3(id, i))
  398. {
  399. kdebug("USB3 port %d, offset=%d, pair with usb2 port %d, current port is %s", i, xhci_hc[id].ports[i].offset,
  400. xhci_hc[id].ports[i].paired_port_num, XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive");
  401. }
  402. else if (XHCI_PORT_IS_USB2(id, i) && (!XHCI_PORT_HAS_PAIR(id, i))) // 单独的2.0接口
  403. {
  404. kdebug("Stand alone USB2 port %d, offset=%d, current port is %s", i, xhci_hc[id].ports[i].offset,
  405. XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive");
  406. }
  407. else if (XHCI_PORT_IS_USB2(id, i))
  408. {
  409. kdebug("USB2 port %d, offset=%d, current port is %s, has pair=%s", i, xhci_hc[id].ports[i].offset,
  410. XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive", XHCI_PORT_HAS_PAIR(id, i) ? "true" : "false");
  411. }
  412. }
  413. */
  414. return 0;
  415. }
  416. /**
  417. * @brief 创建ring,并将最后一个trb指向头一个trb
  418. *
  419. * @param trbs 要创建的trb数量
  420. * @return uint64_t trb数组的起始虚拟地址
  421. */
  422. static uint64_t xhci_create_ring(int trbs)
  423. {
  424. int total_size = trbs * sizeof(struct xhci_TRB_t);
  425. const uint64_t vaddr = (uint64_t)kmalloc(total_size, 0);
  426. memset((void *)vaddr, 0, total_size);
  427. // 设置最后一个trb为link trb
  428. xhci_TRB_set_link_cmd(vaddr + total_size - sizeof(struct xhci_TRB_t));
  429. return vaddr;
  430. }
  431. /**
  432. * @brief 创建新的event ring table和对应的ring segment
  433. *
  434. * @param trbs 包含的trb的数量
  435. * @param ret_ring_addr 返回的第一个event ring segment的基地址(虚拟)
  436. * @return uint64_t trb table的虚拟地址
  437. */
  438. static uint64_t xhci_create_event_ring(int trbs, uint64_t *ret_ring_addr)
  439. {
  440. const uint64_t table_vaddr = (const uint64_t)kmalloc(64, 0); // table支持8个segment
  441. if (unlikely(table_vaddr == NULL))
  442. return -ENOMEM;
  443. memset((void *)table_vaddr, 0, 64);
  444. // 暂时只创建1个segment
  445. const uint64_t seg_vaddr = (const uint64_t)kmalloc(trbs * sizeof(struct xhci_TRB_t), 0);
  446. if (unlikely(seg_vaddr == NULL))
  447. return -ENOMEM;
  448. memset((void *)seg_vaddr, 0, trbs * sizeof(struct xhci_TRB_t));
  449. // 将segment地址和大小写入table
  450. *(uint64_t *)(table_vaddr) = virt_2_phys(seg_vaddr);
  451. *(uint64_t *)(table_vaddr + 8) = trbs;
  452. *ret_ring_addr = seg_vaddr;
  453. return table_vaddr;
  454. }
  455. void xhci_hc_irq_enable(uint64_t irq_num)
  456. {
  457. int cid = xhci_find_hcid_by_irq_num(irq_num);
  458. if (WARN_ON(cid == -1))
  459. return;
  460. kdebug("start msi");
  461. pci_start_msi(xhci_hc[cid].pci_dev_hdr);
  462. kdebug("start sched");
  463. xhci_hc_start_sched(cid);
  464. kdebug("start ports");
  465. xhci_hc_start_ports(cid);
  466. kdebug("enabled");
  467. }
  468. void xhci_hc_irq_disable(uint64_t irq_num)
  469. {
  470. int cid = xhci_find_hcid_by_irq_num(irq_num);
  471. if (WARN_ON(cid == -1))
  472. return;
  473. xhci_hc_stop_sched(cid);
  474. pci_disable_msi(xhci_hc[cid].pci_dev_hdr);
  475. }
  476. uint64_t xhci_hc_irq_install(uint64_t irq_num, void *arg)
  477. {
  478. int cid = xhci_find_hcid_by_irq_num(irq_num);
  479. if (WARN_ON(cid == -1))
  480. return -EINVAL;
  481. struct xhci_hc_irq_install_info_t *info = (struct xhci_hc_irq_install_info_t *)arg;
  482. struct msi_desc_t msi_desc;
  483. memset(&msi_desc, 0, sizeof(struct msi_desc_t));
  484. msi_desc.pci_dev = (struct pci_device_structure_header_t*)xhci_hc[cid].pci_dev_hdr;
  485. msi_desc.assert = info->assert;
  486. msi_desc.edge_trigger = info->edge_trigger;
  487. msi_desc.processor = info->processor;
  488. msi_desc.pci.msi_attribute.is_64 = 1;
  489. // todo: QEMU是使用msix的,因此要先在pci中实现msix
  490. int retval = pci_enable_msi(&msi_desc);
  491. kdebug("pci retval = %d", retval);
  492. kdebug("xhci irq %d installed.", irq_num);
  493. return 0;
  494. }
  495. void xhci_hc_irq_uninstall(uint64_t irq_num)
  496. {
  497. // todo
  498. int cid = xhci_find_hcid_by_irq_num(irq_num);
  499. if (WARN_ON(cid == -1))
  500. return;
  501. xhci_hc_stop(cid);
  502. }
  503. /**
  504. * @brief xhci主机控制器的中断处理函数
  505. *
  506. * @param irq_num 中断向量号
  507. * @param cid 控制器号
  508. * @param regs 寄存器值
  509. */
  510. void xhci_hc_irq_handler(uint64_t irq_num, uint64_t cid, struct pt_regs *regs)
  511. {
  512. // todo: handle irq
  513. kdebug("USB irq received.");
  514. }
  515. /**
  516. * @brief 重置端口
  517. *
  518. * @param id 控制器id
  519. * @param port 端口id
  520. * @return int
  521. */
  522. static int xhci_reset_port(const int id, const int port)
  523. {
  524. int retval = 0;
  525. // 相对于op寄存器基地址的偏移量
  526. uint64_t port_status_offset = XHCI_OPS_PRS + port * 16;
  527. // kdebug("to reset %d, offset=%#018lx", port, port_status_offset);
  528. // 检查端口电源状态
  529. if ((xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC) & (1 << 9)) == 0)
  530. {
  531. kdebug("port is power off, starting...");
  532. xhci_write_cap_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9));
  533. usleep(2000);
  534. // 检测端口是否被启用, 若未启用,则报错
  535. if ((xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC) & (1 << 9)) == 0)
  536. {
  537. kdebug("cannot power on %d", port);
  538. return -EAGAIN;
  539. }
  540. }
  541. // kdebug("port:%d, power check ok", port);
  542. // 确保端口的status被清0
  543. xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | XHCI_PORTUSB_CHANGE_BITS);
  544. // 重置当前端口
  545. if (XHCI_PORT_IS_USB3(id, port))
  546. xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | (1 << 31));
  547. else
  548. xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | (1 << 4));
  549. retval = -ETIMEDOUT;
  550. // 等待portsc的port reset change位被置位,说明reset完成
  551. int timeout = 200;
  552. while (timeout)
  553. {
  554. uint32_t val = xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC);
  555. if (XHCI_PORT_IS_USB3(id, port) && (val & (1 << 31)) == 0)
  556. break;
  557. else if (XHCI_PORT_IS_USB2(id, port) && (val & (1 << 4)) == 0)
  558. break;
  559. else if (val & (1 << 21))
  560. break;
  561. --timeout;
  562. usleep(500);
  563. }
  564. // kdebug("timeout= %d", timeout);
  565. if (timeout > 0)
  566. {
  567. // 等待恢复
  568. usleep(USB_TIME_RST_REC * 1000);
  569. uint32_t val = xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC);
  570. // 如果reset之后,enable bit仍然是1,那么说明reset成功
  571. if (val & (1 << 1))
  572. {
  573. // 清除status change bit
  574. xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | XHCI_PORTUSB_CHANGE_BITS);
  575. }
  576. retval = 0;
  577. }
  578. // 如果usb2端口成功reset,则处理该端口的active状态
  579. if (retval == 0 && XHCI_PORT_IS_USB2(id, port))
  580. {
  581. xhci_hc[id].ports[port].flags |= XHCI_PROTOCOL_ACTIVE;
  582. if (XHCI_PORT_HAS_PAIR(id, port)) // 如果有对应的usb3端口,则将usb3端口设置为未激活
  583. xhci_hc[id].ports[xhci_hc[id].ports[port].paired_port_num].flags &= ~(XHCI_PROTOCOL_ACTIVE);
  584. }
  585. // 如果usb3端口reset失败,则启用与之配对的usb2端口
  586. if (retval != 0 && XHCI_PORT_IS_USB3(id, port))
  587. {
  588. xhci_hc[id].ports[port].flags &= ~XHCI_PROTOCOL_ACTIVE;
  589. xhci_hc[id].ports[xhci_hc[id].ports[port].paired_port_num].flags |= XHCI_PROTOCOL_ACTIVE;
  590. }
  591. return retval;
  592. }
  593. /**
  594. * @brief 启用xhci控制器的端口
  595. *
  596. * @param id 控制器id
  597. * @return int
  598. */
  599. static int xhci_hc_start_ports(int id)
  600. {
  601. int cnt = 0;
  602. // 注意,这两个循环应该不能合并到一起,因为可能存在usb2端口offset在前,usb3端口在后的情况,那样的话就会出错
  603. // 循环启动所有的usb3端口
  604. for (int i = 0; i < xhci_hc[id].port_num; ++i)
  605. {
  606. if (XHCI_PORT_IS_USB3(id, i) && XHCI_PORT_IS_ACTIVE(id, i))
  607. {
  608. // reset该端口
  609. if (likely(xhci_reset_port(id, i) == 0)) // 如果端口reset成功,就获取它的描述符
  610. // 否则,reset函数会把它给设置为未激活,并且标志配对的usb2端口是激活的
  611. {
  612. // xhci_hc_get_descriptor(id, i);
  613. ++cnt;
  614. }
  615. }
  616. }
  617. kdebug("active usb3 ports:%d", cnt);
  618. // 循环启动所有的usb2端口
  619. for (int i = 0; i < xhci_hc[id].port_num; ++i)
  620. {
  621. if (XHCI_PORT_IS_USB2(id, i) && XHCI_PORT_IS_ACTIVE(id, i))
  622. {
  623. // reset该端口
  624. if (likely(xhci_reset_port(id, i) == 0)) // 如果端口reset成功,就获取它的描述符
  625. // 否则,reset函数会把它给设置为未激活,并且标志配对的usb2端口是激活的
  626. {
  627. // xhci_hc_get_descriptor(id, i);
  628. ++cnt;
  629. }
  630. }
  631. }
  632. kinfo("xHCI controller %d: Started %d ports.", id, cnt);
  633. }
  634. /**
  635. * @brief 初始化xhci主机控制器的中断控制
  636. *
  637. * @param id 主机控制器id
  638. * @return int 返回码
  639. */
  640. static int xhci_hc_init_intr(int id)
  641. {
  642. uint64_t retval = 0;
  643. struct xhci_caps_HCSPARAMS1_reg_t hcs1;
  644. struct xhci_caps_HCSPARAMS2_reg_t hcs2;
  645. memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
  646. memcpy(&hcs2, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS2), sizeof(struct xhci_caps_HCSPARAMS2_reg_t));
  647. uint32_t max_segs = (1 << (uint32_t)(hcs2.ERST_Max));
  648. uint32_t max_interrupters = hcs1.max_intrs;
  649. // 创建 event ring
  650. retval = xhci_create_event_ring(4096, &xhci_hc[id].event_ring_vaddr);
  651. if (unlikely((int64_t)(retval) == -ENOMEM))
  652. return -ENOMEM;
  653. xhci_hc[id].event_ring_table_vaddr = retval;
  654. retval = 0;
  655. xhci_hc[id].current_event_ring_cycle = 1;
  656. // 写入第0个中断寄存器组
  657. xhci_write_intr_reg32(id, 0, XHCI_IR_MAN, 0x3); // 使能中断并清除pending位(这个pending位是写入1就清0的)
  658. xhci_write_intr_reg32(id, 0, XHCI_IR_MOD, 0); // 关闭中断管制
  659. xhci_write_intr_reg32(id, 0, XHCI_IR_TABLE_SIZE, 1); // 当前只有1个segment
  660. xhci_write_intr_reg64(id, 0, XHCI_IR_DEQUEUE, virt_2_phys(xhci_hc[id].event_ring_vaddr) | (1 << 3)); // 写入dequeue寄存器,并清除busy位(写1就会清除)
  661. xhci_write_intr_reg64(id, 0, XHCI_IR_TABLE_ADDR, virt_2_phys(xhci_hc[id].event_ring_table_vaddr)); // 写入table地址
  662. // 清除状态位
  663. xhci_write_op_reg32(id, XHCI_OPS_USBSTS, (1 << 10) | (1 << 4) | (1 << 3) | (1 << 2));
  664. // 开启usb中断
  665. // 注册中断处理程序
  666. struct xhci_hc_irq_install_info_t install_info;
  667. install_info.assert = 1;
  668. install_info.edge_trigger = 1;
  669. install_info.processor = 0; // 投递到bsp
  670. char *buf = (char *)kmalloc(16, 0);
  671. memset(buf, 0, 16);
  672. sprintk(buf, "xHCI HC%d", id);
  673. irq_register(xhci_controller_irq_num[id], &install_info, &xhci_hc_irq_handler, id, &xhci_hc_intr_controller, buf);
  674. kfree(buf);
  675. kdebug("xhci host controller %d: interrupt registered. irq num=%d", id, xhci_controller_irq_num[id]);
  676. return 0;
  677. }
  678. /**
  679. * @brief 初始化xhci控制器
  680. *
  681. * @param header 指定控制器的pci device头部
  682. */
  683. void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
  684. {
  685. if (xhci_ctrl_count >= XHCI_MAX_HOST_CONTROLLERS)
  686. {
  687. kerror("Initialize xhci controller failed: exceed the limit of max controllers.");
  688. return;
  689. }
  690. spin_lock(&xhci_controller_init_lock);
  691. kinfo("Initializing xhci host controller: bus=%#02x, device=%#02x, func=%#02x, VendorID=%#04x, irq_line=%d, irq_pin=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, dev_hdr->header.Vendor_ID, dev_hdr->Interrupt_Line, dev_hdr->Interrupt_PIN);
  692. int cid = xhci_hc_find_available_id();
  693. if (cid < 0)
  694. {
  695. kerror("Initialize xhci controller failed: exceed the limit of max controllers.");
  696. goto failed_exceed_max;
  697. }
  698. memset(&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
  699. xhci_hc[cid].controller_id = cid;
  700. xhci_hc[cid].pci_dev_hdr = dev_hdr;
  701. pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0x4, 0x0006); // mem I/O access enable and bus master enable
  702. // 为当前控制器映射寄存器地址空间
  703. xhci_hc[cid].vbase = SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + XHCI_MAPPING_OFFSET + 65536 * xhci_hc[cid].controller_id;
  704. // kdebug("dev_hdr->BAR0 & (~0xf)=%#018lx", dev_hdr->BAR0 & (~0xf));
  705. mm_map_phys_addr(xhci_hc[cid].vbase, dev_hdr->BAR0 & (~0xf), 65536, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD, true);
  706. // 读取xhci控制寄存器
  707. uint16_t iversion = *(uint16_t *)(xhci_hc[cid].vbase + XHCI_CAPS_HCIVERSION);
  708. struct xhci_caps_HCCPARAMS1_reg_t hcc1;
  709. struct xhci_caps_HCCPARAMS2_reg_t hcc2;
  710. struct xhci_caps_HCSPARAMS1_reg_t hcs1;
  711. struct xhci_caps_HCSPARAMS2_reg_t hcs2;
  712. memcpy(&hcc1, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCCPARAMS1), sizeof(struct xhci_caps_HCCPARAMS1_reg_t));
  713. memcpy(&hcc2, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCCPARAMS2), sizeof(struct xhci_caps_HCCPARAMS2_reg_t));
  714. memcpy(&hcs1, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
  715. memcpy(&hcs2, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCSPARAMS2), sizeof(struct xhci_caps_HCSPARAMS2_reg_t));
  716. // kdebug("hcc1.xECP=%#010lx", hcc1.xECP);
  717. // 计算operational registers的地址
  718. xhci_hc[cid].vbase_op = xhci_hc[cid].vbase + xhci_read_cap_reg8(cid, XHCI_CAPS_CAPLENGTH);
  719. xhci_hc[cid].db_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_DBOFF) & (~0x3); // bits [1:0] reserved
  720. xhci_hc[cid].rts_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_RTSOFF) & (~0x1f); // bits [4:0] reserved.
  721. xhci_hc[cid].ext_caps_off = 1UL * (hcc1.xECP) * 4;
  722. xhci_hc[cid].context_size = (hcc1.csz) ? 64 : 32;
  723. if (iversion < 0x95)
  724. {
  725. kwarn("Unsupported/Unknowned xHCI controller version: %#06x. This may cause unexpected behavior.", iversion);
  726. }
  727. // if it is a Panther Point device, make sure sockets are xHCI controlled.
  728. if (((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0) & 0xffff) == 0x8086) &&
  729. ((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 2) & 0xffff) == 0x1E31) &&
  730. ((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 8) & 0xff) == 4))
  731. {
  732. kdebug("Is a Panther Point device");
  733. pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd8, 0xffffffff);
  734. pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd0, 0xffffffff);
  735. }
  736. // 关闭legacy支持
  737. FAIL_ON(xhci_hc_stop_legacy(cid), failed);
  738. // 重置xhci控制器
  739. FAIL_ON(xhci_hc_reset(cid), failed);
  740. // 端口配对
  741. FAIL_ON(xhci_hc_pair_ports(cid), failed);
  742. // ========== 设置USB host controller =========
  743. // 获取页面大小
  744. kdebug("ops pgsize=%#010lx", xhci_read_op_reg32(cid, XHCI_OPS_PAGESIZE));
  745. xhci_hc[cid].page_size = (xhci_read_op_reg32(cid, XHCI_OPS_PAGESIZE) & 0xffff) << 12;
  746. kdebug("page size=%d", xhci_hc[cid].page_size);
  747. // 获取设备上下文空间
  748. xhci_hc[cid].dcbaap_vaddr = (uint64_t)kmalloc(2048, 0); // 分配2KB的设备上下文地址数组空间
  749. memset((void *)xhci_hc[cid].dcbaap_vaddr, 0, 2048);
  750. kdebug("dcbaap_vaddr=%#018lx", xhci_hc[cid].dcbaap_vaddr);
  751. if (unlikely(!xhci_is_aligned64(xhci_hc[cid].dcbaap_vaddr))) // 地址不是按照64byte对齐
  752. {
  753. kerror("dcbaap isn't 64 byte aligned.");
  754. goto failed_free_dyn;
  755. }
  756. // 写入dcbaap
  757. xhci_write_op_reg64(cid, XHCI_OPS_DCBAAP, virt_2_phys(xhci_hc[cid].dcbaap_vaddr));
  758. // 创建command ring
  759. xhci_hc[cid].cmd_ring_vaddr = xhci_create_ring(XHCI_CMND_RING_TRBS);
  760. if (unlikely(!xhci_is_aligned64(xhci_hc[cid].cmd_ring_vaddr))) // 地址不是按照64byte对齐
  761. {
  762. kerror("cmd ring isn't 64 byte aligned.");
  763. goto failed_free_dyn;
  764. }
  765. // 设置初始cycle bit为1
  766. xhci_hc[cid].cmd_trb_cycle = XHCI_TRB_CYCLE_ON;
  767. // 写入command ring控制寄存器
  768. xhci_write_op_reg64(cid, XHCI_OPS_CRCR, virt_2_phys(xhci_hc[cid].cmd_ring_vaddr) | xhci_hc[cid].cmd_trb_cycle);
  769. // 写入配置寄存器
  770. uint32_t max_slots = hcs1.max_slots;
  771. kdebug("max slots = %d", max_slots);
  772. xhci_write_op_reg32(cid, XHCI_OPS_CONFIG, max_slots);
  773. // 写入设备通知控制寄存器
  774. xhci_write_op_reg32(cid, XHCI_OPS_DNCTRL, (1 << 1)); // 目前只有N1被支持
  775. FAIL_ON(xhci_hc_init_intr(cid), failed_free_dyn);
  776. ++xhci_ctrl_count;
  777. spin_unlock(&xhci_controller_init_lock);
  778. return;
  779. failed_free_dyn:; // 释放动态申请的内存
  780. if (xhci_hc[cid].dcbaap_vaddr)
  781. kfree((void *)xhci_hc[cid].dcbaap_vaddr);
  782. if (xhci_hc[cid].cmd_ring_vaddr)
  783. kfree((void *)xhci_hc[cid].cmd_ring_vaddr);
  784. if (xhci_hc[cid].event_ring_table_vaddr)
  785. kfree((void *)xhci_hc[cid].event_ring_table_vaddr);
  786. if (xhci_hc[cid].event_ring_vaddr)
  787. kfree((void *)xhci_hc[cid].event_ring_vaddr);
  788. failed:;
  789. // 取消地址映射
  790. mm_unmap(xhci_hc[cid].vbase, 65536);
  791. // 清空数组
  792. memset((void *)&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
  793. failed_exceed_max:;
  794. kerror("Failed to initialize controller: bus=%d, dev=%d, func=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func);
  795. spin_unlock(&xhci_controller_init_lock);
  796. }