pci.c 8.4 KB

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  1. #include "pci.h"
  2. #include "../../common/kprint.h"
  3. /**
  4. * @brief 从pci配置空间读取信息
  5. *
  6. * @param bus 总线号
  7. * @param slot 设备号
  8. * @param func 功能号
  9. * @param offset 寄存器偏移量
  10. * @return uint 寄存器值
  11. */
  12. uint pci_read_config(uchar bus, uchar slot, uchar func, uchar offset)
  13. {
  14. uint lbus = (uint)bus;
  15. uint lslot = (uint)slot;
  16. uint lfunc = ((uint)func) & 7;
  17. // 构造pci配置空间地址
  18. uint address = (uint)((lbus << 16) | (lslot << 11) | (lfunc << 8) | (offset & 0xfc) | ((uint)0x80000000));
  19. io_out32(PORT_PCI_CONFIG_ADDRESS, address);
  20. // 读取返回的数据
  21. return (uint)(io_in32(PORT_PCI_CONFIG_DATA));
  22. }
  23. /**
  24. * @brief 读取type为0x0的pci设备的header
  25. * 本函数只应被 pci_read_header()调用
  26. * @param header 返回的header
  27. * @param bus 总线号
  28. * @param slot 插槽号
  29. * @param func 功能号
  30. */
  31. static void pci_read_general_device_header(struct pci_device_structure_general_device_t *header, uchar bus, uchar slot, uchar func)
  32. {
  33. uint32_t tmp32;
  34. header->BAR0 = pci_read_config(bus, slot, func, 0x10);
  35. header->BAR1 = pci_read_config(bus, slot, func, 0x14);
  36. header->BAR2 = pci_read_config(bus, slot, func, 0x18);
  37. header->BAR3 = pci_read_config(bus, slot, func, 0x1c);
  38. header->BAR4 = pci_read_config(bus, slot, func, 0x20);
  39. header->BAR5 = pci_read_config(bus, slot, func, 0x24);
  40. header->Cardbus_CIS_Pointer = pci_read_config(bus, slot, func, 0x28);
  41. tmp32 = pci_read_config(bus, slot, func, 0x2c);
  42. header->Subsystem_Vendor_ID = tmp32 & 0xffff;
  43. header->Subsystem_ID = (tmp32 >> 16) & 0xffff;
  44. header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x30);
  45. tmp32 = pci_read_config(bus, slot, func, 0x34);
  46. header->Capabilities_Pointer = tmp32 & 0xff;
  47. header->reserved0 = (tmp32 >> 8) & 0xff;
  48. header->reserved1 = (tmp32 >> 16) & 0xffff;
  49. header->reserved2 = pci_read_config(bus, slot, func, 0x38);
  50. tmp32 = pci_read_config(bus, slot, func, 0x3c);
  51. header->Interrupt_Line = tmp32 & 0xff;
  52. header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
  53. header->Min_Grant = (tmp32 >> 16) & 0xff;
  54. header->Max_Latency = (tmp32 >> 24) & 0xff;
  55. }
  56. /**
  57. * @brief 读取type为0x1的pci_to_pci_bridge的header
  58. * 本函数只应被 pci_read_header()调用
  59. * @param header 返回的header
  60. * @param bus 总线号
  61. * @param slot 插槽号
  62. * @param func 功能号
  63. */
  64. static void pci_read_pci_to_pci_bridge_header(struct pci_device_structure_pci_to_pci_bridge_t *header, uchar bus, uchar slot, uchar func)
  65. {
  66. uint32_t tmp32;
  67. header->BAR0 = pci_read_config(bus, slot, func, 0x10);
  68. header->BAR1 = pci_read_config(bus, slot, func, 0x14);
  69. tmp32 = pci_read_config(bus, slot, func, 0x18);
  70. header->Primary_Bus_Number = tmp32 & 0xff;
  71. header->Secondary_Bus_Number = (tmp32 >> 8) & 0xff;
  72. header->Subordinate_Bus_Number = (tmp32 >> 16) & 0xff;
  73. header->Secondary_Latency_Timer = (tmp32 >> 24) & 0xff;
  74. tmp32 = pci_read_config(bus, slot, func, 0x1c);
  75. header->io_base = tmp32 & 0xff;
  76. header->io_limit = (tmp32 >> 8) & 0xff;
  77. header->Secondary_Status = (tmp32 >> 16) & 0xffff;
  78. tmp32 = pci_read_config(bus, slot, func, 0x20);
  79. header->Memory_Base = tmp32 & 0xffff;
  80. header->Memory_Limit = (tmp32 >> 16) & 0xffff;
  81. tmp32 = pci_read_config(bus, slot, func, 0x24);
  82. header->Prefetchable_Memory_Base = tmp32 & 0xffff;
  83. header->Prefetchable_Memory_Limit = (tmp32 >> 16) & 0xffff;
  84. header->Prefetchable_Base_Upper_32_Bits = pci_read_config(bus, slot, func, 0x28);
  85. header->Prefetchable_Limit_Upper_32_Bits = pci_read_config(bus, slot, func, 0x2c);
  86. tmp32 = pci_read_config(bus, slot, func, 0x30);
  87. header->io_Base_Upper_16_Bits = tmp32 & 0xffff;
  88. header->io_Limit_Upper_16_Bits = (tmp32 >> 16) & 0xffff;
  89. tmp32 = pci_read_config(bus, slot, func, 0x34);
  90. header->Capability_Pointer = tmp32 & 0xff;
  91. header->reserved0 = (tmp32 >> 8) & 0xff;
  92. header->reserved1 = (tmp32 >> 16) & 0xffff;
  93. header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x38);
  94. tmp32 = pci_read_config(bus, slot, func, 0x3c);
  95. header->Interrupt_Line = tmp32 & 0xff;
  96. header->Interrupt_PIN = (tmp32 >> 8) & 0xff;
  97. header->Bridge_Control = (tmp32 >> 16) & 0xffff;
  98. }
  99. /**
  100. * @brief 读取type为0x2的pci_to_cardbus_bridge的header
  101. * 本函数只应被 pci_read_header()调用
  102. * @param header 返回的header
  103. * @param bus 总线号
  104. * @param slot 插槽号
  105. * @param func 功能号
  106. */
  107. static void pci_read_pci_to_cardbus_bridge_header(struct pci_device_structure_pci_to_cardbus_bridge_t *header, uchar bus, uchar slot, uchar func)
  108. {
  109. uint32_t tmp32;
  110. header->CardBus_Socket_ExCa_base_address = pci_read_config(bus, slot, func, 0x10);
  111. tmp32 = pci_read_config(bus, slot, func, 0x14);
  112. header->Offset_of_capabilities_list = tmp32 & 0xff;
  113. header->Reserved = (tmp32 >> 8) & 0xff;
  114. header->Secondary_status = (tmp32 >> 16) & 0xff;
  115. tmp32 = pci_read_config(bus, slot, func, 0x18);
  116. header->PCI_bus_number = tmp32 & 0xff;
  117. header->CardBus_bus_number = (tmp32 >> 8) & 0xff;
  118. header->Subordinate_bus_number = (tmp32 >> 16) & 0xff;
  119. header->CardBus_latency_timer = (tmp32 >> 24) & 0xff;
  120. header->Memory_Base_Address0 = pci_read_config(bus, slot, func, 0x1c);
  121. header->Memory_Limit0 = pci_read_config(bus, slot, func, 0x20);
  122. header->Memory_Base_Address1 = pci_read_config(bus, slot, func, 0x24);
  123. header->Memory_Limit1 = pci_read_config(bus, slot, func, 0x28);
  124. header->IO_Base_Address0 = pci_read_config(bus, slot, func, 0x2c);
  125. header->IO_Limit0 = pci_read_config(bus, slot, func, 0x30);
  126. header->IO_Base_Address1 = pci_read_config(bus, slot, func, 0x34);
  127. header->IO_Limit1 = pci_read_config(bus, slot, func, 0x38);
  128. tmp32 = pci_read_config(bus, slot, func, 0x3c);
  129. header->Interrupt_Line = tmp32&0xff;
  130. header->Interrupt_PIN = (tmp32>>8)&0xff;
  131. header->Bridge_Control = (tmp32>>16)&0xffff;
  132. tmp32 = pci_read_config(bus, slot, func, 0x40);
  133. header->Subsystem_Device_ID = tmp32&0xffff;
  134. header->Subsystem_Vendor_ID = (tmp32>>16)&0xffff;
  135. header->PC_Card_legacy_mode_base_address_16_bit = pci_read_config(bus, slot, func, 0x44);
  136. }
  137. /**
  138. * @brief 读取pci设备标头
  139. *
  140. * @param type 标头类型
  141. * @param bus 总线号
  142. * @param slot 插槽号
  143. * @param func 功能号
  144. * @return 返回的header
  145. */
  146. void *pci_read_header(int *type, uchar bus, uchar slot, uchar func)
  147. {
  148. struct pci_device_structure_header_t common_header;
  149. uint32_t tmp32;
  150. // 先读取公共header
  151. tmp32 = pci_read_config(bus, slot, func, 0x0);
  152. common_header.Vendor_ID = tmp32 & 0xffff;
  153. common_header.Device_ID = (tmp32 >> 16) & 0xffff;
  154. tmp32 = pci_read_config(bus, slot, func, 0x4);
  155. common_header.Command = tmp32 & 0xffff;
  156. common_header.Status = (tmp32 >> 16) & 0xffff;
  157. tmp32 = pci_read_config(bus, slot, func, 0x8);
  158. common_header.RevisionID = tmp32 & 0xff;
  159. common_header.ProgIF = (tmp32 >> 8) & 0xff;
  160. common_header.SubClass = (tmp32 >> 16) & 0xff;
  161. common_header.Class_code = (tmp32 >> 24) & 0xff;
  162. tmp32 = pci_read_config(bus, slot, func, 0xc);
  163. common_header.CacheLineSize = tmp32 & 0xff;
  164. common_header.LatencyTimer = (tmp32 >> 8) & 0xff;
  165. common_header.HeaderType = (tmp32 >> 16) & 0xff;
  166. common_header.BIST = (tmp32 >> 24) & 0xff;
  167. // 根据公共头部,判断该结构所属的类型
  168. switch (common_header.Vendor_ID)
  169. {
  170. case 0xFFFF: // 设备不可用
  171. *type = E_DEVICE_INVALID;
  172. return NULL;
  173. break;
  174. case 0x0: // general device
  175. struct pci_device_structure_general_device_t ret;
  176. ret.header = common_header;
  177. pci_read_general_device_header(&ret, bus, slot, func);
  178. *type = 0x0;
  179. return &ret;
  180. break;
  181. case 0x1:
  182. struct pci_device_structure_pci_to_pci_bridge_t ret;
  183. ret.header = common_header;
  184. *type = 0x1;
  185. pci_read_pci_to_pci_bridge_header(&ret, bus, slot, func);
  186. return &ret;
  187. break;
  188. case 0x2:
  189. struct pci_device_structure_pci_to_cardbus_bridge_t ret;
  190. ret.header = common_header;
  191. *type = 0x2;
  192. pci_read_pci_to_cardbus_bridge_header(&ret, bus, slot, func);
  193. return &ret;
  194. break;
  195. default: // 错误的头类型 这里不应该被执行
  196. kBUG("PCI->pci_read_header(): Invalid header type.");
  197. *type = E_WRONG_HEADER_TYPE;
  198. return NULL;
  199. break;
  200. }
  201. }
  202. void pci_init()
  203. {
  204. }