xhci.c 33 KB

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  1. #include "xhci.h"
  2. #include <common/kprint.h>
  3. #include <debug/bug.h>
  4. #include <common/spinlock.h>
  5. #include <mm/mm.h>
  6. #include <mm/slab.h>
  7. #include <debug/traceback/traceback.h>
  8. #include <common/time.h>
  9. #include <exception/irq.h>
  10. #include <driver/interrupt/apic/apic.h>
  11. spinlock_t xhci_controller_init_lock = {0}; // xhci控制器初始化锁(在usb_init中被初始化)
  12. static int xhci_ctrl_count = 0; // xhci控制器计数
  13. static struct xhci_host_controller_t xhci_hc[XHCI_MAX_HOST_CONTROLLERS] = {0};
  14. void xhci_hc_irq_enable(uint64_t irq_num);
  15. void xhci_hc_irq_disable(uint64_t irq_num);
  16. uint64_t xhci_hc_irq_install(uint64_t irq_num, void *arg);
  17. void xhci_hc_irq_uninstall(uint64_t irq_num);
  18. static int xhci_hc_find_available_id();
  19. static int xhci_hc_stop(int id);
  20. static int xhci_hc_reset(int id);
  21. static int xhci_hc_stop_legacy(int id);
  22. static int xhci_hc_start_sched(int id);
  23. static int xhci_hc_stop_sched(int id);
  24. static uint32_t xhci_hc_get_protocol_offset(int id, uint32_t list_off, const int version, uint32_t *offset, uint32_t *count, uint16_t *protocol_flag);
  25. static int xhci_hc_pair_ports(int id);
  26. static uint64_t xhci_create_ring(int trbs);
  27. static uint64_t xhci_create_event_ring(int trbs, uint64_t *ret_ring_addr);
  28. void xhci_hc_irq_handler(uint64_t irq_num, uint64_t cid, struct pt_regs *regs);
  29. static int xhci_hc_init_intr(int id);
  30. static int xhci_hc_start_ports(int id);
  31. hardware_intr_controller xhci_hc_intr_controller =
  32. {
  33. .enable = xhci_hc_irq_enable,
  34. .disable = xhci_hc_irq_disable,
  35. .install = xhci_hc_irq_install,
  36. .uninstall = xhci_hc_irq_uninstall,
  37. .ack = apic_local_apic_edge_ack,
  38. };
  39. /*
  40. 注意!!!
  41. 尽管采用MMI/O的方式访问寄存器,但是对于指定大小的寄存器,
  42. 在发起读请求的时候,只能从寄存器的起始地址位置开始读取。
  43. 例子:不能在一个32bit的寄存器中的偏移量8的位置开始读取1个字节
  44. 这种情况下,我们必须从32bit的寄存器的0地址处开始读取32bit,然后通过移位的方式得到其中的字节。
  45. */
  46. #define xhci_read_cap_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase + offset))
  47. #define xhci_get_ptr_cap_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase + offset))
  48. #define xhci_write_cap_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase + offset) = (uint8_t)value)
  49. #define xhci_read_cap_reg32(id, offset) (*(uint32_t *)(xhci_hc[id].vbase + offset))
  50. #define xhci_get_ptr_cap_reg32(id, offset) ((uint32_t *)(xhci_hc[id].vbase + offset))
  51. #define xhci_write_cap_reg32(id, offset, value) (*(uint32_t *)(xhci_hc[id].vbase + offset) = (uint32_t)value)
  52. #define xhci_read_cap_reg64(id, offset) (*(uint64_t *)(xhci_hc[id].vbase + offset))
  53. #define xhci_get_ptr_reg64(id, offset) ((uint64_t *)(xhci_hc[id].vbase + offset))
  54. #define xhci_write_cap_reg64(id, offset, value) (*(uint64_t *)(xhci_hc[id].vbase + offset) = (uint64_t)value)
  55. #define xhci_read_op_reg8(id, offset) (*(uint8_t *)(xhci_hc[id].vbase_op + offset))
  56. #define xhci_get_ptr_op_reg8(id, offset) ((uint8_t *)(xhci_hc[id].vbase_op + offset))
  57. #define xhci_write_op_reg8(id, offset, value) (*(uint8_t *)(xhci_hc[id].vbase_op + offset) = (uint8_t)value)
  58. #define xhci_read_op_reg32(id, offset) (*(uint32_t *)(xhci_hc[id].vbase_op + offset))
  59. #define xhci_get_ptr_op_reg32(id, offset) ((uint32_t *)(xhci_hc[id].vbase_op + offset))
  60. #define xhci_write_op_reg32(id, offset, value) (*(uint32_t *)(xhci_hc[id].vbase_op + offset) = (uint32_t)value)
  61. #define xhci_read_op_reg64(id, offset) (*(uint64_t *)(xhci_hc[id].vbase_op + offset))
  62. #define xhci_get_ptr_op_reg64(id, offset) ((uint64_t *)(xhci_hc[id].vbase_op + offset))
  63. #define xhci_write_op_reg64(id, offset, value) (*(uint64_t *)(xhci_hc[id].vbase_op + offset) = (uint64_t)value)
  64. /**
  65. * @brief 计算中断寄存器组虚拟地址
  66. * @param id 主机控制器id
  67. * @param num xhci中断寄存器组号
  68. */
  69. #define xhci_calc_intr_vaddr(id, num) (xhci_hc[id].vbase + xhci_hc[id].rts_offset + XHCI_RT_IR0 + num * XHCI_IR_SIZE)
  70. /**
  71. * @brief 读取/写入中断寄存器
  72. * @param id 主机控制器id
  73. * @param num xhci中断寄存器组号
  74. * @param intr_offset 寄存器在当前寄存器组中的偏移量
  75. */
  76. #define xhci_read_intr_reg32(id, num, intr_offset) (*(uint32_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset))
  77. #define xhci_write_intr_reg32(id, num, intr_offset, value) (*(uint32_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset) = value)
  78. #define xhci_read_intr_reg64(id, num, intr_offset) (*(uint64_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset))
  79. #define xhci_write_intr_reg64(id, num, intr_offset, value) (*(uint64_t *)(xhci_calc_intr_vaddr(id, num) + intr_offset) = value)
  80. #define xhci_is_aligned64(addr) ((addr & 0x3f) == 0) // 是否64bytes对齐
  81. /**
  82. * @brief 判断端口信息
  83. * @param cid 主机控制器id
  84. * @param pid 端口id
  85. */
  86. #define XHCI_PORT_IS_USB2(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_INFO) == XHCI_PROTOCOL_USB2)
  87. #define XHCI_PORT_IS_USB3(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_INFO) == XHCI_PROTOCOL_USB3)
  88. #define XHCI_PORT_IS_USB2_HSO(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_HSO) == XHCI_PROTOCOL_HSO)
  89. #define XHCI_PORT_HAS_PAIR(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_HAS_PAIR) == XHCI_PROTOCOL_HAS_PAIR)
  90. #define XHCI_PORT_IS_ACTIVE(cid, pid) ((xhci_hc[cid].ports[pid].flags & XHCI_PROTOCOL_ACTIVE) == XHCI_PROTOCOL_ACTIVE)
  91. /**
  92. * @brief 设置link TRB的命令(dword3)
  93. *
  94. */
  95. #define xhci_TRB_set_link_cmd(trb_vaddr) \
  96. do \
  97. { \
  98. struct xhci_TRB_normal_t *ptr = (struct xhci_TRB_normal_t *)(trb_vaddr); \
  99. ptr->TRB_type = TRB_TYPE_LINK; \
  100. ptr->ioc = 0; \
  101. ptr->chain = 0; \
  102. ptr->ent = 0; \
  103. ptr->cycle = 1; \
  104. } while (0)
  105. // Common TRB types
  106. enum
  107. {
  108. TRB_TYPE_NORMAL = 1,
  109. TRB_TYPE_SETUP_STAGE,
  110. TRB_TYPE_DATA_STAGE,
  111. TRB_TYPE_STATUS_STAGE,
  112. TRB_TYPE_ISOCH,
  113. TRB_TYPE_LINK,
  114. TRB_TYPE_EVENT_DATA,
  115. TRB_TYPE_NO_OP,
  116. TRB_TYPE_ENABLE_SLOT,
  117. TRB_TYPE_DISABLE_SLOT = 10,
  118. TRB_TYPE_ADDRESS_DEVICE = 11,
  119. TRB_TYPE_CONFIG_EP,
  120. TRB_TYPE_EVALUATE_CONTEXT,
  121. TRB_TYPE_RESET_EP,
  122. TRB_TYPE_STOP_EP = 15,
  123. TRB_TYPE_SET_TR_DEQUEUE,
  124. TRB_TYPE_RESET_DEVICE,
  125. TRB_TYPE_FORCE_EVENT,
  126. TRB_TYPE_DEG_BANDWIDTH,
  127. TRB_TYPE_SET_LAT_TOLERANCE = 20,
  128. TRB_TYPE_GET_PORT_BAND = 21,
  129. TRB_TYPE_FORCE_HEADER,
  130. TRB_TYPE_NO_OP_CMD, // 24 - 31 = reserved
  131. TRB_TYPE_TRANS_EVENT = 32,
  132. TRB_TYPE_COMMAND_COMPLETION,
  133. TRB_TYPE_PORT_STATUS_CHANGE,
  134. TRB_TYPE_BANDWIDTH_REQUEST,
  135. TRB_TYPE_DOORBELL_EVENT,
  136. TRB_TYPE_HOST_CONTROLLER_EVENT = 37,
  137. TRB_TYPE_DEVICE_NOTIFICATION,
  138. TRB_TYPE_MFINDEX_WRAP,
  139. // 40 - 47 = reserved
  140. // 48 - 63 = Vendor Defined
  141. };
  142. /**
  143. * @brief 在controller数组之中寻找可用插槽
  144. *
  145. * 注意:该函数只能被获得init锁的进程所调用
  146. * @return int 可用id(无空位时返回-1)
  147. */
  148. static int xhci_hc_find_available_id()
  149. {
  150. if (unlikely(xhci_ctrl_count >= XHCI_MAX_HOST_CONTROLLERS))
  151. return -1;
  152. for (int i = 0; i < XHCI_MAX_HOST_CONTROLLERS; ++i)
  153. {
  154. if (xhci_hc[i].pci_dev_hdr == NULL)
  155. return i;
  156. }
  157. return -1;
  158. }
  159. /**
  160. * @brief 停止xhci主机控制器
  161. *
  162. * @param id 主机控制器id
  163. * @return int
  164. */
  165. static int xhci_hc_stop(int id)
  166. {
  167. // 判断是否已经停止
  168. if (unlikely((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 1))
  169. return 0;
  170. xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00000000);
  171. char timeout = 17;
  172. while ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
  173. {
  174. usleep(1000);
  175. if (--timeout == 0)
  176. return -ETIMEDOUT;
  177. }
  178. return 0;
  179. }
  180. /**
  181. * @brief reset xHCI主机控制器
  182. *
  183. * @param id 主机控制器id
  184. * @return int
  185. */
  186. static int xhci_hc_reset(int id)
  187. {
  188. int retval = 0;
  189. kdebug("usbsts=%#010lx", xhci_read_op_reg32(id, XHCI_OPS_USBSTS));
  190. // 判断HCHalted是否置位
  191. if ((xhci_read_op_reg32(id, XHCI_OPS_USBSTS) & (1 << 0)) == 0)
  192. {
  193. kdebug("stopping usb hc...");
  194. // 未置位,需要先尝试停止usb主机控制器
  195. retval = xhci_hc_stop(id);
  196. if (unlikely(retval))
  197. return retval;
  198. }
  199. int timeout = 500; // wait 500ms
  200. // reset
  201. uint32_t cmd = xhci_read_op_reg32(id, XHCI_OPS_USBCMD);
  202. kdebug("cmd=%#010lx", cmd);
  203. cmd |= (1 << 1);
  204. xhci_write_op_reg32(id, XHCI_OPS_USBCMD, cmd);
  205. kdebug("after rst, sts=%#010lx", xhci_read_op_reg32(id, XHCI_OPS_USBSTS));
  206. while (xhci_read_op_reg32(id, XHCI_OPS_USBCMD) & (1 << 1))
  207. {
  208. usleep(1000);
  209. if (--timeout == 0)
  210. return -ETIMEDOUT;
  211. }
  212. // kdebug("reset done!, timeout=%d", timeout);
  213. return retval;
  214. }
  215. /**
  216. * @brief 停止指定xhci控制器的legacy support
  217. *
  218. * @param id 控制器id
  219. * @return int
  220. */
  221. static int xhci_hc_stop_legacy(int id)
  222. {
  223. uint64_t current_offset = xhci_hc[id].ext_caps_off;
  224. do
  225. {
  226. // 判断当前entry是否为legacy support entry
  227. if (xhci_read_cap_reg8(id, current_offset) == XHCI_XECP_ID_LEGACY)
  228. {
  229. // 接管控制权
  230. xhci_write_cap_reg32(id, current_offset, xhci_read_cap_reg32(id, current_offset) | XHCI_XECP_LEGACY_OS_OWNED);
  231. // 等待响应完成
  232. int timeout = XHCI_XECP_LEGACY_TIMEOUT;
  233. while ((xhci_read_cap_reg32(id, current_offset) & XHCI_XECP_LEGACY_OWNING_MASK) != XHCI_XECP_LEGACY_OS_OWNED)
  234. {
  235. usleep(1000);
  236. if (--timeout == 0)
  237. {
  238. kerror("The BIOS doesn't stop legacy support.");
  239. return -ETIMEDOUT;
  240. }
  241. }
  242. // 处理完成
  243. return 0;
  244. }
  245. // 读取下一个entry的偏移增加量
  246. int next_off = ((xhci_read_cap_reg32(id, current_offset) & 0xff00) >> 8) << 2;
  247. // 将指针跳转到下一个entry
  248. current_offset = next_off ? (current_offset + next_off) : 0;
  249. } while (current_offset);
  250. // 当前controller不存在legacy支持,也问题不大,不影响
  251. return 0;
  252. }
  253. /**
  254. * @brief 启用指定xhci控制器的调度
  255. *
  256. * @param id 控制器id
  257. * @return int
  258. */
  259. static int xhci_hc_start_sched(int id)
  260. {
  261. xhci_write_op_reg32(id, XHCI_OPS_USBCMD, (1 << 0) | (1 >> 2) | (1 << 3));
  262. usleep(100 * 1000);
  263. }
  264. /**
  265. * @brief 停止指定xhci控制器的调度
  266. *
  267. * @param id 控制器id
  268. * @return int
  269. */
  270. static int xhci_hc_stop_sched(int id)
  271. {
  272. xhci_write_op_reg32(id, XHCI_OPS_USBCMD, 0x00);
  273. }
  274. /**
  275. * @brief
  276. *
  277. * @return uint32_t
  278. */
  279. /**
  280. * @brief 在Ex capability list中寻找符合指定的协议号的寄存器offset、count、flag信息
  281. *
  282. * @param id 主机控制器id
  283. * @param list_off 列表项位置距离控制器虚拟基地址的偏移量
  284. * @param version 要寻找的端口版本号(2或3)
  285. * @param offset 返回的 Compatible Port Offset
  286. * @param count 返回的 Compatible Port Count
  287. * @param protocol_flag 返回的与协议相关的flag
  288. * @return uint32_t 下一个列表项的偏移量
  289. */
  290. static uint32_t xhci_hc_get_protocol_offset(int id, uint32_t list_off, const int version, uint32_t *offset, uint32_t *count, uint16_t *protocol_flag)
  291. {
  292. if (count)
  293. *count = 0;
  294. do
  295. {
  296. uint32_t dw0 = xhci_read_cap_reg32(id, list_off);
  297. uint32_t next_list_off = (dw0 >> 8) & 0xff;
  298. next_list_off = next_list_off ? (list_off + (next_list_off << 2)) : 0;
  299. if ((dw0 & 0xff) == XHCI_XECP_ID_PROTOCOL && ((dw0 & 0xff000000) >> 24) == version)
  300. {
  301. uint32_t dw2 = xhci_read_cap_reg32(id, list_off + 8);
  302. if (offset != NULL)
  303. *offset = (uint32_t)(dw2 & 0xff) - 1; // 使其转换为zero based
  304. if (count != NULL)
  305. *count = (uint32_t)((dw2 & 0xff00) >> 8);
  306. if (protocol_flag != NULL && version == 2)
  307. *protocol_flag = (uint16_t)((dw2 >> 16) & 0x0fff);
  308. return next_list_off;
  309. }
  310. list_off = next_list_off;
  311. } while (list_off);
  312. return 0;
  313. }
  314. /**
  315. * @brief 配对xhci主机控制器的usb2、usb3端口
  316. *
  317. * @param id 主机控制器id
  318. * @return int 返回码
  319. */
  320. static int xhci_hc_pair_ports(int id)
  321. {
  322. struct xhci_caps_HCSPARAMS1_reg_t hcs1;
  323. memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
  324. // 从hcs1获取端口数量
  325. xhci_hc[id].port_num = hcs1.max_ports;
  326. // 找到所有的端口并标记其端口信息
  327. xhci_hc[id].port_num_u2 = 0;
  328. xhci_hc[id].port_num_u3 = 0;
  329. uint32_t next_off = xhci_hc[id].ext_caps_off;
  330. uint32_t offset, cnt;
  331. uint16_t protocol_flags = 0;
  332. // 寻找所有的usb2端口
  333. while (next_off)
  334. {
  335. next_off = xhci_hc_get_protocol_offset(id, next_off, 2, &offset, &cnt, &protocol_flags);
  336. if (cnt)
  337. {
  338. for (int i = 0; i < cnt; ++i)
  339. {
  340. xhci_hc[id].ports[offset + i].offset = xhci_hc[id].port_num_u2++;
  341. xhci_hc[id].ports[offset + i].flags = XHCI_PROTOCOL_USB2;
  342. // usb2 high speed only
  343. if (protocol_flags & 2)
  344. xhci_hc[id].ports[offset + i].flags |= XHCI_PROTOCOL_HSO;
  345. }
  346. }
  347. }
  348. // 寻找所有的usb3端口
  349. next_off = xhci_hc[id].ext_caps_off;
  350. while (next_off)
  351. {
  352. next_off = xhci_hc_get_protocol_offset(id, next_off, 3, &offset, &cnt, &protocol_flags);
  353. if (cnt)
  354. {
  355. for (int i = 0; i < cnt; ++i)
  356. {
  357. xhci_hc[id].ports[offset + i].offset = xhci_hc[id].port_num_u3++;
  358. xhci_hc[id].ports[offset + i].flags = XHCI_PROTOCOL_USB3;
  359. }
  360. }
  361. }
  362. // 将对应的USB2端口和USB3端口进行配对
  363. for (int i = 0; i < xhci_hc[id].port_num; ++i)
  364. {
  365. for (int j = 0; j < xhci_hc[id].port_num; ++j)
  366. {
  367. if (unlikely(i == j))
  368. continue;
  369. if ((xhci_hc[id].ports[i].offset == xhci_hc[id].ports[j].offset) &&
  370. ((xhci_hc[id].ports[i].flags & XHCI_PROTOCOL_INFO) != (xhci_hc[id].ports[j].flags & XHCI_PROTOCOL_INFO)))
  371. {
  372. xhci_hc[id].ports[i].paired_port_num = j;
  373. xhci_hc[id].ports[i].flags |= XHCI_PROTOCOL_HAS_PAIR;
  374. xhci_hc[id].ports[j].paired_port_num = i;
  375. xhci_hc[id].ports[j].flags |= XHCI_PROTOCOL_HAS_PAIR;
  376. }
  377. }
  378. }
  379. // 标记所有的usb3、单独的usb2端口为激活状态
  380. for (int i = 0; i < xhci_hc[id].port_num; ++i)
  381. {
  382. if (XHCI_PORT_IS_USB3(id, i) ||
  383. (XHCI_PORT_IS_USB2(id, i) && (!XHCI_PORT_HAS_PAIR(id, i))))
  384. xhci_hc[id].ports[i].flags |= XHCI_PROTOCOL_ACTIVE;
  385. }
  386. kinfo("Found %d ports on root hub, usb2 ports:%d, usb3 ports:%d", xhci_hc[id].port_num, xhci_hc[id].port_num_u2, xhci_hc[id].port_num_u3);
  387. /*
  388. // 打印配对结果
  389. for (int i = 1; i <= xhci_hc[id].port_num; ++i)
  390. {
  391. if (XHCI_PORT_IS_USB3(id, i))
  392. {
  393. kdebug("USB3 port %d, offset=%d, pair with usb2 port %d, current port is %s", i, xhci_hc[id].ports[i].offset,
  394. xhci_hc[id].ports[i].paired_port_num, XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive");
  395. }
  396. else if (XHCI_PORT_IS_USB2(id, i) && (!XHCI_PORT_HAS_PAIR(id, i))) // 单独的2.0接口
  397. {
  398. kdebug("Stand alone USB2 port %d, offset=%d, current port is %s", i, xhci_hc[id].ports[i].offset,
  399. XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive");
  400. }
  401. else if (XHCI_PORT_IS_USB2(id, i))
  402. {
  403. kdebug("USB2 port %d, offset=%d, current port is %s, has pair=%s", i, xhci_hc[id].ports[i].offset,
  404. XHCI_PORT_IS_ACTIVE(id, i) ? "active" : "inactive", XHCI_PORT_HAS_PAIR(id, i) ? "true" : "false");
  405. }
  406. }
  407. */
  408. return 0;
  409. }
  410. /**
  411. * @brief 创建ring,并将最后一个trb指向头一个trb
  412. *
  413. * @param trbs 要创建的trb数量
  414. * @return uint64_t trb数组的起始虚拟地址
  415. */
  416. static uint64_t xhci_create_ring(int trbs)
  417. {
  418. int total_size = trbs * sizeof(struct xhci_TRB_t);
  419. const uint64_t vaddr = (uint64_t)kmalloc(total_size, 0);
  420. memset((void *)vaddr, 0, total_size);
  421. // 设置最后一个trb为link trb
  422. xhci_TRB_set_link_cmd(vaddr + total_size - sizeof(struct xhci_TRB_t));
  423. return vaddr;
  424. }
  425. /**
  426. * @brief 创建新的event ring table和对应的ring segment
  427. *
  428. * @param trbs 包含的trb的数量
  429. * @param ret_ring_addr 返回的第一个event ring segment的基地址(虚拟)
  430. * @return uint64_t trb table的虚拟地址
  431. */
  432. static uint64_t xhci_create_event_ring(int trbs, uint64_t *ret_ring_addr)
  433. {
  434. const uint64_t table_vaddr = (const uint64_t)kmalloc(64, 0); // table支持8个segment
  435. if (unlikely(table_vaddr == NULL))
  436. return -ENOMEM;
  437. memset((void *)table_vaddr, 0, 64);
  438. // 暂时只创建1个segment
  439. const uint64_t seg_vaddr = (const uint64_t)kmalloc(trbs * sizeof(struct xhci_TRB_t), 0);
  440. if (unlikely(seg_vaddr == NULL))
  441. return -ENOMEM;
  442. memset((void *)seg_vaddr, 0, trbs * sizeof(struct xhci_TRB_t));
  443. // 将segment地址和大小写入table
  444. *(uint64_t *)(table_vaddr) = virt_2_phys(seg_vaddr);
  445. *(uint64_t *)(table_vaddr + 8) = trbs;
  446. *ret_ring_addr = seg_vaddr;
  447. return table_vaddr;
  448. }
  449. void xhci_hc_irq_enable(uint64_t irq_num)
  450. {
  451. int cid = xhci_find_hcid_by_irq_num(irq_num);
  452. if (WARN_ON(cid == -1))
  453. return;
  454. kdebug("start msi");
  455. pci_start_msi(xhci_hc[cid].pci_dev_hdr);
  456. kdebug("start sched");
  457. xhci_hc_start_sched(cid);
  458. kdebug("start ports");
  459. xhci_hc_start_ports(cid);
  460. kdebug("enabled");
  461. }
  462. void xhci_hc_irq_disable(uint64_t irq_num)
  463. {
  464. int cid = xhci_find_hcid_by_irq_num(irq_num);
  465. if (WARN_ON(cid == -1))
  466. return;
  467. xhci_hc_stop_sched(cid);
  468. pci_disable_msi(xhci_hc[cid].pci_dev_hdr);
  469. }
  470. uint64_t xhci_hc_irq_install(uint64_t irq_num, void *arg)
  471. {
  472. int cid = xhci_find_hcid_by_irq_num(irq_num);
  473. if (WARN_ON(cid == -1))
  474. return -EINVAL;
  475. struct xhci_hc_irq_install_info_t *info = (struct xhci_hc_irq_install_info_t *)arg;
  476. struct msi_desc_t msi_desc;
  477. memset(&msi_desc, 0, sizeof(struct msi_desc_t));
  478. msi_desc.pci_dev = (struct pci_device_structure_header_t *)xhci_hc[cid].pci_dev_hdr;
  479. msi_desc.assert = info->assert;
  480. msi_desc.edge_trigger = info->edge_trigger;
  481. msi_desc.processor = info->processor;
  482. msi_desc.pci.msi_attribute.is_64 = 1;
  483. // todo: QEMU是使用msix的,因此要先在pci中实现msix
  484. int retval = pci_enable_msi(&msi_desc);
  485. kdebug("pci retval = %d", retval);
  486. kdebug("xhci irq %d installed.", irq_num);
  487. return 0;
  488. }
  489. void xhci_hc_irq_uninstall(uint64_t irq_num)
  490. {
  491. // todo
  492. int cid = xhci_find_hcid_by_irq_num(irq_num);
  493. if (WARN_ON(cid == -1))
  494. return;
  495. xhci_hc_stop(cid);
  496. }
  497. /**
  498. * @brief xhci主机控制器的中断处理函数
  499. *
  500. * @param irq_num 中断向量号
  501. * @param cid 控制器号
  502. * @param regs 寄存器值
  503. */
  504. void xhci_hc_irq_handler(uint64_t irq_num, uint64_t cid, struct pt_regs *regs)
  505. {
  506. // todo: handle irq
  507. kdebug("USB irq received.");
  508. }
  509. /**
  510. * @brief 重置端口
  511. *
  512. * @param id 控制器id
  513. * @param port 端口id
  514. * @return int
  515. */
  516. static int xhci_reset_port(const int id, const int port)
  517. {
  518. int retval = 0;
  519. // 相对于op寄存器基地址的偏移量
  520. uint64_t port_status_offset = XHCI_OPS_PRS + port * 16;
  521. // kdebug("to reset %d, offset=%#018lx", port, port_status_offset);
  522. // 检查端口电源状态
  523. if ((xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC) & (1 << 9)) == 0)
  524. {
  525. kdebug("port is power off, starting...");
  526. xhci_write_cap_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9));
  527. usleep(2000);
  528. // 检测端口是否被启用, 若未启用,则报错
  529. if ((xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC) & (1 << 9)) == 0)
  530. {
  531. kdebug("cannot power on %d", port);
  532. return -EAGAIN;
  533. }
  534. }
  535. // kdebug("port:%d, power check ok", port);
  536. // 确保端口的status被清0
  537. xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | XHCI_PORTUSB_CHANGE_BITS);
  538. // 重置当前端口
  539. if (XHCI_PORT_IS_USB3(id, port))
  540. xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | (1 << 31));
  541. else
  542. xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | (1 << 4));
  543. retval = -ETIMEDOUT;
  544. // 等待portsc的port reset change位被置位,说明reset完成
  545. int timeout = 200;
  546. while (timeout)
  547. {
  548. uint32_t val = xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC);
  549. if (XHCI_PORT_IS_USB3(id, port) && (val & (1 << 31)) == 0)
  550. break;
  551. else if (XHCI_PORT_IS_USB2(id, port) && (val & (1 << 4)) == 0)
  552. break;
  553. else if (val & (1 << 21))
  554. break;
  555. --timeout;
  556. usleep(500);
  557. }
  558. // kdebug("timeout= %d", timeout);
  559. if (timeout > 0)
  560. {
  561. // 等待恢复
  562. usleep(USB_TIME_RST_REC * 1000);
  563. uint32_t val = xhci_read_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC);
  564. // 如果reset之后,enable bit仍然是1,那么说明reset成功
  565. if (val & (1 << 1))
  566. {
  567. // 清除status change bit
  568. xhci_write_op_reg32(id, port_status_offset + XHCI_PORT_PORTSC, (1 << 9) | XHCI_PORTUSB_CHANGE_BITS);
  569. }
  570. retval = 0;
  571. }
  572. // 如果usb2端口成功reset,则处理该端口的active状态
  573. if (retval == 0 && XHCI_PORT_IS_USB2(id, port))
  574. {
  575. xhci_hc[id].ports[port].flags |= XHCI_PROTOCOL_ACTIVE;
  576. if (XHCI_PORT_HAS_PAIR(id, port)) // 如果有对应的usb3端口,则将usb3端口设置为未激活
  577. xhci_hc[id].ports[xhci_hc[id].ports[port].paired_port_num].flags &= ~(XHCI_PROTOCOL_ACTIVE);
  578. }
  579. // 如果usb3端口reset失败,则启用与之配对的usb2端口
  580. if (retval != 0 && XHCI_PORT_IS_USB3(id, port))
  581. {
  582. xhci_hc[id].ports[port].flags &= ~XHCI_PROTOCOL_ACTIVE;
  583. xhci_hc[id].ports[xhci_hc[id].ports[port].paired_port_num].flags |= XHCI_PROTOCOL_ACTIVE;
  584. }
  585. return retval;
  586. }
  587. /**
  588. * @brief 启用xhci控制器的端口
  589. *
  590. * @param id 控制器id
  591. * @return int
  592. */
  593. static int xhci_hc_start_ports(int id)
  594. {
  595. int cnt = 0;
  596. // 注意,这两个循环应该不能合并到一起,因为可能存在usb2端口offset在前,usb3端口在后的情况,那样的话就会出错
  597. // 循环启动所有的usb3端口
  598. for (int i = 0; i < xhci_hc[id].port_num; ++i)
  599. {
  600. if (XHCI_PORT_IS_USB3(id, i) && XHCI_PORT_IS_ACTIVE(id, i))
  601. {
  602. // reset该端口
  603. if (likely(xhci_reset_port(id, i) == 0)) // 如果端口reset成功,就获取它的描述符
  604. // 否则,reset函数会把它给设置为未激活,并且标志配对的usb2端口是激活的
  605. {
  606. // xhci_hc_get_descriptor(id, i);
  607. ++cnt;
  608. }
  609. }
  610. }
  611. kdebug("active usb3 ports:%d", cnt);
  612. // 循环启动所有的usb2端口
  613. for (int i = 0; i < xhci_hc[id].port_num; ++i)
  614. {
  615. if (XHCI_PORT_IS_USB2(id, i) && XHCI_PORT_IS_ACTIVE(id, i))
  616. {
  617. // reset该端口
  618. if (likely(xhci_reset_port(id, i) == 0)) // 如果端口reset成功,就获取它的描述符
  619. // 否则,reset函数会把它给设置为未激活,并且标志配对的usb2端口是激活的
  620. {
  621. // xhci_hc_get_descriptor(id, i);
  622. ++cnt;
  623. }
  624. }
  625. }
  626. kinfo("xHCI controller %d: Started %d ports.", id, cnt);
  627. }
  628. /**
  629. * @brief 初始化xhci主机控制器的中断控制
  630. *
  631. * @param id 主机控制器id
  632. * @return int 返回码
  633. */
  634. static int xhci_hc_init_intr(int id)
  635. {
  636. uint64_t retval = 0;
  637. struct xhci_caps_HCSPARAMS1_reg_t hcs1;
  638. struct xhci_caps_HCSPARAMS2_reg_t hcs2;
  639. memcpy(&hcs1, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
  640. memcpy(&hcs2, xhci_get_ptr_cap_reg32(id, XHCI_CAPS_HCSPARAMS2), sizeof(struct xhci_caps_HCSPARAMS2_reg_t));
  641. uint32_t max_segs = (1 << (uint32_t)(hcs2.ERST_Max));
  642. uint32_t max_interrupters = hcs1.max_intrs;
  643. // 创建 event ring
  644. retval = xhci_create_event_ring(4096, &xhci_hc[id].event_ring_vaddr);
  645. if (unlikely((int64_t)(retval) == -ENOMEM))
  646. return -ENOMEM;
  647. xhci_hc[id].event_ring_table_vaddr = retval;
  648. retval = 0;
  649. xhci_hc[id].current_event_ring_cycle = 1;
  650. // 写入第0个中断寄存器组
  651. xhci_write_intr_reg32(id, 0, XHCI_IR_MAN, 0x3); // 使能中断并清除pending位(这个pending位是写入1就清0的)
  652. xhci_write_intr_reg32(id, 0, XHCI_IR_MOD, 0); // 关闭中断管制
  653. xhci_write_intr_reg32(id, 0, XHCI_IR_TABLE_SIZE, 1); // 当前只有1个segment
  654. xhci_write_intr_reg64(id, 0, XHCI_IR_DEQUEUE, virt_2_phys(xhci_hc[id].event_ring_vaddr) | (1 << 3)); // 写入dequeue寄存器,并清除busy位(写1就会清除)
  655. xhci_write_intr_reg64(id, 0, XHCI_IR_TABLE_ADDR, virt_2_phys(xhci_hc[id].event_ring_table_vaddr)); // 写入table地址
  656. // 清除状态位
  657. xhci_write_op_reg32(id, XHCI_OPS_USBSTS, (1 << 10) | (1 << 4) | (1 << 3) | (1 << 2));
  658. // 开启usb中断
  659. // 注册中断处理程序
  660. struct xhci_hc_irq_install_info_t install_info;
  661. install_info.assert = 1;
  662. install_info.edge_trigger = 1;
  663. install_info.processor = 0; // 投递到bsp
  664. char *buf = (char *)kmalloc(16, 0);
  665. memset(buf, 0, 16);
  666. sprintk(buf, "xHCI HC%d", id);
  667. irq_register(xhci_controller_irq_num[id], &install_info, &xhci_hc_irq_handler, id, &xhci_hc_intr_controller, buf);
  668. kfree(buf);
  669. kdebug("xhci host controller %d: interrupt registered. irq num=%d", id, xhci_controller_irq_num[id]);
  670. return 0;
  671. }
  672. /**
  673. * @brief 初始化xhci控制器
  674. *
  675. * @param header 指定控制器的pci device头部
  676. */
  677. void xhci_init(struct pci_device_structure_general_device_t *dev_hdr)
  678. {
  679. if (xhci_ctrl_count >= XHCI_MAX_HOST_CONTROLLERS)
  680. {
  681. kerror("Initialize xhci controller failed: exceed the limit of max controllers.");
  682. return;
  683. }
  684. spin_lock(&xhci_controller_init_lock);
  685. kinfo("Initializing xhci host controller: bus=%#02x, device=%#02x, func=%#02x, VendorID=%#04x, irq_line=%d, irq_pin=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, dev_hdr->header.Vendor_ID, dev_hdr->Interrupt_Line, dev_hdr->Interrupt_PIN);
  686. int cid = xhci_hc_find_available_id();
  687. if (cid < 0)
  688. {
  689. kerror("Initialize xhci controller failed: exceed the limit of max controllers.");
  690. goto failed_exceed_max;
  691. }
  692. memset(&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
  693. xhci_hc[cid].controller_id = cid;
  694. xhci_hc[cid].pci_dev_hdr = dev_hdr;
  695. pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0x4, 0x0006); // mem I/O access enable and bus master enable
  696. // 为当前控制器映射寄存器地址空间
  697. xhci_hc[cid].vbase = SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + XHCI_MAPPING_OFFSET + 65536 * xhci_hc[cid].controller_id;
  698. // kdebug("dev_hdr->BAR0 & (~0xf)=%#018lx", dev_hdr->BAR0 & (~0xf));
  699. mm_map_phys_addr(xhci_hc[cid].vbase, dev_hdr->BAR0 & (~0xf), 65536, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD, true);
  700. // 读取xhci控制寄存器
  701. uint16_t iversion = *(uint16_t *)(xhci_hc[cid].vbase + XHCI_CAPS_HCIVERSION);
  702. struct xhci_caps_HCCPARAMS1_reg_t hcc1;
  703. struct xhci_caps_HCCPARAMS2_reg_t hcc2;
  704. struct xhci_caps_HCSPARAMS1_reg_t hcs1;
  705. struct xhci_caps_HCSPARAMS2_reg_t hcs2;
  706. memcpy(&hcc1, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCCPARAMS1), sizeof(struct xhci_caps_HCCPARAMS1_reg_t));
  707. memcpy(&hcc2, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCCPARAMS2), sizeof(struct xhci_caps_HCCPARAMS2_reg_t));
  708. memcpy(&hcs1, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCSPARAMS1), sizeof(struct xhci_caps_HCSPARAMS1_reg_t));
  709. memcpy(&hcs2, xhci_get_ptr_cap_reg32(cid, XHCI_CAPS_HCSPARAMS2), sizeof(struct xhci_caps_HCSPARAMS2_reg_t));
  710. // kdebug("hcc1.xECP=%#010lx", hcc1.xECP);
  711. // 计算operational registers的地址
  712. xhci_hc[cid].vbase_op = xhci_hc[cid].vbase + xhci_read_cap_reg8(cid, XHCI_CAPS_CAPLENGTH);
  713. xhci_hc[cid].db_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_DBOFF) & (~0x3); // bits [1:0] reserved
  714. xhci_hc[cid].rts_offset = xhci_read_cap_reg32(cid, XHCI_CAPS_RTSOFF) & (~0x1f); // bits [4:0] reserved.
  715. xhci_hc[cid].ext_caps_off = 1UL * (hcc1.xECP) * 4;
  716. xhci_hc[cid].context_size = (hcc1.csz) ? 64 : 32;
  717. if (iversion < 0x95)
  718. {
  719. kwarn("Unsupported/Unknowned xHCI controller version: %#06x. This may cause unexpected behavior.", iversion);
  720. }
  721. // if it is a Panther Point device, make sure sockets are xHCI controlled.
  722. if (((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0) & 0xffff) == 0x8086) &&
  723. ((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 2) & 0xffff) == 0x1E31) &&
  724. ((pci_read_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 8) & 0xff) == 4))
  725. {
  726. kdebug("Is a Panther Point device");
  727. pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd8, 0xffffffff);
  728. pci_write_config(dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func, 0xd0, 0xffffffff);
  729. }
  730. // 关闭legacy支持
  731. FAIL_ON_TO(xhci_hc_stop_legacy(cid), failed);
  732. // 重置xhci控制器
  733. FAIL_ON_TO(xhci_hc_reset(cid), failed);
  734. // 端口配对
  735. FAIL_ON_TO(xhci_hc_pair_ports(cid), failed);
  736. // ========== 设置USB host controller =========
  737. // 获取页面大小
  738. kdebug("ops pgsize=%#010lx", xhci_read_op_reg32(cid, XHCI_OPS_PAGESIZE));
  739. xhci_hc[cid].page_size = (xhci_read_op_reg32(cid, XHCI_OPS_PAGESIZE) & 0xffff) << 12;
  740. kdebug("page size=%d", xhci_hc[cid].page_size);
  741. // 获取设备上下文空间
  742. xhci_hc[cid].dcbaap_vaddr = (uint64_t)kmalloc(2048, 0); // 分配2KB的设备上下文地址数组空间
  743. memset((void *)xhci_hc[cid].dcbaap_vaddr, 0, 2048);
  744. kdebug("dcbaap_vaddr=%#018lx", xhci_hc[cid].dcbaap_vaddr);
  745. if (unlikely(!xhci_is_aligned64(xhci_hc[cid].dcbaap_vaddr))) // 地址不是按照64byte对齐
  746. {
  747. kerror("dcbaap isn't 64 byte aligned.");
  748. goto failed_free_dyn;
  749. }
  750. // 写入dcbaap
  751. xhci_write_op_reg64(cid, XHCI_OPS_DCBAAP, virt_2_phys(xhci_hc[cid].dcbaap_vaddr));
  752. // 创建command ring
  753. xhci_hc[cid].cmd_ring_vaddr = xhci_create_ring(XHCI_CMND_RING_TRBS);
  754. if (unlikely(!xhci_is_aligned64(xhci_hc[cid].cmd_ring_vaddr))) // 地址不是按照64byte对齐
  755. {
  756. kerror("cmd ring isn't 64 byte aligned.");
  757. goto failed_free_dyn;
  758. }
  759. // 设置初始cycle bit为1
  760. xhci_hc[cid].cmd_trb_cycle = XHCI_TRB_CYCLE_ON;
  761. // 写入command ring控制寄存器
  762. xhci_write_op_reg64(cid, XHCI_OPS_CRCR, virt_2_phys(xhci_hc[cid].cmd_ring_vaddr) | xhci_hc[cid].cmd_trb_cycle);
  763. // 写入配置寄存器
  764. uint32_t max_slots = hcs1.max_slots;
  765. kdebug("max slots = %d", max_slots);
  766. xhci_write_op_reg32(cid, XHCI_OPS_CONFIG, max_slots);
  767. // 写入设备通知控制寄存器
  768. xhci_write_op_reg32(cid, XHCI_OPS_DNCTRL, (1 << 1)); // 目前只有N1被支持
  769. FAIL_ON_TO(xhci_hc_init_intr(cid), failed_free_dyn);
  770. ++xhci_ctrl_count;
  771. spin_unlock(&xhci_controller_init_lock);
  772. return;
  773. failed_free_dyn:; // 释放动态申请的内存
  774. if (xhci_hc[cid].dcbaap_vaddr)
  775. kfree((void *)xhci_hc[cid].dcbaap_vaddr);
  776. if (xhci_hc[cid].cmd_ring_vaddr)
  777. kfree((void *)xhci_hc[cid].cmd_ring_vaddr);
  778. if (xhci_hc[cid].event_ring_table_vaddr)
  779. kfree((void *)xhci_hc[cid].event_ring_table_vaddr);
  780. if (xhci_hc[cid].event_ring_vaddr)
  781. kfree((void *)xhci_hc[cid].event_ring_vaddr);
  782. failed:;
  783. // 取消地址映射
  784. mm_unmap(xhci_hc[cid].vbase, 65536);
  785. // 清空数组
  786. memset((void *)&xhci_hc[cid], 0, sizeof(struct xhci_host_controller_t));
  787. failed_exceed_max:;
  788. kerror("Failed to initialize controller: bus=%d, dev=%d, func=%d", dev_hdr->header.bus, dev_hdr->header.device, dev_hdr->header.func);
  789. spin_unlock(&xhci_controller_init_lock);
  790. }