apic.c 23 KB

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  1. #include "apic.h"
  2. #include "../../../common/kprint.h"
  3. #include "../../../common/printk.h"
  4. #include "../../../common/cpu.h"
  5. #include "../../../common/glib.h"
  6. #include "../../../exception/gate.h"
  7. #include "../../acpi/acpi.h"
  8. #include <exception/softirq.h>
  9. #include <process/process.h>
  10. #include <sched/sched.h>
  11. // 导出定义在irq.c中的中段门表
  12. extern void (*interrupt_table[24])(void);
  13. bool flag_support_apic = false;
  14. bool flag_support_x2apic = false;
  15. uint local_apic_version;
  16. uint local_apic_max_LVT_entries;
  17. static struct acpi_Multiple_APIC_Description_Table_t *madt;
  18. static struct acpi_IO_APIC_Structure_t *io_apic_ICS;
  19. /**
  20. * @brief 初始化io_apic
  21. *
  22. */
  23. void apic_io_apic_init()
  24. {
  25. ul madt_addr;
  26. acpi_iter_SDT(acpi_get_MADT, &madt_addr);
  27. madt = (struct acpi_Multiple_APIC_Description_Table_t *)madt_addr;
  28. // kdebug("MADT->local intr controller addr=%#018lx", madt->Local_Interrupt_Controller_Address);
  29. // kdebug("MADT->length= %d bytes", madt->header.Length);
  30. // 寻找io apic的ICS
  31. void *ent = (void *)(madt_addr) + sizeof(struct acpi_Multiple_APIC_Description_Table_t);
  32. struct apic_Interrupt_Controller_Structure_header_t *header = (struct apic_Interrupt_Controller_Structure_header_t *)ent;
  33. while (header->length > 2)
  34. {
  35. header = (struct apic_Interrupt_Controller_Structure_header_t *)ent;
  36. if (header->type == 1)
  37. {
  38. struct acpi_IO_APIC_Structure_t *t = (struct acpi_IO_APIC_Structure_t *)ent;
  39. // kdebug("IO apic addr = %#018lx", t->IO_APIC_Address);
  40. io_apic_ICS = t;
  41. break;
  42. }
  43. ent += header->length;
  44. }
  45. // kdebug("Global_System_Interrupt_Base=%d", io_apic_ICS->Global_System_Interrupt_Base);
  46. apic_ioapic_map.addr_phys = io_apic_ICS->IO_APIC_Address;
  47. apic_ioapic_map.virtual_index_addr = (unsigned char *)APIC_IO_APIC_VIRT_BASE_ADDR;
  48. apic_ioapic_map.virtual_data_addr = (uint *)(APIC_IO_APIC_VIRT_BASE_ADDR + 0x10);
  49. apic_ioapic_map.virtual_EOI_addr = (uint *)(APIC_IO_APIC_VIRT_BASE_ADDR + 0x40);
  50. // kdebug("(ul)apic_ioapic_map.virtual_index_addr=%#018lx", (ul)apic_ioapic_map.virtual_index_addr);
  51. // 填写页表,完成地址映射
  52. mm_map_phys_addr((ul)apic_ioapic_map.virtual_index_addr, apic_ioapic_map.addr_phys, PAGE_2M_SIZE, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD);
  53. // 设置IO APIC ID 为0x0f000000
  54. *apic_ioapic_map.virtual_index_addr = 0x00;
  55. io_mfence();
  56. *apic_ioapic_map.virtual_data_addr = 0x0f000000;
  57. io_mfence();
  58. // kdebug("I/O APIC ID:%#010x", ((*apic_ioapic_map.virtual_data_addr) >> 24) & 0xff);
  59. io_mfence();
  60. // 获取IO APIC Version
  61. *apic_ioapic_map.virtual_index_addr = 0x01;
  62. io_mfence();
  63. kdebug("IO APIC Version=%d, Max Redirection Entries=%d", *apic_ioapic_map.virtual_data_addr & 0xff, (((*apic_ioapic_map.virtual_data_addr) >> 16) & 0xff) + 1);
  64. // 初始化RTE表项,将所有RTE表项屏蔽
  65. for (int i = 0x10; i < 0x40; i += 2)
  66. {
  67. // 以0x20为起始中断向量号,初始化RTE
  68. apic_ioapic_write_rte(i, 0x10020 + ((i - 0x10) >> 1));
  69. }
  70. // 不需要手动启动IO APIC,只要初始化了RTE寄存器之后,io apic就会自动启用了。
  71. // 而且不是每台电脑都有RCBA寄存器,因此不需要手动启用IO APIC
  72. /*
  73. // get RCBA address
  74. io_out32(0xcf8, 0x8000f8f0);
  75. uint x = io_in32(0xcfc);
  76. uint *p;
  77. printk_color(RED, BLACK, "Get RCBA Address:%#010x\n", x);
  78. x = x & 0xffffc000UL;
  79. printk_color(RED, BLACK, "Get RCBA Address:%#010x\n", x);
  80. // get OIC address
  81. if (x > 0xfec00000 && x < 0xfee00000)
  82. {
  83. p = (unsigned int *)(x + 0x31feUL-apic_ioapic_map.addr_phys+apic_ioapic_map.virtual_index_addr);
  84. }
  85. // enable IOAPIC
  86. x = (*p & 0xffffff00) | 0x100;
  87. io_mfence();
  88. *p = x;
  89. io_mfence();
  90. */
  91. }
  92. /**
  93. * @brief 初始化AP处理器的Local apic
  94. *
  95. */
  96. void apic_init_ap_core_local_apic()
  97. {
  98. kinfo("Initializing AP-core's local apic...");
  99. uint eax, edx;
  100. // 启用xAPIC 和x2APIC
  101. __asm__ __volatile__("movq $0x1b, %%rcx \n\t" // 读取IA32_APIC_BASE寄存器
  102. "rdmsr \n\t"
  103. "bts $10, %%rax \n\t"
  104. "bts $11, %%rax \n\t"
  105. "wrmsr \n\t"
  106. "movq $0x1b, %%rcx \n\t"
  107. "rdmsr \n\t"
  108. : "=a"(eax), "=d"(edx)::"memory");
  109. // kdebug("After enable xAPIC and x2APIC: edx=%#010x, eax=%#010x", edx, eax);
  110. // 检测是否成功启用xAPIC和x2APIC
  111. if (eax & 0xc00)
  112. kinfo("xAPIC & x2APIC enabled!");
  113. // 设置SVR寄存器,开启local APIC、禁止EOI广播
  114. // enable SVR[8]
  115. __asm__ __volatile__("movq $0x80f, %%rcx \n\t"
  116. "rdmsr \n\t"
  117. "bts $8, %%rax \n\t"
  118. // "bts $12, %%rax\n\t"
  119. "wrmsr \n\t"
  120. "movq $0x80f, %%rcx \n\t"
  121. "rdmsr \n\t"
  122. : "=a"(eax), "=d"(edx)
  123. :
  124. : "memory");
  125. if (eax & 0x100)
  126. printk_color(RED, YELLOW, "SVR[8] enabled\n");
  127. if (edx & 0x1000)
  128. printk_color(RED, YELLOW, "SVR[12] enabled\n");
  129. // get local APIC ID
  130. __asm__ __volatile__("movq $0x802, %%rcx \n\t"
  131. "rdmsr \n\t"
  132. : "=a"(eax), "=d"(edx)
  133. :
  134. : "memory");
  135. printk_color(RED, YELLOW, "x2APIC ID:%#010x\n", eax);
  136. // 由于尚未配置LVT对应的处理程序,因此先屏蔽所有的LVT
  137. // mask all LVT
  138. __asm__ __volatile__( //"movq $0x82f, %%rcx \n\t" //CMCI
  139. //"wrmsr \n\t"
  140. "movq $0x832, %%rcx \n\t" // Timer
  141. "wrmsr \n\t"
  142. "movq $0x833, %%rcx \n\t" // Thermal Monitor
  143. "wrmsr \n\t"
  144. "movq $0x834, %%rcx \n\t" // Performance Counter
  145. "wrmsr \n\t"
  146. "movq $0x835, %%rcx \n\t" // LINT0
  147. "wrmsr \n\t"
  148. "movq $0x836, %%rcx \n\t" // LINT1
  149. "wrmsr \n\t"
  150. "movq $0x837, %%rcx \n\t" // Error
  151. "wrmsr \n\t"
  152. :
  153. : "a"(0x10000), "d"(0x00)
  154. : "memory");
  155. /*
  156. io_mfence();
  157. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_CMCI) = 0x1000000;
  158. io_mfence();
  159. kdebug("cmci = %#018lx", *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_CMCI));
  160. */
  161. //*(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_TIMER) = 0x10000;
  162. // io_mfence();
  163. /*
  164. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_THERMAL) = 0x1000000;
  165. io_mfence();
  166. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_PERFORMANCE_MONITOR) = 0x1000000;
  167. io_mfence();
  168. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT0) = 0x1000000;
  169. io_mfence();
  170. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT1) = 0x1000000;
  171. io_mfence();
  172. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_ERROR) = 0x1000000;
  173. io_mfence();
  174. */
  175. kdebug("All LVT Masked");
  176. }
  177. /**
  178. * @brief 初始化local apic
  179. *
  180. */
  181. void apic_local_apic_init()
  182. {
  183. // 映射Local APIC 寄存器地址
  184. mm_map_phys_addr(APIC_LOCAL_APIC_VIRT_BASE_ADDR, 0xfee00000, PAGE_2M_SIZE, PAGE_KERNEL_PAGE | PAGE_PWT | PAGE_PCD);
  185. uint a, b, c, d;
  186. cpu_cpuid(1, 0, &a, &b, &c, &d);
  187. // kdebug("CPUID 0x01, eax:%#010lx, ebx:%#010lx, ecx:%#010lx, edx:%#010lx", a, b, c, d);
  188. // 判断是否支持APIC和xAPIC
  189. if ((1 << 9) & d)
  190. {
  191. flag_support_apic = true;
  192. kdebug("This computer support APIC&xAPIC");
  193. }
  194. else
  195. {
  196. flag_support_apic = false;
  197. kerror("This computer does not support APIC&xAPIC");
  198. while (1)
  199. ;
  200. }
  201. // 判断是否支持x2APIC
  202. if ((1 << 21) & c)
  203. {
  204. flag_support_x2apic = true;
  205. kdebug("This computer support x2APIC");
  206. }
  207. else
  208. {
  209. kerror("This computer does not support x2APIC");
  210. }
  211. uint eax, edx;
  212. // 启用xAPIC 和x2APIC
  213. __asm__ __volatile__("movq $0x1b, %%rcx \n\t" // 读取IA32_APIC_BASE寄存器
  214. "rdmsr \n\t"
  215. "bts $10, %%rax \n\t"
  216. "bts $11, %%rax \n\t"
  217. "wrmsr \n\t"
  218. "movq $0x1b, %%rcx \n\t"
  219. "rdmsr \n\t"
  220. : "=a"(eax), "=d"(edx)::"memory");
  221. // kdebug("After enable xAPIC and x2APIC: edx=%#010x, eax=%#010x", edx, eax);
  222. // 检测是否成功启用xAPIC和x2APIC
  223. if (eax & 0xc00)
  224. kinfo("xAPIC & x2APIC enabled!");
  225. /*
  226. io_mfence();
  227. uint *svr = (uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_SVR);
  228. uint tmp_svr = *svr;
  229. tmp_svr &= (~(1 << 12));
  230. tmp_svr |= (1 << 8);
  231. kdebug("tmp_svr = %#018lx", tmp_svr);
  232. io_mfence();
  233. *svr = tmp_svr;
  234. io_mfence();
  235. kdebug("svr = %#018lx", *svr);
  236. */
  237. // 设置SVR寄存器,开启local APIC、禁止EOI广播
  238. __asm__ __volatile__("movq $0x80f, %%rcx \n\t"
  239. "rdmsr \n\t"
  240. "bts $8, %%rax \n\t"
  241. // "bts $12, %%rax \n\t"
  242. "movq $0x80f, %%rcx \n\t"
  243. "wrmsr \n\t"
  244. "movq $0x80f , %%rcx \n\t"
  245. "rdmsr \n\t"
  246. : "=a"(eax), "=d"(edx)::"memory");
  247. /*
  248. //enable SVR[8]
  249. __asm__ __volatile__( "movq $0x80f, %%rcx \n\t"
  250. "rdmsr \n\t"
  251. "bts $8, %%rax \n\t"
  252. "bts $12,%%rax\n\t"
  253. "wrmsr \n\t"
  254. "movq $0x80f, %%rcx \n\t"
  255. "rdmsr \n\t"
  256. :"=a"(eax),"=d"(edx)
  257. :
  258. :"memory");
  259. */
  260. // kdebug("After setting SVR: edx=%#010x, eax=%#010x", edx, eax);
  261. if (eax & 0x100)
  262. kinfo("APIC Software Enabled.");
  263. if (eax & 0x1000)
  264. kinfo("EOI-Broadcast Suppression Enabled.");
  265. // 获取Local APIC的基础信息 (参见英特尔开发手册Vol3A 10-39)
  266. // Table 10-6. Local APIC Register Address Map Supported by x2APIC
  267. // 获取 Local APIC ID
  268. // 0x802处是x2APIC ID 位宽32bits 的 Local APIC ID register
  269. /*
  270. __asm__ __volatile__("movq $0x802, %%rcx \n\t"
  271. "rdmsr \n\t"
  272. : "=a"(eax), "=d"(edx)::"memory");
  273. */
  274. // kdebug("get Local APIC ID: edx=%#010x, eax=%#010x", edx, eax);
  275. // kdebug("local_apic_id=%#018lx", *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_ID));
  276. // 获取Local APIC Version
  277. // 0x803处是 Local APIC Version register
  278. __asm__ __volatile__("movq $0x803, %%rcx \n\t"
  279. "rdmsr \n\t"
  280. : "=a"(eax), "=d"(edx)::"memory");
  281. local_apic_max_LVT_entries = ((eax >> 16) & 0xff) + 1;
  282. local_apic_version = eax & 0xff;
  283. kdebug("local APIC Version:%#010x,Max LVT Entry:%#010x,SVR(Suppress EOI Broadcast):%#04x\t", local_apic_version, local_apic_max_LVT_entries, (eax >> 24) & 0x1);
  284. if ((eax & 0xff) < 0x10)
  285. {
  286. kdebug("82489DX discrete APIC");
  287. }
  288. else if (((eax & 0xff) >= 0x10) && ((eax & 0xff) <= 0x15))
  289. kdebug("Integrated APIC.");
  290. // 由于尚未配置LVT对应的处理程序,因此先屏蔽所有的LVT
  291. // mask all LVT
  292. __asm__ __volatile__( //"movq $0x82f, %%rcx \n\t" //CMCI
  293. //"wrmsr \n\t"
  294. "movq $0x832, %%rcx \n\t" // Timer
  295. "wrmsr \n\t"
  296. "movq $0x833, %%rcx \n\t" // Thermal Monitor
  297. "wrmsr \n\t"
  298. "movq $0x834, %%rcx \n\t" // Performance Counter
  299. "wrmsr \n\t"
  300. "movq $0x835, %%rcx \n\t" // LINT0
  301. "wrmsr \n\t"
  302. "movq $0x836, %%rcx \n\t" // LINT1
  303. "wrmsr \n\t"
  304. "movq $0x837, %%rcx \n\t" // Error
  305. "wrmsr \n\t"
  306. :
  307. : "a"(0x10000), "d"(0x00)
  308. : "memory");
  309. /*
  310. io_mfence();
  311. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_CMCI) = 0x1000000;
  312. io_mfence();
  313. kdebug("cmci = %#018lx", *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_CMCI));
  314. */
  315. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_TIMER) = 0x10000;
  316. io_mfence();
  317. /*
  318. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_THERMAL) = 0x1000000;
  319. io_mfence();
  320. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_PERFORMANCE_MONITOR) = 0x1000000;
  321. io_mfence();
  322. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT0) = 0x1000000;
  323. io_mfence();
  324. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT1) = 0x1000000;
  325. io_mfence();
  326. *(uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_ERROR) = 0x1000000;
  327. io_mfence();
  328. */
  329. kdebug("All LVT Masked");
  330. /*
  331. // 获取TPR寄存器的值
  332. __asm__ __volatile__("movq $0x808, %%rcx \n\t"
  333. "rdmsr \n\t"
  334. : "=a"(eax), "=d"(edx)::"memory");
  335. kdebug("LVT_TPR=%#010x", eax);
  336. // 获取PPR寄存器的值
  337. __asm__ __volatile__("movq $0x80a, %%rcx \n\t"
  338. "rdmsr \n\t"
  339. : "=a"(eax), "=d"(edx)::"memory");
  340. kdebug("LVT_PPR=%#010x", eax);
  341. */
  342. }
  343. /**
  344. * @brief 初始化apic控制器
  345. *
  346. */
  347. void apic_init()
  348. {
  349. // 初始化中断门, 中断使用rsp0防止在软中断时发生嵌套,然后处理器重新加载导致数据被抹掉
  350. for (int i = 32; i <= 55; ++i)
  351. set_intr_gate(i, 0, interrupt_table[i - 32]);
  352. // 初始化主芯片
  353. io_out8(0x20, 0x11); // 初始化主芯片的icw1
  354. io_out8(0x21, 0x20); // 设置主芯片的中断向量号为0x20(0x20-0x27)
  355. io_out8(0x21, 0x04); // 设置int2端口级联从芯片
  356. io_out8(0x21, 0x01); // 设置为AEOI模式、FNM、无缓冲
  357. // 初始化从芯片
  358. io_out8(0xa0, 0x11);
  359. io_out8(0xa1, 0x28); // 设置从芯片的中断向量号为0x28(0x28-0x2f)
  360. io_out8(0xa1, 0x02); // 设置从芯片连接到主芯片的int2
  361. io_out8(0xa1, 0x01);
  362. // 屏蔽类8259A芯片
  363. io_mfence();
  364. io_out8(0x21, 0xff);
  365. io_mfence();
  366. io_out8(0xa1, 0xff);
  367. io_mfence();
  368. kdebug("8259A Masked.");
  369. // enable IMCR
  370. io_out8(0x22, 0x70);
  371. io_out8(0x23, 0x01);
  372. apic_local_apic_init();
  373. apic_io_apic_init();
  374. // get RCBA address
  375. io_out32(0xcf8, 0x8000f8f0);
  376. uint32_t RCBA_phys = io_in32(0xcfc);
  377. // 获取RCBA寄存器的地址
  378. if (RCBA_phys > 0xfec00000 && RCBA_phys < 0xfee00000)
  379. RCBA_vaddr = SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + RCBA_phys;
  380. else
  381. {
  382. RCBA_vaddr = 0;
  383. kwarn("Cannot get RCBA address. RCBA_phys=%#010lx", RCBA_phys);
  384. }
  385. sti();
  386. }
  387. /**
  388. * @brief 中断服务程序
  389. *
  390. * @param rsp 中断栈指针
  391. * @param number 中断向量号
  392. */
  393. void do_IRQ(struct pt_regs *rsp, ul number)
  394. {
  395. if (number < 0x80) // 以0x80为界限,低于0x80的是外部中断控制器,高于0x80的是Local APIC
  396. // 外部中断控制器
  397. {
  398. irq_desc_t *irq = &interrupt_desc[number - 32];
  399. // 执行中断上半部处理程序
  400. if (irq->handler != NULL)
  401. irq->handler(number, irq->parameter, rsp);
  402. else
  403. kwarn("Intr vector [%d] does not have a handler!");
  404. // 向中断控制器发送应答消息
  405. if (irq->controller != NULL && irq->controller->ack != NULL)
  406. irq->controller->ack(number);
  407. else
  408. {
  409. // 向EOI寄存器写入0x00表示结束中断
  410. __asm__ __volatile__("movq $0x00, %%rdx \n\t"
  411. "movq $0x00, %%rax \n\t"
  412. "movq $0x80b, %%rcx \n\t"
  413. "wrmsr \n\t" ::
  414. : "memory");
  415. }
  416. }
  417. else if (number == 0x80) // 系统调用
  418. {
  419. // ps: 当前已经将系统调用直接使用系统调用门实现,不走这里。。
  420. do_syscall_int(rsp, 0);
  421. }
  422. else if (number > 0x80)
  423. {
  424. // printk_color(RED, BLACK, "SMP IPI [ %d ]\n", number);
  425. apic_local_apic_edge_ack(number);
  426. {
  427. irq_desc_t *irq = &SMP_IPI_desc[number - 200];
  428. if (irq->handler != NULL)
  429. irq->handler(number, irq->parameter, rsp);
  430. }
  431. }
  432. else
  433. {
  434. kwarn("do IRQ receive: %d", number);
  435. }
  436. kdebug("before softirq");
  437. // 检测是否有未处理的软中断
  438. if (softirq_status != 0)
  439. do_softirq();
  440. kdebug("after softirq");
  441. // 检测当前进程是否持有自旋锁,若持有自旋锁,则不进行抢占式的进程调度
  442. if (current_pcb->preempt_count > 0)
  443. return;
  444. else if (current_pcb->preempt_count < 0)
  445. kBUG("current_pcb->preempt_count<0! pid=%d", current_pcb->pid); // should not be here
  446. // 检测当前进程是否可被调度
  447. if (current_pcb->flags & PROC_NEED_SCHED)
  448. {
  449. kdebug("to sched");
  450. sched_cfs();
  451. }
  452. }
  453. /**
  454. * @brief 读取RTE寄存器
  455. * 由于RTE位宽为64位而IO window寄存器只有32位,因此需要两次读取
  456. * @param index 索引值
  457. * @return ul
  458. */
  459. ul apic_ioapic_read_rte(unsigned char index)
  460. {
  461. // 由于处理器的乱序执行的问题,需要加入内存屏障以保证结果的正确性。
  462. ul ret;
  463. // 先读取高32bit
  464. *apic_ioapic_map.virtual_index_addr = index + 1;
  465. io_mfence();
  466. ret = *apic_ioapic_map.virtual_data_addr;
  467. ret <<= 32;
  468. io_mfence();
  469. // 读取低32bit
  470. *apic_ioapic_map.virtual_index_addr = index;
  471. io_mfence();
  472. ret |= *apic_ioapic_map.virtual_data_addr;
  473. io_mfence();
  474. return ret;
  475. }
  476. /**
  477. * @brief 写入RTE寄存器
  478. *
  479. * @param index 索引值
  480. * @param value 要写入的值
  481. */
  482. void apic_ioapic_write_rte(unsigned char index, ul value)
  483. {
  484. // 先写入低32bit
  485. *apic_ioapic_map.virtual_index_addr = index;
  486. io_mfence();
  487. *apic_ioapic_map.virtual_data_addr = value & 0xffffffff;
  488. io_mfence();
  489. // 再写入高32bit
  490. value >>= 32;
  491. io_mfence();
  492. *apic_ioapic_map.virtual_index_addr = index + 1;
  493. io_mfence();
  494. *apic_ioapic_map.virtual_data_addr = value & 0xffffffff;
  495. io_mfence();
  496. }
  497. // =========== 中断控制操作接口 ============
  498. void apic_ioapic_enable(ul irq_num)
  499. {
  500. ul index = 0x10 + ((irq_num - 32) << 1);
  501. ul value = apic_ioapic_read_rte(index);
  502. value &= (~0x10000UL);
  503. apic_ioapic_write_rte(index, value);
  504. }
  505. void apic_ioapic_disable(ul irq_num)
  506. {
  507. ul index = 0x10 + ((irq_num - 32) << 1);
  508. ul value = apic_ioapic_read_rte(index);
  509. value |= (0x10000UL);
  510. apic_ioapic_write_rte(index, value);
  511. }
  512. ul apic_ioapic_install(ul irq_num, void *arg)
  513. {
  514. struct apic_IO_APIC_RTE_entry *entry = (struct apic_IO_APIC_RTE_entry *)arg;
  515. // RTE表项值写入对应的RTE寄存器
  516. apic_ioapic_write_rte(0x10 + ((irq_num - 32) << 1), *(ul *)entry);
  517. return 0;
  518. }
  519. void apic_ioapic_uninstall(ul irq_num)
  520. {
  521. // 将对应的RTE表项设置为屏蔽状态
  522. apic_ioapic_write_rte(0x10 + ((irq_num - 32) << 1), 0x10000UL);
  523. }
  524. void apic_ioapic_level_ack(ul irq_num) // 电平触发
  525. {
  526. // 向EOI寄存器写入0x00表示结束中断
  527. /*io_mfence();
  528. uint *eoi = (uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_EOI);
  529. *eoi = 0x00;
  530. io_mfence(); */
  531. __asm__ __volatile__("movq $0x00, %%rdx \n\t"
  532. "movq $0x00, %%rax \n\t"
  533. "movq $0x80b, %%rcx \n\t"
  534. "wrmsr \n\t" ::
  535. : "memory");
  536. *apic_ioapic_map.virtual_EOI_addr = irq_num;
  537. }
  538. void apic_ioapic_edge_ack(ul irq_num) // 边沿触发
  539. {
  540. // 向EOI寄存器写入0x00表示结束中断
  541. /*
  542. uint *eoi = (uint *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_EOI);
  543. *eoi = 0x00;
  544. */
  545. __asm__ __volatile__("movq $0x00, %%rdx \n\t"
  546. "movq $0x00, %%rax \n\t"
  547. "movq $0x80b, %%rcx \n\t"
  548. "wrmsr \n\t" ::
  549. : "memory");
  550. }
  551. /**
  552. * @brief local apic 边沿触发应答
  553. *
  554. * @param irq_num
  555. */
  556. void apic_local_apic_edge_ack(ul irq_num)
  557. {
  558. // 向EOI寄存器写入0x00表示结束中断
  559. __asm__ __volatile__("movq $0x00, %%rdx \n\t"
  560. "movq $0x00, %%rax \n\t"
  561. "movq $0x80b, %%rcx \n\t"
  562. "wrmsr \n\t" ::
  563. : "memory");
  564. }
  565. /**
  566. * @brief 读取指定类型的 Interrupt Control Structure
  567. *
  568. * @param type ics的类型
  569. * @param ret_vaddr 对应的ICS的虚拟地址数组
  570. * @param total 返回数组的元素总个数
  571. * @return uint
  572. */
  573. uint apic_get_ics(const uint type, ul ret_vaddr[], uint *total)
  574. {
  575. void *ent = (void *)(madt) + sizeof(struct acpi_Multiple_APIC_Description_Table_t);
  576. struct apic_Interrupt_Controller_Structure_header_t *header = (struct apic_Interrupt_Controller_Structure_header_t *)ent;
  577. bool flag = false;
  578. uint cnt = 0;
  579. while (header->length > 2)
  580. {
  581. header = (struct apic_Interrupt_Controller_Structure_header_t *)ent;
  582. if (header->type == type)
  583. {
  584. ret_vaddr[cnt++] = (ul)ent;
  585. flag = true;
  586. }
  587. ent += header->length;
  588. }
  589. *total = cnt;
  590. if (!flag)
  591. return APIC_E_NOTFOUND;
  592. else
  593. return APIC_SUCCESS;
  594. }
  595. /**
  596. * @brief 构造RTE Entry结构体
  597. *
  598. * @param entry 返回的结构体
  599. * @param vector 中断向量
  600. * @param deliver_mode 投递模式
  601. * @param dest_mode 目标模式
  602. * @param deliver_status 投递状态
  603. * @param polarity 电平触发极性
  604. * @param irr 远程IRR标志位(只读)
  605. * @param trigger 触发模式
  606. * @param mask 屏蔽标志位,(0为未屏蔽, 1为已屏蔽)
  607. * @param dest_apicID 目标apicID
  608. */
  609. void apic_make_rte_entry(struct apic_IO_APIC_RTE_entry *entry, uint8_t vector, uint8_t deliver_mode, uint8_t dest_mode,
  610. uint8_t deliver_status, uint8_t polarity, uint8_t irr, uint8_t trigger, uint8_t mask, uint8_t dest_apicID)
  611. {
  612. entry->vector = vector;
  613. entry->deliver_mode = deliver_mode;
  614. entry->dest_mode = dest_mode;
  615. entry->deliver_status = deliver_status;
  616. entry->polarity = polarity;
  617. entry->remote_IRR = irr;
  618. entry->trigger_mode = trigger;
  619. entry->mask = mask;
  620. entry->reserved = 0;
  621. if (dest_mode == DEST_PHYSICAL)
  622. {
  623. entry->destination.physical.phy_dest = dest_apicID;
  624. entry->destination.physical.reserved1 = 0;
  625. entry->destination.physical.reserved2 = 0;
  626. }
  627. else
  628. {
  629. entry->destination.logical.logical_dest = dest_apicID;
  630. entry->destination.logical.reserved1 = 0;
  631. }
  632. }