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- #include "msi.h"
- #include "pci.h"
- #include <common/errno.h>
- extern struct msi_msg_t *msi_arch_get_msg(struct msi_desc_t *msi_desc);
- int pci_enable_msi(struct msi_desc_t *msi_desc)
- {
- struct pci_device_structure_header_t *ptr = msi_desc->pci_dev;
- uint32_t cap_ptr;
- uint32_t tmp;
- uint16_t message_control;
- uint64_t message_addr;
-
- if (msi_desc->pci.msi_attribute.is_msix)
- {
- cap_ptr = pci_enumerate_capability_list(ptr, 0x11);
- if (((int32_t)cap_ptr) < 0)
- {
- cap_ptr = pci_enumerate_capability_list(ptr, 0x05);
- if (((int32_t)cap_ptr) < 0)
- return -ENOSYS;
- msi_desc->pci.msi_attribute.is_msix = 0;
- }
- }
- else
- {
- cap_ptr = pci_enumerate_capability_list(ptr, 0x05);
- if (((int32_t)cap_ptr) < 0)
- return -ENOSYS;
- msi_desc->pci.msi_attribute.is_msix = 0;
- }
-
- msi_arch_get_msg(msi_desc);
- if (msi_desc->pci.msi_attribute.is_msix)
- {
- }
- else
- {
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- message_control = (tmp >> 16) & 0xffff;
-
- message_addr = ((((uint64_t)msi_desc->msg.address_hi) << 32) | msi_desc->msg.address_lo);
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr + 0x4, (uint32_t)(message_addr & 0xffffffff));
- if (message_control & (1 << 7))
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr + 0x8, (uint32_t)((message_addr >> 32) & 0xffffffff));
-
- tmp = msi_desc->msg.data;
- if (message_control & (1 << 7))
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr + 0xc, tmp);
- else
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr + 0x8, tmp);
-
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- tmp |= (1 << 16);
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr, tmp);
- }
- return 0;
- }
- int pci_start_msi(void *header)
- {
- struct pci_device_structure_header_t *ptr = (struct pci_device_structure_header_t *)header;
- uint32_t cap_ptr;
- uint32_t tmp;
- switch (ptr->HeaderType)
- {
- case 0x00:
- if (!(ptr->Status & 0x10))
- return -ENOSYS;
- cap_ptr = ((struct pci_device_structure_general_device_t *)ptr)->Capabilities_Pointer;
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- if (tmp & 0xff != 0x5)
- return -ENOSYS;
-
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- tmp |= (1 << 16);
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr, tmp);
- break;
- case 0x01:
- if (!(ptr->Status & 0x10))
- return -ENOSYS;
- cap_ptr = ((struct pci_device_structure_pci_to_pci_bridge_t *)ptr)->Capability_Pointer;
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- if (tmp & 0xff != 0x5)
- return -ENOSYS;
-
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- tmp |= (1 << 16);
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr, tmp);
- break;
- case 0x02:
- return -ENOSYS;
- break;
- default:
- return -EINVAL;
- break;
- }
- return 0;
- }
- int pci_disable_msi(void *header)
- {
- struct pci_device_structure_header_t *ptr = (struct pci_device_structure_header_t *)header;
- uint32_t cap_ptr;
- uint32_t tmp;
- switch (ptr->HeaderType)
- {
- case 0x00:
- if (!(ptr->Status & 0x10))
- return -ENOSYS;
- cap_ptr = ((struct pci_device_structure_general_device_t *)ptr)->Capabilities_Pointer;
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- if (tmp & 0xff != 0x5)
- return -ENOSYS;
-
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- tmp &= (~(1 << 16));
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr, tmp);
- break;
- case 0x01:
- if (!(ptr->Status & 0x10))
- return -ENOSYS;
- cap_ptr = ((struct pci_device_structure_pci_to_pci_bridge_t *)ptr)->Capability_Pointer;
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- if (tmp & 0xff != 0x5)
- return -ENOSYS;
-
- tmp = pci_read_config(ptr->bus, ptr->device, ptr->func, cap_ptr);
- tmp &= (~(1 << 16));
- pci_write_config(ptr->bus, ptr->device, ptr->func, cap_ptr, tmp);
- break;
- case 0x02:
- return -ENOSYS;
- break;
- default:
- return -EINVAL;
- break;
- }
- return 0;
- }
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