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- #pragma once
- #include "../../../common/asm.h"
- #include "../../../process/ptrace.h"
- #include "../../../exception/irq.h"
- #include "../../../mm/mm.h"
- #define APIC_SUCCESS 0
- #define APIC_E_NOTFOUND 1
- #define APIC_IO_APIC_VIRT_BASE_ADDR SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + IO_APIC_MAPPING_OFFSET
- #define APIC_LOCAL_APIC_VIRT_BASE_ADDR SPECIAL_MEMOEY_MAPPING_VIRT_ADDR_BASE + LOCAL_APIC_MAPPING_OFFSET
- #define LOCAL_APIC_OFFSET_Local_APIC_ID 0x20
- #define LOCAL_APIC_OFFSET_Local_APIC_Version 0x30
- #define LOCAL_APIC_OFFSET_Local_APIC_TPR 0x80
- #define LOCAL_APIC_OFFSET_Local_APIC_APR 0x90
- #define LOCAL_APIC_OFFSET_Local_APIC_PPR 0xa0
- #define LOCAL_APIC_OFFSET_Local_APIC_EOI 0xb0
- #define LOCAL_APIC_OFFSET_Local_APIC_RRD 0xc0
- #define LOCAL_APIC_OFFSET_Local_APIC_LDR 0xd0
- #define LOCAL_APIC_OFFSET_Local_APIC_DFR 0xe0
- #define LOCAL_APIC_OFFSET_Local_APIC_SVR 0xf0
- #define LOCAL_APIC_OFFSET_Local_APIC_ISR_31_0 0x100
- #define LOCAL_APIC_OFFSET_Local_APIC_ISR_63_32 0x110
- #define LOCAL_APIC_OFFSET_Local_APIC_ISR_95_64 0x120
- #define LOCAL_APIC_OFFSET_Local_APIC_ISR_127_96 0x130
- #define LOCAL_APIC_OFFSET_Local_APIC_ISR_159_128 0x140
- #define LOCAL_APIC_OFFSET_Local_APIC_ISR_191_160 0x150
- #define LOCAL_APIC_OFFSET_Local_APIC_ISR_223_192 0x160
- #define LOCAL_APIC_OFFSET_Local_APIC_ISR_255_224 0x170
- #define LOCAL_APIC_OFFSET_Local_APIC_TMR_31_0 0x180
- #define LOCAL_APIC_OFFSET_Local_APIC_TMR_63_32 0x190
- #define LOCAL_APIC_OFFSET_Local_APIC_TMR_95_64 0x1a0
- #define LOCAL_APIC_OFFSET_Local_APIC_TMR_127_96 0x1b0
- #define LOCAL_APIC_OFFSET_Local_APIC_TMR_159_128 0x1c0
- #define LOCAL_APIC_OFFSET_Local_APIC_TMR_191_160 0x1d0
- #define LOCAL_APIC_OFFSET_Local_APIC_TMR_223_192 0x1e0
- #define LOCAL_APIC_OFFSET_Local_APIC_TMR_255_224 0x1f0
- #define LOCAL_APIC_OFFSET_Local_APIC_IRR_31_0 0x200
- #define LOCAL_APIC_OFFSET_Local_APIC_IRR_63_32 0x210
- #define LOCAL_APIC_OFFSET_Local_APIC_IRR_95_64 0x220
- #define LOCAL_APIC_OFFSET_Local_APIC_IRR_127_96 0x230
- #define LOCAL_APIC_OFFSET_Local_APIC_IRR_159_128 0x240
- #define LOCAL_APIC_OFFSET_Local_APIC_IRR_191_160 0x250
- #define LOCAL_APIC_OFFSET_Local_APIC_IRR_223_192 0x260
- #define LOCAL_APIC_OFFSET_Local_APIC_IRR_255_224 0x270
- #define LOCAL_APIC_OFFSET_Local_APIC_ESR 0x280
- #define LOCAL_APIC_OFFSET_Local_APIC_LVT_CMCI 0x2f0
- #define LOCAL_APIC_OFFSET_Local_APIC_ICR_31_0 0x300
- #define LOCAL_APIC_OFFSET_Local_APIC_ICR_63_32 0x310
- #define LOCAL_APIC_OFFSET_Local_APIC_LVT_TIMER 0x320
- #define LOCAL_APIC_OFFSET_Local_APIC_LVT_THERMAL 0x330
- #define LOCAL_APIC_OFFSET_Local_APIC_LVT_PERFORMANCE_MONITOR 0x340
- #define LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT0 0x350
- #define LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT1 0x360
- #define LOCAL_APIC_OFFSET_Local_APIC_LVT_ERROR 0x370
- #define LOCAL_APIC_OFFSET_Local_APIC_INITIAL_COUNT_REG 0x380
- #define LOCAL_APIC_OFFSET_Local_APIC_CURRENT_COUNT_REG 0x390
- #define LOCAL_APIC_OFFSET_Local_APIC_CLKDIV 0x3e0
- uint32_t RCBA_vaddr = 0;
- struct apic_LVT
- {
- uint vector : 8,
- delivery_mode : 3,
- reserved_1 : 1,
- delivery_status : 1,
- polarity : 1,
- remote_IRR : 1,
- trigger_mode : 1,
- mask : 1,
- timer_mode : 2,
- reserved_2 : 13;
- } __attribute((packed));
- struct INT_CMD_REG
- {
- unsigned int vector : 8,
- deliver_mode : 3,
- dest_mode : 1,
- deliver_status : 1,
- res_1 : 1,
- level : 1,
- trigger : 1,
- res_2 : 2,
- dest_shorthand : 2,
- res_3 : 12;
- union
- {
- struct
- {
- unsigned int res_4 : 24,
- dest_field : 8;
- } apic_destination;
- unsigned int x2apic_destination;
- } destination;
- } __attribute__((packed));
- struct apic_IO_APIC_RTE_entry
- {
- unsigned int vector : 8,
- deliver_mode : 3,
- dest_mode : 1,
- deliver_status : 1,
- polarity : 1,
- remote_IRR : 1,
- trigger_mode : 1,
- mask : 1,
- reserved : 15;
- union
- {
-
- struct
- {
- unsigned int reserved1 : 24,
- phy_dest : 4,
- reserved2 : 4;
- } physical;
-
- struct
- {
- unsigned int reserved1 : 24,
- logical_dest : 8;
- } logical;
- } destination;
- } __attribute__((packed));
- #define LOCAL_APIC_FIXED 0
- #define IO_APIC_FIXED 0
- #define ICR_APIC_FIXED 0
- #define IO_APIC_Lowest_Priority 1
- #define ICR_Lowest_Priority 1
- #define LOCAL_APIC_SMI 2
- #define APIC_SMI 2
- #define ICR_SMI 2
- #define LOCAL_APIC_NMI 4
- #define APIC_NMI 4
- #define ICR_NMI 4
- #define LOCAL_APIC_INIT 5
- #define APIC_INIT 5
- #define ICR_INIT 5
- #define ICR_Start_up 6
- #define IO_APIC_ExtINT 7
- #define APIC_LVT_Timer_One_Shot 0
- #define APIC_LVT_Timer_Periodic 1
- #define APIC_LVT_Timer_TSC_Deadline 2
- #define UNMASKED 0
- #define MASKED 1
- #define EDGE_TRIGGER 0
- #define Level_TRIGGER 1
- #define IDLE 0
- #define SEND_PENDING 1
- #define ICR_No_Shorthand 0
- #define ICR_Self 1
- #define ICR_ALL_INCLUDE_Self 2
- #define ICR_ALL_EXCLUDE_Self 3
- #define DEST_PHYSICAL 0
- #define DEST_LOGIC 1
- #define ICR_LEVEL_DE_ASSERT 0
- #define ICR_LEVEL_ASSERT 1
- #define IRR_RESET 0
- #define IRR_ACCEPT 1
- #define POLARITY_HIGH 0
- #define POLARITY_LOW 1
- struct apic_IO_APIC_map
- {
-
- uint addr_phys;
-
- unsigned char *virtual_index_addr;
-
- uint *virtual_data_addr;
-
- uint *virtual_EOI_addr;
- } apic_ioapic_map;
- void do_IRQ(struct pt_regs *rsp, ul number);
- ul apic_ioapic_read_rte(unsigned char index);
- void apic_ioapic_write_rte(unsigned char index, ul value);
- void apic_init_ap_core_local_apic();
- void apic_init();
- uint apic_get_ics(const uint type, ul ret_vaddr[], uint *total);
- void apic_ioapic_enable(ul irq_num);
- void apic_ioapic_disable(ul irq_num);
- ul apic_ioapic_install(ul irq_num, void *arg);
- void apic_ioapic_uninstall(ul irq_num);
- void apic_ioapic_level_ack(ul irq_num);
- void apic_ioapic_edge_ack(ul irq_num);
- void apic_local_apic_edge_ack(ul irq_num);
- void apic_make_rte_entry(struct apic_IO_APIC_RTE_entry *entry, uint8_t vector, uint8_t deliver_mode, uint8_t dest_mode,
- uint8_t deliver_status, uint8_t polarity, uint8_t irr, uint8_t trigger, uint8_t mask, uint8_t dest_apicID);
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