efi_pxe.h 47 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743
  1. #ifndef _EFI_PXE_H
  2. #define _EFI_PXE_H
  3. /*++
  4. Copyright (c) Intel 1999
  5. Module name:
  6. efi_pxe.h
  7. 32/64-bit PXE specification:
  8. alpha-4, 99-Dec-17
  9. Abstract:
  10. This header file contains all of the PXE type definitions,
  11. structure prototypes, global variables and constants that
  12. are needed for porting PXE to EFI.
  13. --*/
  14. #pragma pack(1)
  15. #define PXE_INTEL_ORDER 1 // Intel order
  16. //#define PXE_NETWORK_ORDER 1 // network order
  17. #define PXE_UINT64_SUPPORT 1 // UINT64 supported
  18. //#define PXE_NO_UINT64_SUPPORT 1 // UINT64 not supported
  19. #define PXE_BUSTYPE(a,b,c,d) \
  20. ((((PXE_UINT32)(d) & 0xFF) << 24) | \
  21. (((PXE_UINT32)(c) & 0xFF) << 16) | \
  22. (((PXE_UINT32)(b) & 0xFF) << 8) | \
  23. ((PXE_UINT32)(a) & 0xFF))
  24. //
  25. // UNDI ROM ID and devive ID signature
  26. //
  27. #define PXE_BUSTYPE_PXE PXE_BUSTYPE('!', 'P', 'X', 'E')
  28. //
  29. // BUS ROM ID signatures
  30. //
  31. #define PXE_BUSTYPE_PCI PXE_BUSTYPE('P', 'C', 'I', 'R')
  32. #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE('P', 'C', 'C', 'R')
  33. #define PXE_BUSTYPE_USB PXE_BUSTYPE('U', 'S', 'B', 'R')
  34. #define PXE_BUSTYPE_1394 PXE_BUSTYPE('1', '3', '9', '4')
  35. #define PXE_SWAP_UINT16(n) \
  36. ((((PXE_UINT16)(n) & 0x00FF) << 8) | \
  37. (((PXE_UINT16)(n) & 0xFF00) >> 8))
  38. #define PXE_SWAP_UINT32(n) \
  39. ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \
  40. (((PXE_UINT32)(n) & 0x0000FF00) << 8) | \
  41. (((PXE_UINT32)(n) & 0x00FF0000) >> 8) | \
  42. (((PXE_UINT32)(n) & 0xFF000000) >> 24))
  43. #if PXE_UINT64_SUPPORT != 0
  44. #define PXE_SWAP_UINT64(n) \
  45. ((((PXE_UINT64)(n) & 0x00000000000000FF) << 56) | \
  46. (((PXE_UINT64)(n) & 0x000000000000FF00) << 40) | \
  47. (((PXE_UINT64)(n) & 0x0000000000FF0000) << 24) | \
  48. (((PXE_UINT64)(n) & 0x00000000FF000000) << 8) | \
  49. (((PXE_UINT64)(n) & 0x000000FF00000000) >> 8) | \
  50. (((PXE_UINT64)(n) & 0x0000FF0000000000) >> 24) | \
  51. (((PXE_UINT64)(n) & 0x00FF000000000000) >> 40) | \
  52. (((PXE_UINT64)(n) & 0xFF00000000000000) >> 56))
  53. #endif // PXE_UINT64_SUPPORT
  54. #if PXE_NO_UINT64_SUPPORT != 0
  55. #define PXE_SWAP_UINT64(n) \
  56. { \
  57. PXE_UINT32 tmp = (PXE_UINT64)(n)[1]; \
  58. (PXE_UINT64)(n)[1] = PXE_SWAP_UINT32((PXE_UINT64)(n)[0]); \
  59. (PXE_UINT64)(n)[0] = tmp; \
  60. }
  61. #endif // PXE_NO_UINT64_SUPPORT
  62. #define PXE_CPBSIZE_NOT_USED 0 // zero
  63. #define PXE_DBSIZE_NOT_USED 0 // zero
  64. #define PXE_CPBADDR_NOT_USED (PXE_UINT64)0 // zero
  65. #define PXE_DBADDR_NOT_USED (PXE_UINT64)0 // zero
  66. #define PXE_CONST const
  67. #define PXE_VOLATILE volatile
  68. typedef void PXE_VOID;
  69. typedef unsigned char PXE_UINT8;
  70. typedef unsigned short PXE_UINT16;
  71. typedef unsigned PXE_UINT32;
  72. #if PXE_UINT64_SUPPORT != 0
  73. // typedef unsigned long PXE_UINT64;
  74. typedef UINT64 PXE_UINT64;
  75. #endif // PXE_UINT64_SUPPORT
  76. #if PXE_NO_UINT64_SUPPORT != 0
  77. typedef PXE_UINT32 PXE_UINT64[2];
  78. #endif // PXE_NO_UINT64_SUPPORT
  79. typedef unsigned PXE_UINTN;
  80. typedef PXE_UINT8 PXE_BOOL;
  81. #define PXE_FALSE 0 // zero
  82. #define PXE_TRUE (!PXE_FALSE)
  83. typedef PXE_UINT16 PXE_OPCODE;
  84. //
  85. // Return UNDI operational state.
  86. //
  87. #define PXE_OPCODE_GET_STATE 0x0000
  88. //
  89. // Change UNDI operational state from Stopped to Started.
  90. //
  91. #define PXE_OPCODE_START 0x0001
  92. //
  93. // Change UNDI operational state from Started to Stopped.
  94. //
  95. #define PXE_OPCODE_STOP 0x0002
  96. //
  97. // Get UNDI initialization information.
  98. //
  99. #define PXE_OPCODE_GET_INIT_INFO 0x0003
  100. //
  101. // Get NIC configuration information.
  102. //
  103. #define PXE_OPCODE_GET_CONFIG_INFO 0x0004
  104. //
  105. // Changed UNDI operational state from Started to Initialized.
  106. //
  107. #define PXE_OPCODE_INITIALIZE 0x0005
  108. //
  109. // Re-initialize the NIC H/W.
  110. //
  111. #define PXE_OPCODE_RESET 0x0006
  112. //
  113. // Change the UNDI operational state from Initialized to Started.
  114. //
  115. #define PXE_OPCODE_SHUTDOWN 0x0007
  116. //
  117. // Read & change state of external interrupt enables.
  118. //
  119. #define PXE_OPCODE_INTERRUPT_ENABLES 0x0008
  120. //
  121. // Read & change state of packet receive filters.
  122. //
  123. #define PXE_OPCODE_RECEIVE_FILTERS 0x0009
  124. //
  125. // Read & change station MAC address.
  126. //
  127. #define PXE_OPCODE_STATION_ADDRESS 0x000A
  128. //
  129. // Read traffic statistics.
  130. //
  131. #define PXE_OPCODE_STATISTICS 0x000B
  132. //
  133. // Convert multicast IP address to multicast MAC address.
  134. //
  135. #define PXE_OPCODE_MCAST_IP_TO_MAC 0x000C
  136. //
  137. // Read or change non-volatile storage on the NIC.
  138. //
  139. #define PXE_OPCODE_NVDATA 0x000D
  140. //
  141. // Get & clear interrupt status.
  142. //
  143. #define PXE_OPCODE_GET_STATUS 0x000E
  144. //
  145. // Fill media header in packet for transmit.
  146. //
  147. #define PXE_OPCODE_FILL_HEADER 0x000F
  148. //
  149. // Transmit packet(s).
  150. //
  151. #define PXE_OPCODE_TRANSMIT 0x0010
  152. //
  153. // Receive packet.
  154. //
  155. #define PXE_OPCODE_RECEIVE 0x0011
  156. // last valid opcode:
  157. #define PXE_OPCODE_VALID_MAX 0x0011
  158. //
  159. // Last valid PXE UNDI OpCode number.
  160. //
  161. #define PXE_OPCODE_LAST_VALID 0x0011
  162. typedef PXE_UINT16 PXE_OPFLAGS;
  163. #define PXE_OPFLAGS_NOT_USED 0x0000
  164. ////////////////////////////////////////
  165. // UNDI Get State
  166. //
  167. // No OpFlags
  168. ////////////////////////////////////////
  169. // UNDI Start
  170. //
  171. // No OpFlags
  172. ////////////////////////////////////////
  173. // UNDI Stop
  174. //
  175. // No OpFlags
  176. ////////////////////////////////////////
  177. // UNDI Get Init Info
  178. //
  179. // No Opflags
  180. ////////////////////////////////////////
  181. // UNDI Get Config Info
  182. //
  183. // No Opflags
  184. ////////////////////////////////////////
  185. // UNDI Initialize
  186. //
  187. #define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001
  188. #define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000
  189. #define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001
  190. ////////////////////////////////////////
  191. // UNDI Reset
  192. //
  193. #define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001
  194. #define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002
  195. ////////////////////////////////////////
  196. // UNDI Shutdown
  197. //
  198. // No OpFlags
  199. ////////////////////////////////////////
  200. // UNDI Interrupt Enables
  201. //
  202. //
  203. // Select whether to enable or disable external interrupt signals.
  204. // Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
  205. //
  206. #define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000
  207. #define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000
  208. #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
  209. #define PXE_OPFLAGS_INTERRUPT_READ 0x0000
  210. //
  211. // Enable receive interrupts. An external interrupt will be generated
  212. // after a complete non-error packet has been received.
  213. //
  214. #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
  215. //
  216. // Enable transmit interrupts. An external interrupt will be generated
  217. // after a complete non-error packet has been transmitted.
  218. //
  219. #define PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002
  220. //
  221. // Enable command interrupts. An external interrupt will be generated
  222. // when command execution stops.
  223. //
  224. #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
  225. //
  226. // Generate software interrupt. Setting this bit generates an external
  227. // interrupt, if it is supported by the hardware.
  228. //
  229. #define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008
  230. ////////////////////////////////////////
  231. // UNDI Receive Filters
  232. //
  233. //
  234. // Select whether to enable or disable receive filters.
  235. // Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
  236. //
  237. #define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000
  238. #define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000
  239. #define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000
  240. #define PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000
  241. //
  242. // To reset the contents of the multicast MAC address filter list,
  243. // set this OpFlag:
  244. //
  245. #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
  246. //
  247. // Enable unicast packet receiving. Packets sent to the current station
  248. // MAC address will be received.
  249. //
  250. #define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001
  251. //
  252. // Enable broadcast packet receiving. Packets sent to the broadcast
  253. // MAC address will be received.
  254. //
  255. #define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
  256. //
  257. // Enable filtered multicast packet receiving. Packets sent to any
  258. // of the multicast MAC addresses in the multicast MAC address filter
  259. // list will be received. If the filter list is empty, no multicast
  260. //
  261. #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
  262. //
  263. // Enable promiscuous packet receiving. All packets will be received.
  264. //
  265. #define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
  266. //
  267. // Enable promiscuous multicast packet receiving. All multicast
  268. // packets will be received.
  269. //
  270. #define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
  271. ////////////////////////////////////////
  272. // UNDI Station Address
  273. //
  274. #define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000
  275. #define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001
  276. ////////////////////////////////////////
  277. // UNDI Statistics
  278. //
  279. #define PXE_OPFLAGS_STATISTICS_READ 0x0000
  280. #define PXE_OPFLAGS_STATISTICS_RESET 0x0001
  281. ////////////////////////////////////////
  282. // UNDI MCast IP to MAC
  283. //
  284. //
  285. // Identify the type of IP address in the CPB.
  286. //
  287. #define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003
  288. #define PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000
  289. #define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001
  290. ////////////////////////////////////////
  291. // UNDI NvData
  292. //
  293. //
  294. // Select the type of non-volatile data operation.
  295. //
  296. #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
  297. #define PXE_OPFLAGS_NVDATA_READ 0x0000
  298. #define PXE_OPFLAGS_NVDATA_WRITE 0x0001
  299. ////////////////////////////////////////
  300. // UNDI Get Status
  301. //
  302. //
  303. // Return current interrupt status. This will also clear any interrupts
  304. // that are currently set. This can be used in a polling routine. The
  305. // interrupt flags are still set and cleared even when the interrupts
  306. // are disabled.
  307. //
  308. #define PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001
  309. //
  310. // Return list of transmitted buffers for recycling. Transmit buffers
  311. // must not be changed or unallocated until they have recycled. After
  312. // issuing a transmit command, wait for a transmit complete interrupt.
  313. // When a transmit complete interrupt is received, read the transmitted
  314. // buffers. Do not plan on getting one buffer per interrupt. Some
  315. // NICs and UNDIs may transmit multiple buffers per interrupt.
  316. //
  317. #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
  318. ////////////////////////////////////////
  319. // UNDI Fill Header
  320. //
  321. #define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001
  322. #define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001
  323. #define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000
  324. ////////////////////////////////////////
  325. // UNDI Transmit
  326. //
  327. //
  328. // S/W UNDI only. Return after the packet has been transmitted. A
  329. // transmit complete interrupt will still be generated and the transmit
  330. // buffer will have to be recycled.
  331. //
  332. #define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001
  333. #define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001
  334. #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000
  335. //
  336. //
  337. //
  338. #define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002
  339. #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
  340. #define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000
  341. ////////////////////////////////////////
  342. // UNDI Receive
  343. //
  344. // No OpFlags
  345. typedef PXE_UINT16 PXE_STATFLAGS;
  346. #define PXE_STATFLAGS_INITIALIZE 0x0000
  347. ////////////////////////////////////////
  348. // Common StatFlags that can be returned by all commands.
  349. //
  350. //
  351. // The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
  352. // implemented by all UNDIs. COMMAND_QUEUED is only needed by UNDIs
  353. // that support command queuing.
  354. //
  355. #define PXE_STATFLAGS_STATUS_MASK 0xC000
  356. #define PXE_STATFLAGS_COMMAND_COMPLETE 0xC000
  357. #define PXE_STATFLAGS_COMMAND_FAILED 0x8000
  358. #define PXE_STATFLAGS_COMMAND_QUEUED 0x4000
  359. //#define PXE_STATFLAGS_INITIALIZE 0x0000
  360. #define PXE_STATFLAGS_DB_WRITE_TRUNCATED 0x2000
  361. ////////////////////////////////////////
  362. // UNDI Get State
  363. //
  364. #define PXE_STATFLAGS_GET_STATE_MASK 0x0003
  365. #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
  366. #define PXE_STATFLAGS_GET_STATE_STARTED 0x0001
  367. #define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000
  368. ////////////////////////////////////////
  369. // UNDI Start
  370. //
  371. // No additional StatFlags
  372. ////////////////////////////////////////
  373. // UNDI Get Init Info
  374. //
  375. #define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001
  376. #define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000
  377. #define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001
  378. ////////////////////////////////////////
  379. // UNDI Initialize
  380. //
  381. #define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001
  382. ////////////////////////////////////////
  383. // UNDI Reset
  384. //
  385. #define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001
  386. ////////////////////////////////////////
  387. // UNDI Shutdown
  388. //
  389. // No additional StatFlags
  390. ////////////////////////////////////////
  391. // UNDI Interrupt Enables
  392. //
  393. //
  394. // If set, receive interrupts are enabled.
  395. //
  396. #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
  397. //
  398. // If set, transmit interrupts are enabled.
  399. //
  400. #define PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002
  401. //
  402. // If set, command interrupts are enabled.
  403. //
  404. #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
  405. ////////////////////////////////////////
  406. // UNDI Receive Filters
  407. //
  408. //
  409. // If set, unicast packets will be received.
  410. //
  411. #define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001
  412. //
  413. // If set, broadcast packets will be received.
  414. //
  415. #define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
  416. //
  417. // If set, multicast packets that match up with the multicast address
  418. // filter list will be received.
  419. //
  420. #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
  421. //
  422. // If set, all packets will be received.
  423. //
  424. #define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
  425. //
  426. // If set, all multicast packets will be received.
  427. //
  428. #define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
  429. ////////////////////////////////////////
  430. // UNDI Station Address
  431. //
  432. // No additional StatFlags
  433. ////////////////////////////////////////
  434. // UNDI Statistics
  435. //
  436. // No additional StatFlags
  437. ////////////////////////////////////////
  438. // UNDI MCast IP to MAC
  439. //
  440. // No additional StatFlags
  441. ////////////////////////////////////////
  442. // UNDI NvData
  443. //
  444. // No additional StatFlags
  445. ////////////////////////////////////////
  446. // UNDI Get Status
  447. //
  448. //
  449. // Use to determine if an interrupt has occurred.
  450. //
  451. #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
  452. #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000
  453. //
  454. // If set, at least one receive interrupt occurred.
  455. //
  456. #define PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001
  457. //
  458. // If set, at least one transmit interrupt occurred.
  459. //
  460. #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
  461. //
  462. // If set, at least one command interrupt occurred.
  463. //
  464. #define PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004
  465. //
  466. // If set, at least one software interrupt occurred.
  467. //
  468. #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
  469. //
  470. // This flag is set if the transmitted buffer queue is empty. This flag
  471. // will be set if all transmitted buffer addresses get written into the DB.
  472. //
  473. #define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010
  474. //
  475. // This flag is set if no transmitted buffer addresses were written
  476. // into the DB. (This could be because DBsize was too small.)
  477. //
  478. #define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020
  479. ////////////////////////////////////////
  480. // UNDI Fill Header
  481. //
  482. // No additional StatFlags
  483. ////////////////////////////////////////
  484. // UNDI Transmit
  485. //
  486. // No additional StatFlags.
  487. ////////////////////////////////////////
  488. // UNDI Receive
  489. //
  490. // No additional StatFlags.
  491. typedef PXE_UINT16 PXE_STATCODE;
  492. #define PXE_STATCODE_INITIALIZE 0x0000
  493. ////////////////////////////////////////
  494. // Common StatCodes returned by all UNDI commands, UNDI protocol functions
  495. // and BC protocol functions.
  496. //
  497. #define PXE_STATCODE_SUCCESS 0x0000
  498. #define PXE_STATCODE_INVALID_CDB 0x0001
  499. #define PXE_STATCODE_INVALID_CPB 0x0002
  500. #define PXE_STATCODE_BUSY 0x0003
  501. #define PXE_STATCODE_QUEUE_FULL 0x0004
  502. #define PXE_STATCODE_ALREADY_STARTED 0x0005
  503. #define PXE_STATCODE_NOT_STARTED 0x0006
  504. #define PXE_STATCODE_NOT_SHUTDOWN 0x0007
  505. #define PXE_STATCODE_ALREADY_INITIALIZED 0x0008
  506. #define PXE_STATCODE_NOT_INITIALIZED 0x0009
  507. #define PXE_STATCODE_DEVICE_FAILURE 0x000A
  508. #define PXE_STATCODE_NVDATA_FAILURE 0x000B
  509. #define PXE_STATCODE_UNSUPPORTED 0x000C
  510. #define PXE_STATCODE_BUFFER_FULL 0x000D
  511. #define PXE_STATCODE_INVALID_PARAMETER 0x000E
  512. #define PXE_STATCODE_INVALID_UNDI 0x000F
  513. #define PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010
  514. #define PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011
  515. #define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012
  516. #define PXE_STATCODE_NO_DATA 0x0013
  517. typedef PXE_UINT16 PXE_IFNUM;
  518. //
  519. // This interface number must be passed to the S/W UNDI Start command.
  520. //
  521. #define PXE_IFNUM_START 0x0000
  522. //
  523. // This interface number is returned by the S/W UNDI Get State and
  524. // Start commands if information in the CDB, CPB or DB is invalid.
  525. //
  526. #define PXE_IFNUM_INVALID 0x0000
  527. typedef PXE_UINT16 PXE_CONTROL;
  528. //
  529. // Setting this flag directs the UNDI to queue this command for later
  530. // execution if the UNDI is busy and it supports command queuing.
  531. // If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
  532. // is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
  533. // error is returned.
  534. //
  535. #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
  536. //
  537. // These two bit values are used to determine if there are more UNDI
  538. // CDB structures following this one. If the link bit is set, there
  539. // must be a CDB structure following this one. Execution will start
  540. // on the next CDB structure as soon as this one completes successfully.
  541. // If an error is generated by this command, execution will stop.
  542. //
  543. #define PXE_CONTROL_LINK 0x0001
  544. #define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000
  545. typedef PXE_UINT8 PXE_FRAME_TYPE;
  546. #define PXE_FRAME_TYPE_NONE 0x00
  547. #define PXE_FRAME_TYPE_UNICAST 0x01
  548. #define PXE_FRAME_TYPE_BROADCAST 0x02
  549. #define PXE_FRAME_TYPE_MULTICAST 0x03
  550. #define PXE_FRAME_TYPE_PROMISCUOUS 0x04
  551. typedef PXE_UINT32 PXE_IPV4;
  552. typedef PXE_UINT32 PXE_IPV6[4];
  553. #define PXE_MAC_LENGTH 32
  554. typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH];
  555. typedef PXE_UINT8 PXE_IFTYPE;
  556. typedef PXE_UINT16 PXE_MEDIA_PROTOCOL;
  557. //
  558. // This information is from the ARP section of RFC 1700.
  559. //
  560. // 1 Ethernet (10Mb) [JBP]
  561. // 2 Experimental Ethernet (3Mb) [JBP]
  562. // 3 Amateur Radio AX.25 [PXK]
  563. // 4 Proteon ProNET Token Ring [JBP]
  564. // 5 Chaos [GXP]
  565. // 6 IEEE 802 Networks [JBP]
  566. // 7 ARCNET [JBP]
  567. // 8 Hyperchannel [JBP]
  568. // 9 Lanstar [TU]
  569. // 10 Autonet Short Address [MXB1]
  570. // 11 LocalTalk [JKR1]
  571. // 12 LocalNet (IBM PCNet or SYTEK LocalNET) [JXM]
  572. // 13 Ultra link [RXD2]
  573. // 14 SMDS [GXC1]
  574. // 15 Frame Relay [AGM]
  575. // 16 Asynchronous Transmission Mode (ATM) [JXB2]
  576. // 17 HDLC [JBP]
  577. // 18 Fibre Channel [Yakov Rekhter]
  578. // 19 Asynchronous Transmission Mode (ATM) [Mark Laubach]
  579. // 20 Serial Line [JBP]
  580. // 21 Asynchronous Transmission Mode (ATM) [MXB1]
  581. //
  582. #define PXE_IFTYPE_ETHERNET 0x01
  583. #define PXE_IFTYPE_TOKENRING 0x04
  584. #define PXE_IFTYPE_FIBRE_CHANNEL 0x12
  585. typedef struct s_pxe_hw_undi {
  586. PXE_UINT32 Signature; // PXE_ROMID_SIGNATURE
  587. PXE_UINT8 Len; // sizeof(PXE_HW_UNDI)
  588. PXE_UINT8 Fudge; // makes 8-bit cksum equal zero
  589. PXE_UINT8 Rev; // PXE_ROMID_REV
  590. PXE_UINT8 IFcnt; // physical connector count
  591. PXE_UINT8 MajorVer; // PXE_ROMID_MAJORVER
  592. PXE_UINT8 MinorVer; // PXE_ROMID_MINORVER
  593. PXE_UINT16 reserved; // zero, not used
  594. PXE_UINT32 Implementation; // implementation flags
  595. // reserved // vendor use
  596. // PXE_UINT32 Status; // status port
  597. // PXE_UINT32 Command; // command port
  598. // PXE_UINT64 CDBaddr; // CDB address port
  599. } PXE_HW_UNDI;
  600. //
  601. // Status port bit definitions
  602. //
  603. //
  604. // UNDI operation state
  605. //
  606. #define PXE_HWSTAT_STATE_MASK 0xC0000000
  607. #define PXE_HWSTAT_BUSY 0xC0000000
  608. #define PXE_HWSTAT_INITIALIZED 0x80000000
  609. #define PXE_HWSTAT_STARTED 0x40000000
  610. #define PXE_HWSTAT_STOPPED 0x00000000
  611. //
  612. // If set, last command failed
  613. //
  614. #define PXE_HWSTAT_COMMAND_FAILED 0x20000000
  615. //
  616. // If set, identifies enabled receive filters
  617. //
  618. #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
  619. #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800
  620. #define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400
  621. #define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200
  622. #define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100
  623. //
  624. // If set, identifies enabled external interrupts
  625. //
  626. #define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080
  627. #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040
  628. #define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020
  629. #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
  630. //
  631. // If set, identifies pending interrupts
  632. //
  633. #define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008
  634. #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004
  635. #define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002
  636. #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
  637. //
  638. // Command port definitions
  639. //
  640. //
  641. // If set, CDB identified in CDBaddr port is given to UNDI.
  642. // If not set, other bits in this word will be processed.
  643. //
  644. #define PXE_HWCMD_ISSUE_COMMAND 0x80000000
  645. #define PXE_HWCMD_INTS_AND_FILTS 0x00000000
  646. //
  647. // Use these to enable/disable receive filters.
  648. //
  649. #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
  650. #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800
  651. #define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400
  652. #define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200
  653. #define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100
  654. //
  655. // Use these to enable/disable external interrupts
  656. //
  657. #define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080
  658. #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040
  659. #define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020
  660. #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
  661. //
  662. // Use these to clear pending external interrupts
  663. //
  664. #define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008
  665. #define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004
  666. #define PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002
  667. #define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001
  668. typedef struct s_pxe_sw_undi {
  669. PXE_UINT32 Signature; // PXE_ROMID_SIGNATURE
  670. PXE_UINT8 Len; // sizeof(PXE_SW_UNDI)
  671. PXE_UINT8 Fudge; // makes 8-bit cksum zero
  672. PXE_UINT8 Rev; // PXE_ROMID_REV
  673. PXE_UINT8 IFcnt; // physical connector count
  674. PXE_UINT8 MajorVer; // PXE_ROMID_MAJORVER
  675. PXE_UINT8 MinorVer; // PXE_ROMID_MINORVER
  676. PXE_UINT16 reserved1; // zero, not used
  677. PXE_UINT32 Implementation; // Implementation flags
  678. PXE_UINT64 EntryPoint; // API entry point
  679. PXE_UINT8 reserved2[3]; // zero, not used
  680. PXE_UINT8 BusCnt; // number of bustypes supported
  681. PXE_UINT32 BusType[1]; // list of supported bustypes
  682. } PXE_SW_UNDI;
  683. typedef union u_pxe_undi {
  684. PXE_HW_UNDI hw;
  685. PXE_SW_UNDI sw;
  686. } PXE_UNDI;
  687. //
  688. // Signature of !PXE structure
  689. //
  690. #define PXE_ROMID_SIGNATURE PXE_BUSTYPE('!', 'P', 'X', 'E')
  691. //
  692. // !PXE structure format revision
  693. //
  694. #define PXE_ROMID_REV 0x02
  695. //
  696. // UNDI command interface revision. These are the values that get sent
  697. // in option 94 (Client Network Interface Identifier) in the DHCP Discover
  698. // and PXE Boot Server Request packets.
  699. //
  700. #define PXE_ROMID_MAJORVER 0x03
  701. #define PXE_ROMID_MINORVER 0x00
  702. //
  703. // Implementation flags
  704. //
  705. #define PXE_ROMID_IMP_HW_UNDI 0x80000000
  706. #define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000
  707. #define PXE_ROMID_IMP_64BIT_DEVICE 0x00010000
  708. #define PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000
  709. #define PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000
  710. #define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000
  711. #define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000
  712. #define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00
  713. #define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00
  714. #define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800
  715. #define PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400
  716. #define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000
  717. #define PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200
  718. #define PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100
  719. #define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080
  720. #define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040
  721. #define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020
  722. #define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010
  723. #define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008
  724. #define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004
  725. #define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002
  726. #define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001
  727. typedef struct s_pxe_cdb {
  728. PXE_OPCODE OpCode;
  729. PXE_OPFLAGS OpFlags;
  730. PXE_UINT16 CPBsize;
  731. PXE_UINT16 DBsize;
  732. UINT64 CPBaddr;
  733. UINT64 DBaddr;
  734. PXE_STATCODE StatCode;
  735. PXE_STATFLAGS StatFlags;
  736. PXE_UINT16 IFnum;
  737. PXE_CONTROL Control;
  738. } PXE_CDB;
  739. typedef union u_pxe_ip_addr {
  740. PXE_IPV6 IPv6;
  741. PXE_IPV4 IPv4;
  742. } PXE_IP_ADDR;
  743. typedef union pxe_device {
  744. //
  745. // PCI and PC Card NICs are both identified using bus, device
  746. // and function numbers. For PC Card, this may require PC
  747. // Card services to be loaded in the BIOS or preboot
  748. // environment.
  749. //
  750. struct {
  751. //
  752. // See S/W UNDI ROMID structure definition for PCI and
  753. // PCC BusType definitions.
  754. //
  755. PXE_UINT32 BusType;
  756. //
  757. // Bus, device & function numbers that locate this device.
  758. //
  759. PXE_UINT16 Bus;
  760. PXE_UINT8 Device;
  761. PXE_UINT8 Function;
  762. } PCI, PCC;
  763. //
  764. // %%TBD - More information is needed about enumerating
  765. // USB and 1394 devices.
  766. //
  767. struct {
  768. PXE_UINT32 BusType;
  769. PXE_UINT32 tdb;
  770. } USB, _1394;
  771. } PXE_DEVICE;
  772. // cpb and db definitions
  773. #define MAX_PCI_CONFIG_LEN 64 // # of dwords
  774. #define MAX_EEPROM_LEN 128 // #of dwords
  775. #define MAX_XMIT_BUFFERS 32 // recycling Q length for xmit_done
  776. #define MAX_MCAST_ADDRESS_CNT 8
  777. typedef struct s_pxe_cpb_start {
  778. //
  779. // PXE_VOID Delay(PXE_UINT64 microseconds);
  780. //
  781. // UNDI will never request a delay smaller than 10 microseconds
  782. // and will always request delays in increments of 10 microseconds.
  783. // The Delay() CallBack routine must delay between n and n + 10
  784. // microseconds before returning control to the UNDI.
  785. //
  786. // This field cannot be set to zero.
  787. //
  788. PXE_UINT64 Delay;
  789. //
  790. // PXE_VOID Block(PXE_UINT32 enable);
  791. //
  792. // UNDI may need to block multi-threaded/multi-processor access to
  793. // critical code sections when programming or accessing the network
  794. // device. To this end, a blocking service is needed by the UNDI.
  795. // When UNDI needs a block, it will call Block() passing a non-zero
  796. // value. When UNDI no longer needs a block, it will call Block()
  797. // with a zero value. When called, if the Block() is already enabled,
  798. // do not return control to the UNDI until the previous Block() is
  799. // disabled.
  800. //
  801. // This field cannot be set to zero.
  802. //
  803. PXE_UINT64 Block;
  804. //
  805. // PXE_VOID Virt2Phys(PXE_UINT64 virtual, PXE_UINT64 physical_ptr);
  806. //
  807. // UNDI will pass the virtual address of a buffer and the virtual
  808. // address of a 64-bit physical buffer. Convert the virtual address
  809. // to a physical address and write the result to the physical address
  810. // buffer. If virtual and physical addresses are the same, just
  811. // copy the virtual address to the physical address buffer.
  812. //
  813. // This field can be set to zero if virtual and physical addresses
  814. // are equal.
  815. //
  816. PXE_UINT64 Virt2Phys;
  817. //
  818. // PXE_VOID Mem_IO(PXE_UINT8 read_write, PXE_UINT8 len, PXE_UINT64 port,
  819. // PXE_UINT64 buf_addr);
  820. //
  821. // UNDI will read or write the device io space using this call back
  822. // function. It passes the number of bytes as the len parameter and it
  823. // will be either 1,2,4 or 8.
  824. //
  825. // This field can not be set to zero.
  826. //
  827. PXE_UINT64 Mem_IO;
  828. } PXE_CPB_START;
  829. #define PXE_DELAY_MILLISECOND 1000
  830. #define PXE_DELAY_SECOND 1000000
  831. #define PXE_IO_READ 0
  832. #define PXE_IO_WRITE 1
  833. #define PXE_MEM_READ 2
  834. #define PXE_MEM_WRITE 4
  835. typedef struct s_pxe_db_get_init_info {
  836. //
  837. // Minimum length of locked memory buffer that must be given to
  838. // the Initialize command. Giving UNDI more memory will generally
  839. // give better performance.
  840. //
  841. // If MemoryRequired is zero, the UNDI does not need and will not
  842. // use system memory to receive and transmit packets.
  843. //
  844. PXE_UINT32 MemoryRequired;
  845. //
  846. // Maximum frame data length for Tx/Rx excluding the media header.
  847. //
  848. PXE_UINT32 FrameDataLen;
  849. //
  850. // Supported link speeds are in units of mega bits. Common ethernet
  851. // values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero
  852. // filled.
  853. //
  854. PXE_UINT32 LinkSpeeds[4];
  855. //
  856. // Number of non-volatile storage items.
  857. //
  858. PXE_UINT32 NvCount;
  859. //
  860. // Width of non-volatile storage item in bytes. 0, 1, 2 or 4
  861. //
  862. PXE_UINT16 NvWidth;
  863. //
  864. // Media header length. This is the typical media header length for
  865. // this UNDI. This information is needed when allocating receive
  866. // and transmit buffers.
  867. //
  868. PXE_UINT16 MediaHeaderLen;
  869. //
  870. // Number of bytes in the NIC hardware (MAC) address.
  871. //
  872. PXE_UINT16 HWaddrLen;
  873. //
  874. // Maximum number of multicast MAC addresses in the multicast
  875. // MAC address filter list.
  876. //
  877. PXE_UINT16 MCastFilterCnt;
  878. //
  879. // Default number and size of transmit and receive buffers that will
  880. // be allocated by the UNDI. If MemoryRequired is non-zero, this
  881. // allocation will come out of the memory buffer given to the Initialize
  882. // command. If MemoryRequired is zero, this allocation will come out of
  883. // memory on the NIC.
  884. //
  885. PXE_UINT16 TxBufCnt;
  886. PXE_UINT16 TxBufSize;
  887. PXE_UINT16 RxBufCnt;
  888. PXE_UINT16 RxBufSize;
  889. //
  890. // Hardware interface types defined in the Assigned Numbers RFC
  891. // and used in DHCP and ARP packets.
  892. // See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
  893. //
  894. PXE_UINT8 IFtype;
  895. //
  896. // Supported duplex. See PXE_DUPLEX_xxxxx #defines below.
  897. //
  898. PXE_UINT8 Duplex;
  899. //
  900. // Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below.
  901. //
  902. PXE_UINT8 LoopBack;
  903. } PXE_DB_GET_INIT_INFO;
  904. #define PXE_MAX_TXRX_UNIT_ETHER 1500
  905. #define PXE_HWADDR_LEN_ETHER 0x0006
  906. #define PXE_MAC_HEADER_LEN_ETHER 0x000E
  907. #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1
  908. #define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2
  909. #define PXE_LOOPBACK_INTERNAL_SUPPORTED 1
  910. #define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2
  911. typedef struct s_pxe_pci_config_info {
  912. //
  913. // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
  914. // For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
  915. //
  916. PXE_UINT32 BusType;
  917. //
  918. // This identifies the PCI network device that this UNDI interface
  919. // is bound to.
  920. //
  921. PXE_UINT16 Bus;
  922. PXE_UINT8 Device;
  923. PXE_UINT8 Function;
  924. //
  925. // This is a copy of the PCI configuration space for this
  926. // network device.
  927. //
  928. union {
  929. PXE_UINT8 Byte[256];
  930. PXE_UINT16 Word[128];
  931. PXE_UINT32 Dword[64];
  932. } Config;
  933. } PXE_PCI_CONFIG_INFO;
  934. typedef struct s_pxe_pcc_config_info {
  935. //
  936. // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
  937. // For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
  938. //
  939. PXE_UINT32 BusType;
  940. //
  941. // This identifies the PCC network device that this UNDI interface
  942. // is bound to.
  943. //
  944. PXE_UINT16 Bus;
  945. PXE_UINT8 Device;
  946. PXE_UINT8 Function;
  947. //
  948. // This is a copy of the PCC configuration space for this
  949. // network device.
  950. //
  951. union {
  952. PXE_UINT8 Byte[256];
  953. PXE_UINT16 Word[128];
  954. PXE_UINT32 Dword[64];
  955. } Config;
  956. } PXE_PCC_CONFIG_INFO;
  957. typedef struct s_pxe_usb_config_info {
  958. PXE_UINT32 BusType;
  959. // %%TBD What should we return here...
  960. } PXE_USB_CONFIG_INFO;
  961. typedef struct s_pxe_1394_config_info {
  962. PXE_UINT32 BusType;
  963. // %%TBD What should we return here...
  964. } PXE_1394_CONFIG_INFO;
  965. typedef union u_pxe_db_get_config_info {
  966. PXE_PCI_CONFIG_INFO pci;
  967. PXE_PCC_CONFIG_INFO pcc;
  968. PXE_USB_CONFIG_INFO usb;
  969. PXE_1394_CONFIG_INFO _1394;
  970. } PXE_DB_GET_CONFIG_INFO;
  971. typedef struct s_pxe_cpb_initialize {
  972. //
  973. // Address of first (lowest) byte of the memory buffer. This buffer must
  974. // be in contiguous physical memory and cannot be swapped out. The UNDI
  975. // will be using this for transmit and receive buffering.
  976. //
  977. PXE_UINT64 MemoryAddr;
  978. //
  979. // MemoryLength must be greater than or equal to MemoryRequired
  980. // returned by the Get Init Info command.
  981. //
  982. PXE_UINT32 MemoryLength;
  983. //
  984. // Desired link speed in Mbit/sec. Common ethernet values are 10, 100
  985. // and 1000. Setting a value of zero will auto-detect and/or use the
  986. // default link speed (operation depends on UNDI/NIC functionality).
  987. //
  988. PXE_UINT32 LinkSpeed;
  989. //
  990. // Suggested number and size of receive and transmit buffers to
  991. // allocate. If MemoryAddr and MemoryLength are non-zero, this
  992. // allocation comes out of the supplied memory buffer. If MemoryAddr
  993. // and MemoryLength are zero, this allocation comes out of memory
  994. // on the NIC.
  995. //
  996. // If these fields are set to zero, the UNDI will allocate buffer
  997. // counts and sizes as it sees fit.
  998. //
  999. PXE_UINT16 TxBufCnt;
  1000. PXE_UINT16 TxBufSize;
  1001. PXE_UINT16 RxBufCnt;
  1002. PXE_UINT16 RxBufSize;
  1003. //
  1004. // The following configuration parameters are optional and must be zero
  1005. // to use the default values.
  1006. //
  1007. PXE_UINT8 Duplex;
  1008. PXE_UINT8 LoopBack;
  1009. } PXE_CPB_INITIALIZE;
  1010. #define PXE_DUPLEX_DEFAULT 0x00
  1011. #define PXE_FORCE_FULL_DUPLEX 0x01
  1012. #define PXE_ENABLE_FULL_DUPLEX 0x02
  1013. #define LOOPBACK_NORMAL 0
  1014. #define LOOPBACK_INTERNAL 1
  1015. #define LOOPBACK_EXTERNAL 2
  1016. typedef struct s_pxe_db_initialize {
  1017. //
  1018. // Actual amount of memory used from the supplied memory buffer. This
  1019. // may be less that the amount of memory suppllied and may be zero if
  1020. // the UNDI and network device do not use external memory buffers.
  1021. //
  1022. // Memory used by the UNDI and network device is allocated from the
  1023. // lowest memory buffer address.
  1024. //
  1025. PXE_UINT32 MemoryUsed;
  1026. //
  1027. // Actual number and size of receive and transmit buffers that were
  1028. // allocated.
  1029. //
  1030. PXE_UINT16 TxBufCnt;
  1031. PXE_UINT16 TxBufSize;
  1032. PXE_UINT16 RxBufCnt;
  1033. PXE_UINT16 RxBufSize;
  1034. } PXE_DB_INITIALIZE;
  1035. typedef struct s_pxe_cpb_receive_filters {
  1036. //
  1037. // List of multicast MAC addresses. This list, if present, will
  1038. // replace the existing multicast MAC address filter list.
  1039. //
  1040. PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
  1041. } PXE_CPB_RECEIVE_FILTERS;
  1042. typedef struct s_pxe_db_receive_filters {
  1043. //
  1044. // Filtered multicast MAC address list.
  1045. //
  1046. PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
  1047. } PXE_DB_RECEIVE_FILTERS;
  1048. typedef struct s_pxe_cpb_station_address {
  1049. //
  1050. // If supplied and supported, the current station MAC address
  1051. // will be changed.
  1052. //
  1053. PXE_MAC_ADDR StationAddr;
  1054. } PXE_CPB_STATION_ADDRESS;
  1055. typedef struct s_pxe_dpb_station_address {
  1056. //
  1057. // Current station MAC address.
  1058. //
  1059. PXE_MAC_ADDR StationAddr;
  1060. //
  1061. // Station broadcast MAC address.
  1062. //
  1063. PXE_MAC_ADDR BroadcastAddr;
  1064. //
  1065. // Permanent station MAC address.
  1066. //
  1067. PXE_MAC_ADDR PermanentAddr;
  1068. } PXE_DB_STATION_ADDRESS;
  1069. typedef struct s_pxe_db_statistics {
  1070. //
  1071. // Bit field identifying what statistic data is collected by the
  1072. // UNDI/NIC.
  1073. // If bit 0x00 is set, Data[0x00] is collected.
  1074. // If bit 0x01 is set, Data[0x01] is collected.
  1075. // If bit 0x20 is set, Data[0x20] is collected.
  1076. // If bit 0x21 is set, Data[0x21] is collected.
  1077. // Etc.
  1078. //
  1079. PXE_UINT64 Supported;
  1080. //
  1081. // Statistic data.
  1082. //
  1083. PXE_UINT64 Data[64];
  1084. } PXE_DB_STATISTICS;
  1085. //
  1086. // Total number of frames received. Includes frames with errors and
  1087. // dropped frames.
  1088. //
  1089. #define PXE_STATISTICS_RX_TOTAL_FRAMES 0x00
  1090. //
  1091. // Number of valid frames received and copied into receive buffers.
  1092. //
  1093. #define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
  1094. //
  1095. // Number of frames below the minimum length for the media.
  1096. // This would be <64 for ethernet.
  1097. //
  1098. #define PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x02
  1099. //
  1100. // Number of frames longer than the maxminum length for the
  1101. // media. This would be >1500 for ethernet.
  1102. //
  1103. #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
  1104. //
  1105. // Valid frames that were dropped because receive buffers were full.
  1106. //
  1107. #define PXE_STATISTICS_RX_DROPPED_FRAMES 0x04
  1108. //
  1109. // Number of valid unicast frames received and not dropped.
  1110. //
  1111. #define PXE_STATISTICS_RX_UNICAST_FRAMES 0x05
  1112. //
  1113. // Number of valid broadcast frames received and not dropped.
  1114. //
  1115. #define PXE_STATISTICS_RX_BROADCAST_FRAMES 0x06
  1116. //
  1117. // Number of valid mutlicast frames received and not dropped.
  1118. //
  1119. #define PXE_STATISTICS_RX_MULTICAST_FRAMES 0x07
  1120. //
  1121. // Number of frames w/ CRC or alignment errors.
  1122. //
  1123. #define PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x08
  1124. //
  1125. // Total number of bytes received. Includes frames with errors
  1126. // and dropped frames.
  1127. //
  1128. #define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
  1129. //
  1130. // Transmit statistics.
  1131. //
  1132. #define PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A
  1133. #define PXE_STATISTICS_TX_GOOD_FRAMES 0x0B
  1134. #define PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C
  1135. #define PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D
  1136. #define PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E
  1137. #define PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F
  1138. #define PXE_STATISTICS_TX_BROADCAST_FRAMES 0x10
  1139. #define PXE_STATISTICS_TX_MULTICAST_FRAMES 0x11
  1140. #define PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x12
  1141. #define PXE_STATISTICS_TX_TOTAL_BYTES 0x13
  1142. //
  1143. // Number of collisions detection on this subnet.
  1144. //
  1145. #define PXE_STATISTICS_COLLISIONS 0x14
  1146. //
  1147. // Number of frames destined for unsupported protocol.
  1148. //
  1149. #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
  1150. typedef struct s_pxe_cpb_mcast_ip_to_mac {
  1151. //
  1152. // Multicast IP address to be converted to multicast MAC address.
  1153. //
  1154. PXE_IP_ADDR IP;
  1155. } PXE_CPB_MCAST_IP_TO_MAC;
  1156. typedef struct s_pxe_db_mcast_ip_to_mac {
  1157. //
  1158. // Multicast MAC address.
  1159. //
  1160. PXE_MAC_ADDR MAC;
  1161. } PXE_DB_MCAST_IP_TO_MAC;
  1162. typedef struct s_pxe_cpb_nvdata_sparse {
  1163. //
  1164. // NvData item list. Only items in this list will be updated.
  1165. //
  1166. struct {
  1167. // Non-volatile storage address to be changed.
  1168. PXE_UINT32 Addr;
  1169. // Data item to write into above storage address.
  1170. union {
  1171. PXE_UINT8 Byte;
  1172. PXE_UINT16 Word;
  1173. PXE_UINT32 Dword;
  1174. } Data;
  1175. } Item[MAX_EEPROM_LEN];
  1176. } PXE_CPB_NVDATA_SPARSE;
  1177. //
  1178. // When using bulk update, the size of the CPB structure must be
  1179. // the same size as the non-volatile NIC storage.
  1180. //
  1181. typedef union u_pxe_cpb_nvdata_bulk {
  1182. //
  1183. // Array of byte-wide data items.
  1184. //
  1185. PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
  1186. //
  1187. // Array of word-wide data items.
  1188. //
  1189. PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
  1190. //
  1191. // Array of dword-wide data items.
  1192. //
  1193. PXE_UINT32 Dword[MAX_EEPROM_LEN];
  1194. } PXE_CPB_NVDATA_BULK;
  1195. typedef struct s_pxe_db_nvdata {
  1196. // Arrays of data items from non-volatile storage.
  1197. union {
  1198. //
  1199. // Array of byte-wide data items.
  1200. //
  1201. PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
  1202. //
  1203. // Array of word-wide data items.
  1204. //
  1205. PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
  1206. // Array of dword-wide data items.
  1207. PXE_UINT32 Dword[MAX_EEPROM_LEN];
  1208. } Data;
  1209. } PXE_DB_NVDATA;
  1210. typedef struct s_pxe_db_get_status {
  1211. //
  1212. // Length of next receive frame (header + data). If this is zero,
  1213. // there is no next receive frame available.
  1214. //
  1215. PXE_UINT32 RxFrameLen;
  1216. //
  1217. // Reserved, set to zero.
  1218. //
  1219. PXE_UINT32 reserved;
  1220. //
  1221. // Addresses of transmitted buffers that need to be recycled.
  1222. //
  1223. PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];
  1224. } PXE_DB_GET_STATUS;
  1225. typedef struct s_pxe_cpb_fill_header {
  1226. //
  1227. // Source and destination MAC addresses. These will be copied into
  1228. // the media header without doing byte swapping.
  1229. //
  1230. PXE_MAC_ADDR SrcAddr;
  1231. PXE_MAC_ADDR DestAddr;
  1232. //
  1233. // Address of first byte of media header. The first byte of packet data
  1234. // follows the last byte of the media header.
  1235. //
  1236. PXE_UINT64 MediaHeader;
  1237. //
  1238. // Length of packet data in bytes (not including the media header).
  1239. //
  1240. PXE_UINT32 PacketLen;
  1241. //
  1242. // Protocol type. This will be copied into the media header without
  1243. // doing byte swapping. Protocol type numbers can be obtained from
  1244. // the Assigned Numbers RFC 1700.
  1245. //
  1246. PXE_UINT16 Protocol;
  1247. //
  1248. // Length of the media header in bytes.
  1249. //
  1250. PXE_UINT16 MediaHeaderLen;
  1251. } PXE_CPB_FILL_HEADER;
  1252. #define PXE_PROTOCOL_ETHERNET_IP 0x0800
  1253. #define PXE_PROTOCOL_ETHERNET_ARP 0x0806
  1254. #define MAX_XMIT_FRAGMENTS 16
  1255. typedef struct s_pxe_cpb_fill_header_fragmented {
  1256. //
  1257. // Source and destination MAC addresses. These will be copied into
  1258. // the media header without doing byte swapping.
  1259. //
  1260. PXE_MAC_ADDR SrcAddr;
  1261. PXE_MAC_ADDR DestAddr;
  1262. //
  1263. // Length of packet data in bytes (not including the media header).
  1264. //
  1265. PXE_UINT32 PacketLen;
  1266. //
  1267. // Protocol type. This will be copied into the media header without
  1268. // doing byte swapping. Protocol type numbers can be obtained from
  1269. // the Assigned Numbers RFC 1700.
  1270. //
  1271. PXE_MEDIA_PROTOCOL Protocol;
  1272. //
  1273. // Length of the media header in bytes.
  1274. //
  1275. PXE_UINT16 MediaHeaderLen;
  1276. //
  1277. // Number of packet fragment descriptors.
  1278. //
  1279. PXE_UINT16 FragCnt;
  1280. //
  1281. // Reserved, must be set to zero.
  1282. //
  1283. PXE_UINT16 reserved;
  1284. //
  1285. // Array of packet fragment descriptors. The first byte of the media
  1286. // header is the first byte of the first fragment.
  1287. //
  1288. struct {
  1289. //
  1290. // Address of this packet fragment.
  1291. //
  1292. PXE_UINT64 FragAddr;
  1293. //
  1294. // Length of this packet fragment.
  1295. //
  1296. PXE_UINT32 FragLen;
  1297. //
  1298. // Reserved, must be set to zero.
  1299. //
  1300. PXE_UINT32 reserved;
  1301. } FragDesc[MAX_XMIT_FRAGMENTS];
  1302. } PXE_CPB_FILL_HEADER_FRAGMENTED;
  1303. typedef struct s_pxe_cpb_transmit {
  1304. //
  1305. // Address of first byte of frame buffer. This is also the first byte
  1306. // of the media header.
  1307. //
  1308. PXE_UINT64 FrameAddr;
  1309. //
  1310. // Length of the data portion of the frame buffer in bytes. Do not
  1311. // include the length of the media header.
  1312. //
  1313. PXE_UINT32 DataLen;
  1314. //
  1315. // Length of the media header in bytes.
  1316. //
  1317. PXE_UINT16 MediaheaderLen;
  1318. //
  1319. // Reserved, must be zero.
  1320. //
  1321. PXE_UINT16 reserved;
  1322. } PXE_CPB_TRANSMIT;
  1323. typedef struct s_pxe_cpb_transmit_fragments {
  1324. //
  1325. // Length of packet data in bytes (not including the media header).
  1326. //
  1327. PXE_UINT32 FrameLen;
  1328. //
  1329. // Length of the media header in bytes.
  1330. //
  1331. PXE_UINT16 MediaheaderLen;
  1332. //
  1333. // Number of packet fragment descriptors.
  1334. //
  1335. PXE_UINT16 FragCnt;
  1336. //
  1337. // Array of frame fragment descriptors. The first byte of the first
  1338. // fragment is also the first byte of the media header.
  1339. //
  1340. struct {
  1341. //
  1342. // Address of this frame fragment.
  1343. //
  1344. PXE_UINT64 FragAddr;
  1345. //
  1346. // Length of this frame fragment.
  1347. //
  1348. PXE_UINT32 FragLen;
  1349. //
  1350. // Reserved, must be set to zero.
  1351. //
  1352. PXE_UINT32 reserved;
  1353. } FragDesc[MAX_XMIT_FRAGMENTS];
  1354. } PXE_CPB_TRANSMIT_FRAGMENTS;
  1355. typedef struct s_pxe_cpb_receive {
  1356. //
  1357. // Address of first byte of receive buffer. This is also the first byte
  1358. // of the frame header.
  1359. //
  1360. PXE_UINT64 BufferAddr;
  1361. //
  1362. // Length of receive buffer. This must be large enough to hold the
  1363. // received frame (media header + data). If the length of smaller than
  1364. // the received frame, data will be lost.
  1365. //
  1366. PXE_UINT32 BufferLen;
  1367. //
  1368. // Reserved, must be set to zero.
  1369. //
  1370. PXE_UINT32 reserved;
  1371. } PXE_CPB_RECEIVE;
  1372. typedef struct s_pxe_db_receive {
  1373. //
  1374. // Source and destination MAC addresses from media header.
  1375. //
  1376. PXE_MAC_ADDR SrcAddr;
  1377. PXE_MAC_ADDR DestAddr;
  1378. //
  1379. // Length of received frame. May be larger than receive buffer size.
  1380. // The receive buffer will not be overwritten. This is how to tell
  1381. // if data was lost because the receive buffer was too small.
  1382. //
  1383. PXE_UINT32 FrameLen;
  1384. //
  1385. // Protocol type from media header.
  1386. //
  1387. PXE_MEDIA_PROTOCOL Protocol;
  1388. //
  1389. // Length of media header in received frame.
  1390. //
  1391. PXE_UINT16 MediaHeaderLen;
  1392. //
  1393. // Type of receive frame.
  1394. //
  1395. PXE_FRAME_TYPE Type;
  1396. //
  1397. // Reserved, must be zero.
  1398. //
  1399. PXE_UINT8 reserved[7];
  1400. } PXE_DB_RECEIVE;
  1401. #pragma pack()
  1402. /* EOF - efi_pxe.h */
  1403. #endif /* _EFI_PXE_H */