route80h.c 3.1 KB

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  1. #include <efi.h>
  2. #include <efilib.h>
  3. /* this example program changes the Reserved Page Route (RPR) bit on ICH10's General
  4. * Control And Status Register (GCS) from LPC to PCI. In practical terms, it routes
  5. * outb to port 80h to the PCI bus. */
  6. #define GCS_OFFSET_ADDR 0x3410
  7. #define GCS_RPR_SHIFT 2
  8. #define GCS_RPR_PCI 1
  9. #define GCS_RPR_LPC 0
  10. #define VENDOR_ID_INTEL 0x8086
  11. #define DEVICE_ID_LPCIF 0x3a16
  12. #define DEVICE_ID_COUGARPOINT_LPCIF 0x1c56
  13. static EFI_HANDLE ImageHandle;
  14. typedef struct {
  15. uint16_t vendor_id; /* 00-01 */
  16. uint16_t device_id; /* 02-03 */
  17. char pad[0xEB]; /* 04-EF */
  18. uint32_t rcba; /* F0-F3 */
  19. uint32_t reserved[3]; /* F4-FF */
  20. } lpcif_t;
  21. static inline void set_bit(volatile uint32_t *flag, int bit, int value)
  22. {
  23. uint32_t val = *flag;
  24. Print(L"current value is 0x%2x\n", val);
  25. if (value) {
  26. val |= (1 << bit);
  27. } else {
  28. val &= ~(1 << bit);
  29. }
  30. Print(L"setting value to 0x%2x\n", val);
  31. *flag = val;
  32. val = *flag;
  33. Print(L"new value is 0x%2x\n", val);
  34. }
  35. static int is_device(EFI_PCI_IO *pciio, uint16_t vendor_id, uint16_t device_id)
  36. {
  37. lpcif_t lpcif;
  38. EFI_STATUS rc;
  39. rc = uefi_call_wrapper(pciio->Pci.Read, 5, pciio, EfiPciIoWidthUint16, 0, 2, &lpcif);
  40. if (EFI_ERROR(rc))
  41. return 0;
  42. if (vendor_id == lpcif.vendor_id && device_id == lpcif.device_id)
  43. return 1;
  44. return 0;
  45. }
  46. static EFI_STATUS find_pci_device(uint16_t vendor_id, uint16_t device_id,
  47. EFI_PCI_IO **pciio)
  48. {
  49. EFI_STATUS rc;
  50. EFI_HANDLE *Handles;
  51. UINTN NoHandles, i;
  52. if (!pciio)
  53. return EFI_INVALID_PARAMETER;
  54. rc = LibLocateHandle(ByProtocol, &PciIoProtocol, NULL, &NoHandles,
  55. &Handles);
  56. if (EFI_ERROR(rc))
  57. return rc;
  58. for (i = 0; i < NoHandles; i++) {
  59. void *pciio_tmp = NULL;
  60. rc = uefi_call_wrapper(BS->OpenProtocol, 6, Handles[i],
  61. &PciIoProtocol, &pciio_tmp, ImageHandle,
  62. NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL);
  63. if (EFI_ERROR(rc))
  64. continue;
  65. *pciio = pciio_tmp;
  66. if (!is_device(*pciio, vendor_id, device_id)) {
  67. *pciio = NULL;
  68. continue;
  69. }
  70. return EFI_SUCCESS;
  71. }
  72. return EFI_NOT_FOUND;
  73. }
  74. EFI_STATUS
  75. efi_main (EFI_HANDLE image_handle, EFI_SYSTEM_TABLE *systab)
  76. {
  77. InitializeLib(image_handle, systab);
  78. EFI_PCI_IO *pciio = NULL;
  79. lpcif_t lpcif;
  80. EFI_STATUS rc = EFI_SUCCESS;
  81. struct {
  82. uint16_t vendor;
  83. uint16_t device;
  84. } devices[] = {
  85. { VENDOR_ID_INTEL, DEVICE_ID_LPCIF },
  86. { VENDOR_ID_INTEL, DEVICE_ID_COUGARPOINT_LPCIF },
  87. { 0, 0 }
  88. };
  89. int i;
  90. ImageHandle = image_handle;
  91. for (i = 0; devices[i].vendor != 0; i++) {
  92. rc = find_pci_device(devices[i].vendor, devices[i].device, &pciio);
  93. if (EFI_ERROR(rc))
  94. continue;
  95. }
  96. if (rc == EFI_NOT_FOUND) {
  97. Print(L"Device not found.\n");
  98. return rc;
  99. } else if (EFI_ERROR(rc)) {
  100. return rc;
  101. }
  102. rc = uefi_call_wrapper(pciio->Pci.Read, 5, pciio, EfiPciIoWidthUint32,
  103. EFI_FIELD_OFFSET(lpcif_t, rcba), 1, &lpcif.rcba);
  104. if (EFI_ERROR(rc))
  105. return rc;
  106. if (!(lpcif.rcba & 1)) {
  107. Print(L"rcrb is not mapped, cannot route port 80h\n");
  108. return EFI_UNSUPPORTED;
  109. }
  110. lpcif.rcba &= ~1UL;
  111. Print(L"rcba: 0x%8x\n", lpcif.rcba, lpcif.rcba);
  112. set_bit((uint32_t *)(intptr_t)(lpcif.rcba + GCS_OFFSET_ADDR),
  113. GCS_RPR_SHIFT, GCS_RPR_PCI);
  114. return EFI_SUCCESS;
  115. }