0004-j2.diff 3.6 KB

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  1. --- gcc-5.2.0.orig/gcc/config.gcc
  2. +++ gcc-5.2.0/gcc/config.gcc
  3. @@ -2668,7 +2671,7 @@
  4. sh2a-single-only | sh2a-single | sh2a-nofpu | sh2a | \
  5. sh4a-single-only | sh4a-single | sh4a-nofpu | sh4a | sh4al | \
  6. sh4-single-only | sh4-single | sh4-nofpu | sh4 | sh4-300 | \
  7. - sh3e | sh3 | sh2e | sh2 | sh1) ;;
  8. + sh3e | sh3 | sh2e | sh2 | sh1 | shj2 ) ;;
  9. "") sh_cpu_default=${sh_cpu_target} ;;
  10. *) echo "with_cpu=$with_cpu not supported"; exit 1 ;;
  11. esac
  12. @@ -2687,9 +2690,9 @@
  13. sh_multilibs="`echo $sh_multilibs|sed -e s/m4/sh4-nofpu/ -e s/,m4-[^,]*//g -e s/,m[23]e// -e s/m2a,m2a-single/m2a-nofpu/ -e s/m5-..m....,//g`"
  14. fi
  15. fi
  16. - target_cpu_default=SELECT_`echo ${sh_cpu_default}|tr abcdefghijklmnopqrstuvwxyz- ABCDEFGHIJKLMNOPQRSTUVWXYZ_`
  17. + target_cpu_default=SELECT_`echo ${sh_cpu_default}|sed 's/^shj/j/'|tr abcdefghijklmnopqrstuvwxyz- ABCDEFGHIJKLMNOPQRSTUVWXYZ_`
  18. tm_defines=${tm_defines}' SH_MULTILIB_CPU_DEFAULT=\"'`echo $sh_cpu_default|sed s/sh/m/`'\"'
  19. - tm_defines="$tm_defines SUPPORT_`echo $sh_cpu_default | sed 's/^m/sh/' | tr abcdefghijklmnopqrstuvwxyz- ABCDEFGHIJKLMNOPQRSTUVWXYZ_`=1"
  20. + tm_defines="$tm_defines SUPPORT_`echo $sh_cpu_default | sed -e 's/^m/sh/' -e 's/^shj/j/' | tr abcdefghijklmnopqrstuvwxyz- ABCDEFGHIJKLMNOPQRSTUVWXYZ_`=1"
  21. sh_multilibs=`echo $sh_multilibs | sed -e 's/,/ /g' -e 's/^[Ss][Hh]/m/' -e 's/ [Ss][Hh]/ m/g' | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ_ abcdefghijklmnopqrstuvwxyz-`
  22. for sh_multilib in ${sh_multilibs}; do
  23. case ${sh_multilib} in
  24. @@ -4106,6 +4109,8 @@
  25. ;;
  26. m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al)
  27. ;;
  28. + mj2)
  29. + ;;
  30. *)
  31. echo "Unknown CPU used in --with-cpu=$with_cpu, known values:" 1>&2
  32. echo "m1 m2 m2e m3 m3e m4 m4-single m4-single-only m4-nofpu" 1>&2
  33. --- gcc-5.2.0.orig/gcc/config/sh/sh.h
  34. +++ gcc-5.2.0/gcc/config/sh/sh.h
  35. @@ -139,6 +139,7 @@
  36. #define SELECT_SH2A_SINGLE (MASK_SH_E | MASK_HARD_SH2A \
  37. | MASK_FPU_SINGLE | MASK_HARD_SH2A_DOUBLE \
  38. | MASK_SH2 | MASK_SH1)
  39. +#define SELECT_J2 (MASK_SH2 | MASK_J2 | SELECT_SH1)
  40. #define SELECT_SH3 (MASK_SH3 | SELECT_SH2)
  41. #define SELECT_SH3E (MASK_SH_E | MASK_FPU_SINGLE | SELECT_SH3)
  42. #define SELECT_SH4_NOFPU (MASK_HARD_SH4 | SELECT_SH3)
  43. @@ -162,6 +163,9 @@
  44. #define SUPPORT_SH2 1
  45. #endif
  46. #if SUPPORT_SH2
  47. +#define SUPPORT_J2 1
  48. +#endif
  49. +#ifdef SUPPORT_J2
  50. #define SUPPORT_SH3 1
  51. #define SUPPORT_SH2A_NOFPU 1
  52. #endif
  53. @@ -211,7 +215,7 @@
  54. #define MASK_ARCH (MASK_SH1 | MASK_SH2 | MASK_SH3 | MASK_SH_E | MASK_SH4 \
  55. | MASK_HARD_SH2A | MASK_HARD_SH2A_DOUBLE | MASK_SH4A \
  56. | MASK_HARD_SH4 | MASK_FPU_SINGLE | MASK_SH5 \
  57. - | MASK_FPU_SINGLE_ONLY)
  58. + | MASK_FPU_SINGLE_ONLY | MASK_J2)
  59. /* This defaults us to big-endian. */
  60. #ifndef TARGET_ENDIAN_DEFAULT
  61. @@ -271,6 +275,7 @@
  62. %(subtarget_asm_isa_spec) %(subtarget_asm_spec) \
  63. %{m1:--isa=sh} \
  64. %{m2:--isa=sh2} \
  65. +%{mj2:--isa=any} \
  66. %{m2e:--isa=sh2e} \
  67. %{m3:--isa=sh3} \
  68. %{m3e:--isa=sh3e} \
  69. @@ -1834,7 +1839,7 @@
  70. /* Nonzero if the target supports dynamic shift instructions
  71. like shad and shld. */
  72. -#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A)
  73. +#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A || TARGET_J2)
  74. /* The cost of using the dynamic shift insns (shad, shld) are the same
  75. if they are available. If they are not available a library function will
  76. --- gcc-5.2.0.orig/gcc/config/sh/sh.opt
  77. +++ gcc-5.2.0/gcc/config/sh/sh.opt
  78. @@ -71,6 +71,10 @@
  79. Target RejectNegative Condition(SUPPORT_SH2E)
  80. Generate SH2e code
  81. +mj2
  82. +Target RejectNegative Mask(J2) Condition(SUPPORT_J2)
  83. +Generate J2 code
  84. +
  85. m3
  86. Target RejectNegative Mask(SH3) Condition(SUPPORT_SH3)
  87. Generate SH3 code