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@@ -36,10 +36,14 @@ fn test_exit() {
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// Example for InstructionType::AluBinary.
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#[test]
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fn test_add64() {
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- assert_eq!(asm("add64 r1, r3"),
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- Ok(vec![insn(ebpf::ADD64_REG, 1, 3, 0, 0)]));
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- assert_eq!(asm("add64 r1, 5"),
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- Ok(vec![insn(ebpf::ADD64_IMM, 1, 0, 0, 5)]));
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+ assert_eq!(
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+ asm("add64 r1, r3"),
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+ Ok(vec![insn(ebpf::ADD64_REG, 1, 3, 0, 0)])
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+ );
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+ assert_eq!(
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+ asm("add64 r1, 5"),
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+ Ok(vec![insn(ebpf::ADD64_IMM, 1, 0, 0, 5)])
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+ );
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}
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// Example for InstructionType::AluUnary.
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@@ -51,22 +55,28 @@ fn test_neg64() {
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// Example for InstructionType::LoadReg.
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#[test]
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fn test_ldxw() {
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- assert_eq!(asm("ldxw r1, [r2+5]"),
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- Ok(vec![insn(ebpf::LD_W_REG, 1, 2, 5, 0)]));
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+ assert_eq!(
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+ asm("ldxw r1, [r2+5]"),
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+ Ok(vec![insn(ebpf::LD_W_REG, 1, 2, 5, 0)])
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+ );
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}
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// Example for InstructionType::StoreImm.
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#[test]
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fn test_stw() {
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- assert_eq!(asm("stw [r2+5], 7"),
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- Ok(vec![insn(ebpf::ST_W_IMM, 2, 0, 5, 7)]));
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+ assert_eq!(
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+ asm("stw [r2+5], 7"),
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+ Ok(vec![insn(ebpf::ST_W_IMM, 2, 0, 5, 7)])
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+ );
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}
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// Example for InstructionType::StoreReg.
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#[test]
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fn test_stxw() {
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- assert_eq!(asm("stxw [r2+5], r8"),
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- Ok(vec![insn(ebpf::ST_W_REG, 2, 8, 5, 0)]));
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+ assert_eq!(
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+ asm("stxw [r2+5], r8"),
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+ Ok(vec![insn(ebpf::ST_W_REG, 2, 8, 5, 0)])
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+ );
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}
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// Example for InstructionType::JumpUnconditional.
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@@ -79,10 +89,14 @@ fn test_ja() {
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// Example for InstructionType::JumpConditional.
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#[test]
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fn test_jeq() {
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- assert_eq!(asm("jeq r1, 4, +8"),
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- Ok(vec![insn(ebpf::JEQ_IMM, 1, 0, 8, 4)]));
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- assert_eq!(asm("jeq r1, r3, +8"),
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- Ok(vec![insn(ebpf::JEQ_REG, 1, 3, 8, 0)]));
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+ assert_eq!(
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+ asm("jeq r1, 4, +8"),
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+ Ok(vec![insn(ebpf::JEQ_IMM, 1, 0, 8, 4)])
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+ );
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+ assert_eq!(
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+ asm("jeq r1, r3, +8"),
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+ Ok(vec![insn(ebpf::JEQ_REG, 1, 3, 8, 0)])
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+ );
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}
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// Example for InstructionType::Call.
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@@ -100,11 +114,20 @@ fn test_be32() {
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// Example for InstructionType::LoadImm.
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#[test]
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fn test_lddw() {
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- assert_eq!(asm("lddw r1, 0x1234abcd5678eeff"),
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- Ok(vec![insn(ebpf::LD_DW_IMM, 1, 0, 0, 0x5678eeff), insn(0, 0, 0, 0, 0x1234abcd)]));
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- assert_eq!(asm("lddw r1, 0xff11ee22dd33cc44"),
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- Ok(vec![insn(ebpf::LD_DW_IMM, 1, 0, 0, 0xdd33cc44u32 as i32),
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- insn(0, 0, 0, 0, 0xff11ee22u32 as i32)]));
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+ assert_eq!(
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+ asm("lddw r1, 0x1234abcd5678eeff"),
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+ Ok(vec![
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+ insn(ebpf::LD_DW_IMM, 1, 0, 0, 0x5678eeff),
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+ insn(0, 0, 0, 0, 0x1234abcd)
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+ ])
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+ );
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+ assert_eq!(
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+ asm("lddw r1, 0xff11ee22dd33cc44"),
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+ Ok(vec![
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+ insn(ebpf::LD_DW_IMM, 1, 0, 0, 0xdd33cc44u32 as i32),
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+ insn(0, 0, 0, 0, 0xff11ee22u32 as i32)
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+ ])
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+ );
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}
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// Example for InstructionType::LoadAbs.
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@@ -116,35 +139,44 @@ fn test_ldabsw() {
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// Example for InstructionType::LoadInd.
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#[test]
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fn test_ldindw() {
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- assert_eq!(asm("ldindw r1, 2"),
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- Ok(vec![insn(ebpf::LD_IND_W, 0, 1, 0, 2)]));
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+ assert_eq!(
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+ asm("ldindw r1, 2"),
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+ Ok(vec![insn(ebpf::LD_IND_W, 0, 1, 0, 2)])
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+ );
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}
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// Example for InstructionType::LoadReg.
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#[test]
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fn test_ldxdw() {
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- assert_eq!(asm("ldxdw r1, [r2+3]"),
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- Ok(vec![insn(ebpf::LD_DW_REG, 1, 2, 3, 0)]));
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+ assert_eq!(
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+ asm("ldxdw r1, [r2+3]"),
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+ Ok(vec![insn(ebpf::LD_DW_REG, 1, 2, 3, 0)])
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+ );
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}
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// Example for InstructionType::StoreImm.
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#[test]
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fn test_sth() {
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- assert_eq!(asm("sth [r1+2], 3"),
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- Ok(vec![insn(ebpf::ST_H_IMM, 1, 0, 2, 3)]));
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+ assert_eq!(
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+ asm("sth [r1+2], 3"),
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+ Ok(vec![insn(ebpf::ST_H_IMM, 1, 0, 2, 3)])
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+ );
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}
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// Example for InstructionType::StoreReg.
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#[test]
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fn test_stxh() {
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- assert_eq!(asm("stxh [r1+2], r3"),
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- Ok(vec![insn(ebpf::ST_H_REG, 1, 3, 2, 0)]));
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+ assert_eq!(
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+ asm("stxh [r1+2], r3"),
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+ Ok(vec![insn(ebpf::ST_H_REG, 1, 3, 2, 0)])
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+ );
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}
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// Test all supported AluBinary mnemonics.
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#[test]
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fn test_alu_binary() {
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- assert_eq!(asm("
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+ assert_eq!(
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+ asm("
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add r1, r2
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sub r1, r2
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mul r1, r2
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@@ -158,20 +190,24 @@ fn test_alu_binary() {
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mov r1, r2
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arsh r1, r2
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"),
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- Ok(vec![insn(ebpf::ADD64_REG, 1, 2, 0, 0),
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- insn(ebpf::SUB64_REG, 1, 2, 0, 0),
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- insn(ebpf::MUL64_REG, 1, 2, 0, 0),
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- insn(ebpf::DIV64_REG, 1, 2, 0, 0),
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- insn(ebpf::OR64_REG, 1, 2, 0, 0),
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- insn(ebpf::AND64_REG, 1, 2, 0, 0),
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- insn(ebpf::LSH64_REG, 1, 2, 0, 0),
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- insn(ebpf::RSH64_REG, 1, 2, 0, 0),
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- insn(ebpf::MOD64_REG, 1, 2, 0, 0),
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- insn(ebpf::XOR64_REG, 1, 2, 0, 0),
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- insn(ebpf::MOV64_REG, 1, 2, 0, 0),
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- insn(ebpf::ARSH64_REG, 1, 2, 0, 0)]));
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-
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- assert_eq!(asm("
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+ Ok(vec![
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+ insn(ebpf::ADD64_REG, 1, 2, 0, 0),
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+ insn(ebpf::SUB64_REG, 1, 2, 0, 0),
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+ insn(ebpf::MUL64_REG, 1, 2, 0, 0),
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+ insn(ebpf::DIV64_REG, 1, 2, 0, 0),
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+ insn(ebpf::OR64_REG, 1, 2, 0, 0),
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+ insn(ebpf::AND64_REG, 1, 2, 0, 0),
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+ insn(ebpf::LSH64_REG, 1, 2, 0, 0),
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+ insn(ebpf::RSH64_REG, 1, 2, 0, 0),
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+ insn(ebpf::MOD64_REG, 1, 2, 0, 0),
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+ insn(ebpf::XOR64_REG, 1, 2, 0, 0),
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+ insn(ebpf::MOV64_REG, 1, 2, 0, 0),
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+ insn(ebpf::ARSH64_REG, 1, 2, 0, 0)
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+ ])
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+ );
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+
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+ assert_eq!(
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+ asm("
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add r1, 2
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sub r1, 2
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mul r1, 2
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@@ -185,20 +221,24 @@ fn test_alu_binary() {
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mov r1, 2
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arsh r1, 2
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"),
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- Ok(vec![insn(ebpf::ADD64_IMM, 1, 0, 0, 2),
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- insn(ebpf::SUB64_IMM, 1, 0, 0, 2),
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- insn(ebpf::MUL64_IMM, 1, 0, 0, 2),
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- insn(ebpf::DIV64_IMM, 1, 0, 0, 2),
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- insn(ebpf::OR64_IMM, 1, 0, 0, 2),
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- insn(ebpf::AND64_IMM, 1, 0, 0, 2),
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- insn(ebpf::LSH64_IMM, 1, 0, 0, 2),
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- insn(ebpf::RSH64_IMM, 1, 0, 0, 2),
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- insn(ebpf::MOD64_IMM, 1, 0, 0, 2),
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- insn(ebpf::XOR64_IMM, 1, 0, 0, 2),
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- insn(ebpf::MOV64_IMM, 1, 0, 0, 2),
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- insn(ebpf::ARSH64_IMM, 1, 0, 0, 2)]));
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-
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- assert_eq!(asm("
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+ Ok(vec![
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+ insn(ebpf::ADD64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::SUB64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::MUL64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::DIV64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::OR64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::AND64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::LSH64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::RSH64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::MOD64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::XOR64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::MOV64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::ARSH64_IMM, 1, 0, 0, 2)
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+ ])
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+ );
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+
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+ assert_eq!(
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+ asm("
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add64 r1, r2
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sub64 r1, r2
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mul64 r1, r2
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@@ -212,20 +252,24 @@ fn test_alu_binary() {
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mov64 r1, r2
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arsh64 r1, r2
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"),
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- Ok(vec![insn(ebpf::ADD64_REG, 1, 2, 0, 0),
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- insn(ebpf::SUB64_REG, 1, 2, 0, 0),
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- insn(ebpf::MUL64_REG, 1, 2, 0, 0),
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- insn(ebpf::DIV64_REG, 1, 2, 0, 0),
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- insn(ebpf::OR64_REG, 1, 2, 0, 0),
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- insn(ebpf::AND64_REG, 1, 2, 0, 0),
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- insn(ebpf::LSH64_REG, 1, 2, 0, 0),
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- insn(ebpf::RSH64_REG, 1, 2, 0, 0),
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- insn(ebpf::MOD64_REG, 1, 2, 0, 0),
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- insn(ebpf::XOR64_REG, 1, 2, 0, 0),
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- insn(ebpf::MOV64_REG, 1, 2, 0, 0),
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- insn(ebpf::ARSH64_REG, 1, 2, 0, 0)]));
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-
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- assert_eq!(asm("
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+ Ok(vec![
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+ insn(ebpf::ADD64_REG, 1, 2, 0, 0),
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+ insn(ebpf::SUB64_REG, 1, 2, 0, 0),
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+ insn(ebpf::MUL64_REG, 1, 2, 0, 0),
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+ insn(ebpf::DIV64_REG, 1, 2, 0, 0),
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+ insn(ebpf::OR64_REG, 1, 2, 0, 0),
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+ insn(ebpf::AND64_REG, 1, 2, 0, 0),
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+ insn(ebpf::LSH64_REG, 1, 2, 0, 0),
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+ insn(ebpf::RSH64_REG, 1, 2, 0, 0),
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+ insn(ebpf::MOD64_REG, 1, 2, 0, 0),
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+ insn(ebpf::XOR64_REG, 1, 2, 0, 0),
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+ insn(ebpf::MOV64_REG, 1, 2, 0, 0),
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+ insn(ebpf::ARSH64_REG, 1, 2, 0, 0)
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+ ])
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+ );
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+
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+ assert_eq!(
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+ asm("
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add64 r1, 2
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sub64 r1, 2
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mul64 r1, 2
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@@ -239,20 +283,24 @@ fn test_alu_binary() {
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mov64 r1, 2
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arsh64 r1, 2
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"),
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- Ok(vec![insn(ebpf::ADD64_IMM, 1, 0, 0, 2),
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- insn(ebpf::SUB64_IMM, 1, 0, 0, 2),
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- insn(ebpf::MUL64_IMM, 1, 0, 0, 2),
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- insn(ebpf::DIV64_IMM, 1, 0, 0, 2),
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- insn(ebpf::OR64_IMM, 1, 0, 0, 2),
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- insn(ebpf::AND64_IMM, 1, 0, 0, 2),
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- insn(ebpf::LSH64_IMM, 1, 0, 0, 2),
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- insn(ebpf::RSH64_IMM, 1, 0, 0, 2),
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- insn(ebpf::MOD64_IMM, 1, 0, 0, 2),
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- insn(ebpf::XOR64_IMM, 1, 0, 0, 2),
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- insn(ebpf::MOV64_IMM, 1, 0, 0, 2),
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- insn(ebpf::ARSH64_IMM, 1, 0, 0, 2)]));
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-
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- assert_eq!(asm("
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+ Ok(vec![
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+ insn(ebpf::ADD64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::SUB64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::MUL64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::DIV64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::OR64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::AND64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::LSH64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::RSH64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::MOD64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::XOR64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::MOV64_IMM, 1, 0, 0, 2),
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+ insn(ebpf::ARSH64_IMM, 1, 0, 0, 2)
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+ ])
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+ );
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+
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+ assert_eq!(
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+ asm("
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add32 r1, r2
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sub32 r1, r2
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mul32 r1, r2
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@@ -266,20 +314,24 @@ fn test_alu_binary() {
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mov32 r1, r2
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arsh32 r1, r2
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"),
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- Ok(vec![insn(ebpf::ADD32_REG, 1, 2, 0, 0),
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- insn(ebpf::SUB32_REG, 1, 2, 0, 0),
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- insn(ebpf::MUL32_REG, 1, 2, 0, 0),
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- insn(ebpf::DIV32_REG, 1, 2, 0, 0),
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- insn(ebpf::OR32_REG, 1, 2, 0, 0),
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- insn(ebpf::AND32_REG, 1, 2, 0, 0),
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- insn(ebpf::LSH32_REG, 1, 2, 0, 0),
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- insn(ebpf::RSH32_REG, 1, 2, 0, 0),
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- insn(ebpf::MOD32_REG, 1, 2, 0, 0),
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- insn(ebpf::XOR32_REG, 1, 2, 0, 0),
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- insn(ebpf::MOV32_REG, 1, 2, 0, 0),
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- insn(ebpf::ARSH32_REG, 1, 2, 0, 0)]));
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-
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- assert_eq!(asm("
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+ Ok(vec![
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+ insn(ebpf::ADD32_REG, 1, 2, 0, 0),
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+ insn(ebpf::SUB32_REG, 1, 2, 0, 0),
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+ insn(ebpf::MUL32_REG, 1, 2, 0, 0),
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+ insn(ebpf::DIV32_REG, 1, 2, 0, 0),
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+ insn(ebpf::OR32_REG, 1, 2, 0, 0),
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+ insn(ebpf::AND32_REG, 1, 2, 0, 0),
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+ insn(ebpf::LSH32_REG, 1, 2, 0, 0),
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+ insn(ebpf::RSH32_REG, 1, 2, 0, 0),
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|
|
+ insn(ebpf::MOD32_REG, 1, 2, 0, 0),
|
|
|
+ insn(ebpf::XOR32_REG, 1, 2, 0, 0),
|
|
|
+ insn(ebpf::MOV32_REG, 1, 2, 0, 0),
|
|
|
+ insn(ebpf::ARSH32_REG, 1, 2, 0, 0)
|
|
|
+ ])
|
|
|
+ );
|
|
|
+
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
add32 r1, 2
|
|
|
sub32 r1, 2
|
|
|
mul32 r1, 2
|
|
@@ -293,112 +345,140 @@ fn test_alu_binary() {
|
|
|
mov32 r1, 2
|
|
|
arsh32 r1, 2
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::ADD32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::SUB32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::MUL32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::DIV32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::OR32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::AND32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::LSH32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::RSH32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::MOD32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::XOR32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::MOV32_IMM, 1, 0, 0, 2),
|
|
|
- insn(ebpf::ARSH32_IMM, 1, 0, 0, 2)]));
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::ADD32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::SUB32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::MUL32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::DIV32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::OR32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::AND32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::LSH32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::RSH32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::MOD32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::XOR32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::MOV32_IMM, 1, 0, 0, 2),
|
|
|
+ insn(ebpf::ARSH32_IMM, 1, 0, 0, 2)
|
|
|
+ ])
|
|
|
+ );
|
|
|
}
|
|
|
|
|
|
// Test all supported AluUnary mnemonics.
|
|
|
#[test]
|
|
|
fn test_alu_unary() {
|
|
|
- assert_eq!(asm("
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
neg r1
|
|
|
neg64 r1
|
|
|
neg32 r1
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::NEG64, 1, 0, 0, 0),
|
|
|
- insn(ebpf::NEG64, 1, 0, 0, 0),
|
|
|
- insn(ebpf::NEG32, 1, 0, 0, 0)]));
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::NEG64, 1, 0, 0, 0),
|
|
|
+ insn(ebpf::NEG64, 1, 0, 0, 0),
|
|
|
+ insn(ebpf::NEG32, 1, 0, 0, 0)
|
|
|
+ ])
|
|
|
+ );
|
|
|
}
|
|
|
|
|
|
// Test all supported LoadAbs mnemonics.
|
|
|
#[test]
|
|
|
fn test_load_abs() {
|
|
|
- assert_eq!(asm("
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
ldabsw 1
|
|
|
ldabsh 1
|
|
|
ldabsb 1
|
|
|
ldabsdw 1
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::LD_ABS_W, 0, 0, 0, 1),
|
|
|
- insn(ebpf::LD_ABS_H, 0, 0, 0, 1),
|
|
|
- insn(ebpf::LD_ABS_B, 0, 0, 0, 1),
|
|
|
- insn(ebpf::LD_ABS_DW, 0, 0, 0, 1)]));
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::LD_ABS_W, 0, 0, 0, 1),
|
|
|
+ insn(ebpf::LD_ABS_H, 0, 0, 0, 1),
|
|
|
+ insn(ebpf::LD_ABS_B, 0, 0, 0, 1),
|
|
|
+ insn(ebpf::LD_ABS_DW, 0, 0, 0, 1)
|
|
|
+ ])
|
|
|
+ );
|
|
|
}
|
|
|
|
|
|
// Test all supported LoadInd mnemonics.
|
|
|
#[test]
|
|
|
fn test_load_ind() {
|
|
|
- assert_eq!(asm("
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
ldindw r1, 2
|
|
|
ldindh r1, 2
|
|
|
ldindb r1, 2
|
|
|
ldinddw r1, 2
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::LD_IND_W, 0, 1, 0, 2),
|
|
|
- insn(ebpf::LD_IND_H, 0, 1, 0, 2),
|
|
|
- insn(ebpf::LD_IND_B, 0, 1, 0, 2),
|
|
|
- insn(ebpf::LD_IND_DW, 0, 1, 0, 2)]));
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::LD_IND_W, 0, 1, 0, 2),
|
|
|
+ insn(ebpf::LD_IND_H, 0, 1, 0, 2),
|
|
|
+ insn(ebpf::LD_IND_B, 0, 1, 0, 2),
|
|
|
+ insn(ebpf::LD_IND_DW, 0, 1, 0, 2)
|
|
|
+ ])
|
|
|
+ );
|
|
|
}
|
|
|
|
|
|
// Test all supported LoadReg mnemonics.
|
|
|
#[test]
|
|
|
fn test_load_reg() {
|
|
|
- assert_eq!(asm("
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
ldxw r1, [r2+3]
|
|
|
ldxh r1, [r2+3]
|
|
|
ldxb r1, [r2+3]
|
|
|
ldxdw r1, [r2+3]
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::LD_W_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::LD_H_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::LD_B_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::LD_DW_REG, 1, 2, 3, 0)]));
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::LD_W_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::LD_H_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::LD_B_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::LD_DW_REG, 1, 2, 3, 0)
|
|
|
+ ])
|
|
|
+ );
|
|
|
}
|
|
|
|
|
|
// Test all supported StoreImm mnemonics.
|
|
|
#[test]
|
|
|
fn test_store_imm() {
|
|
|
- assert_eq!(asm("
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
stw [r1+2], 3
|
|
|
sth [r1+2], 3
|
|
|
stb [r1+2], 3
|
|
|
stdw [r1+2], 3
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::ST_W_IMM, 1, 0, 2, 3),
|
|
|
- insn(ebpf::ST_H_IMM, 1, 0, 2, 3),
|
|
|
- insn(ebpf::ST_B_IMM, 1, 0, 2, 3),
|
|
|
- insn(ebpf::ST_DW_IMM, 1, 0, 2, 3)]));
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::ST_W_IMM, 1, 0, 2, 3),
|
|
|
+ insn(ebpf::ST_H_IMM, 1, 0, 2, 3),
|
|
|
+ insn(ebpf::ST_B_IMM, 1, 0, 2, 3),
|
|
|
+ insn(ebpf::ST_DW_IMM, 1, 0, 2, 3)
|
|
|
+ ])
|
|
|
+ );
|
|
|
}
|
|
|
|
|
|
// Test all supported StoreReg mnemonics.
|
|
|
#[test]
|
|
|
fn test_store_reg() {
|
|
|
- assert_eq!(asm("
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
stxw [r1+2], r3
|
|
|
stxh [r1+2], r3
|
|
|
stxb [r1+2], r3
|
|
|
stxdw [r1+2], r3
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::ST_W_REG, 1, 3, 2, 0),
|
|
|
- insn(ebpf::ST_H_REG, 1, 3, 2, 0),
|
|
|
- insn(ebpf::ST_B_REG, 1, 3, 2, 0),
|
|
|
- insn(ebpf::ST_DW_REG, 1, 3, 2, 0)]));
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::ST_W_REG, 1, 3, 2, 0),
|
|
|
+ insn(ebpf::ST_H_REG, 1, 3, 2, 0),
|
|
|
+ insn(ebpf::ST_B_REG, 1, 3, 2, 0),
|
|
|
+ insn(ebpf::ST_DW_REG, 1, 3, 2, 0)
|
|
|
+ ])
|
|
|
+ );
|
|
|
}
|
|
|
|
|
|
// Test all supported JumpConditional mnemonics.
|
|
|
#[test]
|
|
|
fn test_jump_conditional() {
|
|
|
- assert_eq!(asm("
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
jeq r1, r2, +3
|
|
|
jgt r1, r2, +3
|
|
|
jge r1, r2, +3
|
|
@@ -411,19 +491,23 @@ fn test_jump_conditional() {
|
|
|
jslt r1, r2, +3
|
|
|
jsle r1, r2, +3
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::JEQ_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JGT_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JGE_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JLT_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JLE_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSET_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JNE_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSGT_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSGE_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSLT_REG, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSLE_REG, 1, 2, 3, 0)]));
|
|
|
-
|
|
|
- assert_eq!(asm("
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::JEQ_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JGT_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JGE_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JLT_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JLE_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSET_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JNE_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSGT_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSGE_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSLT_REG, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSLE_REG, 1, 2, 3, 0)
|
|
|
+ ])
|
|
|
+ );
|
|
|
+
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
jeq r1, 2, +3
|
|
|
jgt r1, 2, +3
|
|
|
jge r1, 2, +3
|
|
@@ -436,19 +520,23 @@ fn test_jump_conditional() {
|
|
|
jslt r1, 2, +3
|
|
|
jsle r1, 2, +3
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::JEQ_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JGT_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JGE_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JLT_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JLE_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSET_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JNE_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSGT_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSGE_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSLT_IMM, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSLE_IMM, 1, 0, 3, 2)]));
|
|
|
-
|
|
|
- assert_eq!(asm("
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::JEQ_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JGT_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JGE_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JLT_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JLE_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSET_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JNE_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSGT_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSGE_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSLT_IMM, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSLE_IMM, 1, 0, 3, 2)
|
|
|
+ ])
|
|
|
+ );
|
|
|
+
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
jeq32 r1, r2, +3
|
|
|
jgt32 r1, r2, +3
|
|
|
jge32 r1, r2, +3
|
|
@@ -461,19 +549,23 @@ fn test_jump_conditional() {
|
|
|
jslt32 r1, r2, +3
|
|
|
jsle32 r1, r2, +3
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::JEQ_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JGT_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JGE_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JLT_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JLE_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSET_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JNE_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSGT_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSGE_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSLT_REG32, 1, 2, 3, 0),
|
|
|
- insn(ebpf::JSLE_REG32, 1, 2, 3, 0)]));
|
|
|
-
|
|
|
- assert_eq!(asm("
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::JEQ_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JGT_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JGE_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JLT_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JLE_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSET_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JNE_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSGT_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSGE_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSLT_REG32, 1, 2, 3, 0),
|
|
|
+ insn(ebpf::JSLE_REG32, 1, 2, 3, 0)
|
|
|
+ ])
|
|
|
+ );
|
|
|
+
|
|
|
+ assert_eq!(
|
|
|
+ asm("
|
|
|
jeq32 r1, 2, +3
|
|
|
jgt32 r1, 2, +3
|
|
|
jge32 r1, 2, +3
|
|
@@ -486,23 +578,27 @@ fn test_jump_conditional() {
|
|
|
jslt32 r1, 2, +3
|
|
|
jsle32 r1, 2, +3
|
|
|
"),
|
|
|
- Ok(vec![insn(ebpf::JEQ_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JGT_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JGE_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JLT_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JLE_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSET_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JNE_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSGT_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSGE_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSLT_IMM32, 1, 0, 3, 2),
|
|
|
- insn(ebpf::JSLE_IMM32, 1, 0, 3, 2)]));
|
|
|
+ Ok(vec![
|
|
|
+ insn(ebpf::JEQ_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JGT_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JGE_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JLT_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JLE_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSET_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JNE_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSGT_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSGE_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSLT_IMM32, 1, 0, 3, 2),
|
|
|
+ insn(ebpf::JSLE_IMM32, 1, 0, 3, 2)
|
|
|
+ ])
|
|
|
+ );
|
|
|
}
|
|
|
|
|
|
// Test all supported Endian mnemonics.
|
|
|
#[test]
|
|
|
fn test_endian() {
|
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- assert_eq!(asm("
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+ assert_eq!(
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+ asm("
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be16 r1
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be32 r1
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be64 r1
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@@ -510,20 +606,27 @@ fn test_endian() {
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le32 r1
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le64 r1
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"),
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- Ok(vec![insn(ebpf::BE, 1, 0, 0, 16),
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- insn(ebpf::BE, 1, 0, 0, 32),
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- insn(ebpf::BE, 1, 0, 0, 64),
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- insn(ebpf::LE, 1, 0, 0, 16),
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- insn(ebpf::LE, 1, 0, 0, 32),
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- insn(ebpf::LE, 1, 0, 0, 64)]));
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+ Ok(vec![
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+ insn(ebpf::BE, 1, 0, 0, 16),
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+ insn(ebpf::BE, 1, 0, 0, 32),
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+ insn(ebpf::BE, 1, 0, 0, 64),
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+ insn(ebpf::LE, 1, 0, 0, 16),
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+ insn(ebpf::LE, 1, 0, 0, 32),
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+ insn(ebpf::LE, 1, 0, 0, 64)
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+ ])
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+ );
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}
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#[test]
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fn test_large_immediate() {
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- assert_eq!(asm("add64 r1, 2147483647"),
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- Ok(vec![insn(ebpf::ADD64_IMM, 1, 0, 0, 2147483647)]));
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- assert_eq!(asm("add64 r1, -2147483648"),
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- Ok(vec![insn(ebpf::ADD64_IMM, 1, 0, 0, -2147483648)]));
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+ assert_eq!(
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+ asm("add64 r1, 2147483647"),
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+ Ok(vec![insn(ebpf::ADD64_IMM, 1, 0, 0, 2147483647)])
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+ );
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+ assert_eq!(
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+ asm("add64 r1, -2147483648"),
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+ Ok(vec![insn(ebpf::ADD64_IMM, 1, 0, 0, -2147483648)])
|
|
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+ );
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}
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#[test]
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@@ -538,31 +641,48 @@ fn test_error_invalid_instruction() {
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#[test]
|
|
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fn test_error_unexpected_operands() {
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|
|
- assert_eq!(asm("add 1, 2"),
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|
- Err("Failed to encode add: Unexpected operands: [Integer(1), Integer(2)]"
|
|
|
- .to_string()));
|
|
|
+ assert_eq!(
|
|
|
+ asm("add 1, 2"),
|
|
|
+ Err("Failed to encode add: Unexpected operands: [Integer(1), Integer(2)]".to_string())
|
|
|
+ );
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|
|
}
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|
#[test]
|
|
|
fn test_error_too_many_operands() {
|
|
|
- assert_eq!(asm("add 1, 2, 3, 4"),
|
|
|
- Err("Failed to encode add: Too many operands".to_string()));
|
|
|
+ assert_eq!(
|
|
|
+ asm("add 1, 2, 3, 4"),
|
|
|
+ Err("Failed to encode add: Too many operands".to_string())
|
|
|
+ );
|
|
|
}
|
|
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|
|
|
#[test]
|
|
|
fn test_error_operands_out_of_range() {
|
|
|
- assert_eq!(asm("add r16, r2"),
|
|
|
- Err("Failed to encode add: Invalid destination register 16".to_string()));
|
|
|
- assert_eq!(asm("add r1, r16"),
|
|
|
- Err("Failed to encode add: Invalid source register 16".to_string()));
|
|
|
- assert_eq!(asm("ja -32769"),
|
|
|
- Err("Failed to encode ja: Invalid offset -32769".to_string()));
|
|
|
- assert_eq!(asm("ja 32768"),
|
|
|
- Err("Failed to encode ja: Invalid offset 32768".to_string()));
|
|
|
- assert_eq!(asm("add r1, 4294967296"),
|
|
|
- Err("Failed to encode add: Invalid immediate 4294967296".to_string()));
|
|
|
- assert_eq!(asm("add r1, 2147483648"),
|
|
|
- Err("Failed to encode add: Invalid immediate 2147483648".to_string()));
|
|
|
- assert_eq!(asm("add r1, -2147483649"),
|
|
|
- Err("Failed to encode add: Invalid immediate -2147483649".to_string()));
|
|
|
+ assert_eq!(
|
|
|
+ asm("add r16, r2"),
|
|
|
+ Err("Failed to encode add: Invalid destination register 16".to_string())
|
|
|
+ );
|
|
|
+ assert_eq!(
|
|
|
+ asm("add r1, r16"),
|
|
|
+ Err("Failed to encode add: Invalid source register 16".to_string())
|
|
|
+ );
|
|
|
+ assert_eq!(
|
|
|
+ asm("ja -32769"),
|
|
|
+ Err("Failed to encode ja: Invalid offset -32769".to_string())
|
|
|
+ );
|
|
|
+ assert_eq!(
|
|
|
+ asm("ja 32768"),
|
|
|
+ Err("Failed to encode ja: Invalid offset 32768".to_string())
|
|
|
+ );
|
|
|
+ assert_eq!(
|
|
|
+ asm("add r1, 4294967296"),
|
|
|
+ Err("Failed to encode add: Invalid immediate 4294967296".to_string())
|
|
|
+ );
|
|
|
+ assert_eq!(
|
|
|
+ asm("add r1, 2147483648"),
|
|
|
+ Err("Failed to encode add: Invalid immediate 2147483648".to_string())
|
|
|
+ );
|
|
|
+ assert_eq!(
|
|
|
+ asm("add r1, -2147483649"),
|
|
|
+ Err("Failed to encode add: Invalid immediate -2147483649".to_string())
|
|
|
+ );
|
|
|
}
|