src/assembler.rs, src/disassembler.rs: fix some tests

The test for the assembler and the disassembler is not correct, the
bytecode does not correspond to what is written in assembly.

- Fix the bytecode.
- Use R2 instead of R8 as R8 is not initialized (kernel would reject
  that).
- Add a proper test in assembler.rs to make sure we get the expected
  bytecode. The test should not show in the generated documentation.

No test added for the disassembler, because the function does not return
the generated string (it simply outputs it).

src/assembler.rs

@@ -213,9 +213,16 @@ fn assemble_internal(parsed: &[Instruction]) -> Result<Vec<Insn>, String> {
 ///                      mov64 r2, 0x32
 ///                      mov64 r1, r0
 ///                      be16 r0
-///                      neg64 r8
+///                      neg64 r2
 ///                      exit");
 /// println!("{:?}", prog);
+/// # assert_eq!(prog,
+/// #            Ok(vec![0x07, 0x01, 0x00, 0x00, 0x05, 0x06, 0x00, 0x00,
+/// #                    0xb7, 0x02, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00,
+/// #                    0xbf, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/// #                    0xdc, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
+/// #                    0x87, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/// #                    0x95, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00]));
 /// ```
 ///
 /// This will produce the following output:
@@ -223,9 +230,9 @@ fn assemble_internal(parsed: &[Instruction]) -> Result<Vec<Insn>, String> {
 /// ```test
 /// Ok([0x07, 0x01, 0x00, 0x00, 0x05, 0x06, 0x00, 0x00,
 ///     0xb7, 0x02, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00,
-///     0xbf, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
-///     0xdc, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
-///     0x87, 0x08, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
+///     0xbf, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+///     0xdc, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
+///     0x87, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 ///     0x95, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00])
 /// ```
 pub fn assemble(src: &str) -> Result<Vec<u8>, String> {

src/disassembler.rs

@@ -324,12 +324,13 @@ pub fn to_insn_vec(prog: &[u8]) -> Vec<HLInsn> {
 /// let prog = &[
 ///     0x07, 0x01, 0x00, 0x00, 0x05, 0x06, 0x00, 0x00,
 ///     0xb7, 0x02, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00,
-///     0xbf, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
-///     0xdc, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
-///     0x87, 0x08, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
+///     0xbf, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+///     0xdc, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
+///     0x87, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 ///     0x95, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 /// ];
 /// disassembler::disassemble(prog);
+/// # // "\nadd64 r1, 0x605\nmov64 r2, 0x32\nmov64 r1, r0\nbe16 r0\nneg64 r2\nexit"
 /// ```
 ///
 /// This will produce the following output:
@@ -339,7 +340,7 @@ pub fn to_insn_vec(prog: &[u8]) -> Vec<HLInsn> {
 /// mov64 r2, 0x32
 /// mov64 r1, r0
 /// be16 r0
-/// neg64 r8
+/// neg64 r2
 /// exit
 /// ```
 pub fn disassemble(prog: &[u8]) {