Store and load operations apply the offset to different arguments

Instruction set according to:
https://github.com/iovisor/bpf-docs/blob/master/eBPF.md

src/disassembler.rs

@@ -35,7 +35,12 @@ fn ld_st_imm_str(name: &str, insn: &ebpf::Insn) -> String {
 }
 
 #[inline]
-fn ld_st_reg_str(name: &str, insn: &ebpf::Insn) -> String {
+fn ld_reg_str(name: &str, insn: &ebpf::Insn) -> String {
+    format!("{} r{}, [r{}+{:#x}]", name, insn.dst, insn.src, insn.off)
+}
+
+#[inline]
+fn st_reg_str(name: &str, insn: &ebpf::Insn) -> String {
     format!("{} [r{}+{:#x}], r{}", name, insn.dst, insn.off, insn.src)
 }
 
@@ -182,10 +187,10 @@ pub fn to_insn_vec(prog: &[u8]) -> Vec<HLInsn> {
             },
 
             // BPF_LDX class
-            ebpf::LD_B_REG   => { name = "ldxb";  desc = ld_st_reg_str(name, &insn); },
-            ebpf::LD_H_REG   => { name = "ldxh";  desc = ld_st_reg_str(name, &insn); },
-            ebpf::LD_W_REG   => { name = "ldxw";  desc = ld_st_reg_str(name, &insn); },
-            ebpf::LD_DW_REG  => { name = "ldxdw"; desc = ld_st_reg_str(name, &insn); },
+            ebpf::LD_B_REG   => { name = "ldxb";  desc = ld_reg_str(name, &insn); },
+            ebpf::LD_H_REG   => { name = "ldxh";  desc = ld_reg_str(name, &insn); },
+            ebpf::LD_W_REG   => { name = "ldxw";  desc = ld_reg_str(name, &insn); },
+            ebpf::LD_DW_REG  => { name = "ldxdw"; desc = ld_reg_str(name, &insn); },
 
             // BPF_ST class
             ebpf::ST_B_IMM   => { name = "stb";  desc = ld_st_imm_str(name, &insn); },
@@ -194,12 +199,12 @@ pub fn to_insn_vec(prog: &[u8]) -> Vec<HLInsn> {
             ebpf::ST_DW_IMM  => { name = "stdw"; desc = ld_st_imm_str(name, &insn); },
 
             // BPF_STX class
-            ebpf::ST_B_REG   => { name = "stxb";      desc = ld_st_reg_str(name, &insn); },
-            ebpf::ST_H_REG   => { name = "stxh";      desc = ld_st_reg_str(name, &insn); },
-            ebpf::ST_W_REG   => { name = "stxw";      desc = ld_st_reg_str(name, &insn); },
-            ebpf::ST_DW_REG  => { name = "stxdw";     desc = ld_st_reg_str(name, &insn); },
-            ebpf::ST_W_XADD  => { name = "stxxaddw";  desc = ld_st_reg_str(name, &insn); },
-            ebpf::ST_DW_XADD => { name = "stxxadddw"; desc = ld_st_reg_str(name, &insn); },
+            ebpf::ST_B_REG   => { name = "stxb";      desc = st_reg_str(name, &insn); },
+            ebpf::ST_H_REG   => { name = "stxh";      desc = st_reg_str(name, &insn); },
+            ebpf::ST_W_REG   => { name = "stxw";      desc = st_reg_str(name, &insn); },
+            ebpf::ST_DW_REG  => { name = "stxdw";     desc = st_reg_str(name, &insn); },
+            ebpf::ST_W_XADD  => { name = "stxxaddw";  desc = st_reg_str(name, &insn); },
+            ebpf::ST_DW_XADD => { name = "stxxadddw"; desc = st_reg_str(name, &insn); },
 
             // BPF_ALU class
             ebpf::ADD32_IMM  => { name = "add32";  desc = alu_imm_str(name, &insn);  },