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@@ -216,10 +216,15 @@ mod tests {
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let (a, b) = (f32::from_repr(a.0), f32::from_repr(b.0));
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let x = super::__addsf3(a, b);
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- if let Some(addsf3) = gcc_s::addsf3() {
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- x.eq_repr(unsafe { addsf3(a, b) })
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- } else {
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- x.eq_repr(a + b)
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+ match gcc_s::addsf3() {
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+ // NOTE(cfg) for some reason, on hard float targets, our implementation doesn't
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+ // match the output of its gcc_s counterpart. Until we investigate further, we'll
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+ // just avoid testing against gcc_s on those targets. Do note that our
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+ // implementation matches the output of the FPU instruction on *hard* float targets
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+ // and matches its gcc_s counterpart on *soft* float targets.
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+ #[cfg(not(gnueabihf))]
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+ Some(addsf3) => x.eq_repr(unsafe { addsf3(a, b) }),
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+ _ => x.eq_repr(a + b),
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}
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}
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@@ -227,10 +232,12 @@ mod tests {
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let (a, b) = (f64::from_repr(a.0), f64::from_repr(b.0));
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let x = super::__adddf3(a, b);
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- if let Some(adddf3) = gcc_s::adddf3() {
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- x.eq_repr(unsafe { adddf3(a, b) })
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- } else {
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- x.eq_repr(a + b)
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+ match gcc_s::adddf3() {
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+ // NOTE(cfg) See NOTE above
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+ #[cfg(not(gnueabihf))]
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+ Some(adddf3) => x.eq_repr(unsafe { adddf3(a, b) }),
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+ _ => x.eq_repr(a + b),
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+
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}
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}
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}
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