|  | @@ -36,8 +36,8 @@
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				|  |  |  #endif
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				|  |  |  
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				|  |  |  /* The high 32 bits contain fpcr, low 32 contain fpsr. */
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				|  |  | -typedef	__uint64_t	fenv_t;
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				|  |  | -typedef	__uint64_t	fexcept_t;
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				|  |  | +typedef	uint64_t	fenv_t;
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				|  |  | +typedef	uint64_t	fexcept_t;
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				|  |  |  
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				|  |  |  /* Exception flags */
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				|  |  |  #define	FE_INVALID	0x00000001
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				|  | @@ -158,8 +158,8 @@ fesetround(int __round)
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				|  |  |  __fenv_static inline int
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				|  |  |  fegetenv(fenv_t *__envp)
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				|  |  |  {
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				|  |  | -	__uint64_t fpcr;
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				|  |  | -	__uint64_t fpsr;
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				|  |  | +	uint64_t fpcr;
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				|  |  | +	uint64_t fpsr;
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				|  |  |  
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				|  |  |  	__mrs_fpcr(fpcr);
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				|  |  |  	__mrs_fpsr(fpsr);
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				|  | @@ -179,7 +179,7 @@ feholdexcept(fenv_t *__envp)
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				|  |  |  	__msr_fpcr(__r);
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				|  |  |  
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				|  |  |  	__mrs_fpsr(__r);
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				|  |  | -	*__envp |= (__uint32_t)__r;
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				|  |  | +	*__envp |= (uint32_t)__r;
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				|  |  |  	__r &= ~(_ENABLE_MASK);
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				|  |  |  	__msr_fpsr(__r);
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				|  |  |  	return (0);
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				|  | @@ -190,7 +190,7 @@ fesetenv(const fenv_t *__envp)
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				|  |  |  {
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				|  |  |  
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				|  |  |  	__msr_fpcr((*__envp) >> 32);
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				|  |  | -	__msr_fpsr((fenv_t)(__uint32_t)*__envp);
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				|  |  | +	__msr_fpsr((fenv_t)(uint32_t)*__envp);
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				|  |  |  	return (0);
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				|  |  |  }
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				|  |  |  
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