openlibm_fenv_arm.h 5.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228
  1. /*-
  2. * Copyright (c) 2004-2005 David Schultz <[email protected]>
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. *
  14. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24. * SUCH DAMAGE.
  25. *
  26. * $FreeBSD: src/lib/msun/arm/fenv.h,v 1.6 2011/10/10 15:43:09 das Exp $
  27. */
  28. #ifndef _FENV_H_
  29. #define _FENV_H_
  30. #include <stdint.h>
  31. #include "cdefs-compat.h"
  32. #ifndef __fenv_static
  33. #define __fenv_static static
  34. #endif
  35. typedef uint32_t fenv_t;
  36. typedef uint32_t fexcept_t;
  37. /* Exception flags */
  38. #define FE_INVALID 0x0001
  39. #define FE_DIVBYZERO 0x0002
  40. #define FE_OVERFLOW 0x0004
  41. #define FE_UNDERFLOW 0x0008
  42. #define FE_INEXACT 0x0010
  43. #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
  44. FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
  45. /* Rounding modes */
  46. #define FE_TONEAREST 0x0000
  47. #define FE_TOWARDZERO 0x0001
  48. #define FE_UPWARD 0x0002
  49. #define FE_DOWNWARD 0x0003
  50. #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
  51. FE_UPWARD | FE_TOWARDZERO)
  52. __BEGIN_DECLS
  53. /* Default floating-point environment */
  54. extern const fenv_t __fe_dfl_env;
  55. #define FE_DFL_ENV (&__fe_dfl_env)
  56. /* We need to be able to map status flag positions to mask flag positions */
  57. #define _FPUSW_SHIFT 16
  58. #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
  59. #if defined(__aarch64__)
  60. #define __rfs(__fpsr) __asm __volatile("mrs %0,fpsr" : "=r" (*(__fpsr)))
  61. #define __wfs(__fpsr) __asm __volatile("msr fpsr,%0" : : "r" (__fpsr))
  62. #elif defined(ARM_HARD_FLOAT)
  63. #define __rfs(__fpsr) __asm __volatile("rfs %0" : "=r" (*(__fpsr)))
  64. #define __wfs(__fpsr) __asm __volatile("wfs %0" : : "r" (__fpsr))
  65. #else
  66. #define __rfs(__fpsr)
  67. #define __wfs(__fpsr)
  68. #endif
  69. __fenv_static inline int
  70. feclearexcept(int __excepts)
  71. {
  72. fexcept_t __fpsr;
  73. __rfs(&__fpsr);
  74. __fpsr &= ~__excepts;
  75. __wfs(__fpsr);
  76. return (0);
  77. }
  78. __fenv_static inline int
  79. fegetexceptflag(fexcept_t *__flagp, int __excepts)
  80. {
  81. fexcept_t __fpsr;
  82. __rfs(&__fpsr);
  83. *__flagp = __fpsr & __excepts;
  84. return (0);
  85. }
  86. __fenv_static inline int
  87. fesetexceptflag(const fexcept_t *__flagp, int __excepts)
  88. {
  89. fexcept_t __fpsr;
  90. __rfs(&__fpsr);
  91. __fpsr &= ~__excepts;
  92. __fpsr |= *__flagp & __excepts;
  93. __wfs(__fpsr);
  94. return (0);
  95. }
  96. __fenv_static inline int
  97. feraiseexcept(int __excepts)
  98. {
  99. fexcept_t __ex = __excepts;
  100. fesetexceptflag(&__ex, __excepts); /* XXX */
  101. return (0);
  102. }
  103. __fenv_static inline int
  104. fetestexcept(int __excepts)
  105. {
  106. fexcept_t __fpsr;
  107. __rfs(&__fpsr);
  108. return (__fpsr & __excepts);
  109. }
  110. __fenv_static inline int
  111. fegetround(void)
  112. {
  113. /*
  114. * Apparently, the rounding mode is specified as part of the
  115. * instruction format on ARM, so the dynamic rounding mode is
  116. * indeterminate. Some FPUs may differ.
  117. */
  118. return (-1);
  119. }
  120. __fenv_static inline int
  121. fesetround(int __round)
  122. {
  123. return (-1);
  124. }
  125. __fenv_static inline int
  126. fegetenv(fenv_t *__envp)
  127. {
  128. __rfs(__envp);
  129. return (0);
  130. }
  131. __fenv_static inline int
  132. feholdexcept(fenv_t *__envp)
  133. {
  134. fenv_t __env;
  135. __rfs(&__env);
  136. *__envp = __env;
  137. __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
  138. __wfs(__env);
  139. return (0);
  140. }
  141. __fenv_static inline int
  142. fesetenv(const fenv_t *__envp)
  143. {
  144. __wfs(*__envp);
  145. return (0);
  146. }
  147. __fenv_static inline int
  148. feupdateenv(const fenv_t *__envp)
  149. {
  150. fexcept_t __fpsr;
  151. __rfs(&__fpsr);
  152. __wfs(*__envp);
  153. feraiseexcept(__fpsr & FE_ALL_EXCEPT);
  154. return (0);
  155. }
  156. #if __BSD_VISIBLE
  157. /* We currently provide no external definitions of the functions below. */
  158. static inline int
  159. feenableexcept(int __mask)
  160. {
  161. fenv_t __old_fpsr, __new_fpsr;
  162. __rfs(&__old_fpsr);
  163. __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT;
  164. __wfs(__new_fpsr);
  165. return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
  166. }
  167. static inline int
  168. fedisableexcept(int __mask)
  169. {
  170. fenv_t __old_fpsr, __new_fpsr;
  171. __rfs(&__old_fpsr);
  172. __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
  173. __wfs(__new_fpsr);
  174. return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
  175. }
  176. static inline int
  177. fegetexcept(void)
  178. {
  179. fenv_t __fpsr;
  180. __rfs(&__fpsr);
  181. return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
  182. }
  183. #endif /* __BSD_VISIBLE */
  184. __END_DECLS
  185. #endif /* !_FENV_H_ */