openlibm_fenv_arm.h 5.3 KB

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  1. /*-
  2. * Copyright (c) 2004-2005 David Schultz <[email protected]>
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. *
  14. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24. * SUCH DAMAGE.
  25. *
  26. * $FreeBSD: src/lib/msun/arm/fenv.h,v 1.6 2011/10/10 15:43:09 das Exp $
  27. */
  28. #ifndef _FENV_H_
  29. #define _FENV_H_
  30. #include <stdint.h>
  31. #include "cdefs-compat.h"
  32. #ifndef __fenv_static
  33. #define __fenv_static static
  34. #endif
  35. typedef uint32_t fenv_t;
  36. typedef uint32_t fexcept_t;
  37. /* Exception flags */
  38. #define FE_INVALID 0x0001
  39. #define FE_DIVBYZERO 0x0002
  40. #define FE_OVERFLOW 0x0004
  41. #define FE_UNDERFLOW 0x0008
  42. #define FE_INEXACT 0x0010
  43. #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
  44. FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
  45. /* Rounding modes */
  46. #define FE_TONEAREST 0x0000
  47. #define FE_TOWARDZERO 0x0001
  48. #define FE_UPWARD 0x0002
  49. #define FE_DOWNWARD 0x0003
  50. #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
  51. FE_UPWARD | FE_TOWARDZERO)
  52. __BEGIN_DECLS
  53. /* Default floating-point environment */
  54. extern const fenv_t __fe_dfl_env;
  55. #define FE_DFL_ENV (&__fe_dfl_env)
  56. /* We need to be able to map status flag positions to mask flag positions */
  57. #define _FPUSW_SHIFT 16
  58. #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
  59. #if defined(__aarch64__)
  60. #define __rfs(__fpsr) __asm __volatile("mrs %0,fpsr" : "=r" (*(__fpsr)))
  61. #define __wfs(__fpsr) __asm __volatile("msr fpsr,%0" : : "r" (__fpsr))
  62. /* Test for hardware support for ARM floating point operations, explicitly
  63. checking for float and double support, see "ARM C Language Extensions", 6.5.1 */
  64. #elif defined(__ARM_FP) && (__ARM_FP & 0x0C) != 0
  65. #define __rfs(__fpsr) __asm __volatile("vmrs %0,fpscr" : "=&r" (*(__fpsr)))
  66. #define __wfs(__fpsr) __asm __volatile("vmsr fpscr,%0" : : "r" (__fpsr))
  67. #else
  68. #define __rfs(__fpsr) (*(__fpsr) = 0)
  69. #define __wfs(__fpsr)
  70. #endif
  71. __fenv_static inline int
  72. feclearexcept(int __excepts)
  73. {
  74. fexcept_t __fpsr;
  75. __rfs(&__fpsr);
  76. __fpsr &= ~__excepts;
  77. __wfs(__fpsr);
  78. return (0);
  79. }
  80. __fenv_static inline int
  81. fegetexceptflag(fexcept_t *__flagp, int __excepts)
  82. {
  83. fexcept_t __fpsr;
  84. __rfs(&__fpsr);
  85. *__flagp = __fpsr & __excepts;
  86. return (0);
  87. }
  88. __fenv_static inline int
  89. fesetexceptflag(const fexcept_t *__flagp, int __excepts)
  90. {
  91. fexcept_t __fpsr;
  92. __rfs(&__fpsr);
  93. __fpsr &= ~__excepts;
  94. __fpsr |= *__flagp & __excepts;
  95. __wfs(__fpsr);
  96. return (0);
  97. }
  98. __fenv_static inline int
  99. feraiseexcept(int __excepts)
  100. {
  101. fexcept_t __ex = __excepts;
  102. fesetexceptflag(&__ex, __excepts); /* XXX */
  103. return (0);
  104. }
  105. __fenv_static inline int
  106. fetestexcept(int __excepts)
  107. {
  108. fexcept_t __fpsr;
  109. __rfs(&__fpsr);
  110. return (__fpsr & __excepts);
  111. }
  112. __fenv_static inline int
  113. fegetround(void)
  114. {
  115. /*
  116. * Apparently, the rounding mode is specified as part of the
  117. * instruction format on ARM, so the dynamic rounding mode is
  118. * indeterminate. Some FPUs may differ.
  119. */
  120. return (-1);
  121. }
  122. __fenv_static inline int
  123. fesetround(int __round)
  124. {
  125. return (-1);
  126. }
  127. __fenv_static inline int
  128. fegetenv(fenv_t *__envp)
  129. {
  130. __rfs(__envp);
  131. return (0);
  132. }
  133. __fenv_static inline int
  134. feholdexcept(fenv_t *__envp)
  135. {
  136. fenv_t __env;
  137. __rfs(&__env);
  138. *__envp = __env;
  139. __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
  140. __wfs(__env);
  141. return (0);
  142. }
  143. __fenv_static inline int
  144. fesetenv(const fenv_t *__envp)
  145. {
  146. __wfs(*__envp);
  147. return (0);
  148. }
  149. __fenv_static inline int
  150. feupdateenv(const fenv_t *__envp)
  151. {
  152. fexcept_t __fpsr;
  153. __rfs(&__fpsr);
  154. __wfs(*__envp);
  155. feraiseexcept(__fpsr & FE_ALL_EXCEPT);
  156. return (0);
  157. }
  158. #if __BSD_VISIBLE
  159. /* We currently provide no external definitions of the functions below. */
  160. static inline int
  161. feenableexcept(int __mask)
  162. {
  163. fenv_t __old_fpsr, __new_fpsr;
  164. __rfs(&__old_fpsr);
  165. __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT;
  166. __wfs(__new_fpsr);
  167. return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
  168. }
  169. static inline int
  170. fedisableexcept(int __mask)
  171. {
  172. fenv_t __old_fpsr, __new_fpsr;
  173. __rfs(&__old_fpsr);
  174. __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
  175. __wfs(__new_fpsr);
  176. return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
  177. }
  178. static inline int
  179. fegetexcept(void)
  180. {
  181. fenv_t __fpsr;
  182. __rfs(&__fpsr);
  183. return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
  184. }
  185. #endif /* __BSD_VISIBLE */
  186. __END_DECLS
  187. #endif /* !_FENV_H_ */