Merge #37

37: Fix _start_trap save/restore sequences r=laanwj a=Disasm



Co-authored-by: Vadim Kaushan <admin@disasm.info>

riscv-rt/asm.S

@@ -1,3 +1,5 @@
+#include "asm.h"
+
 /*
     Entry point of all programs (_start).
 
@@ -88,45 +90,45 @@ _start:
 .global _start_trap
 
 _start_trap:
-    addi sp, sp, -16*4
-
-    sw ra, 0*4(sp)
-    sw t0, 1*4(sp)
-    sw t1, 2*4(sp)
-    sw t2, 3*4(sp)
-    sw t3, 4*4(sp)
-    sw t4, 5*4(sp)
-    sw t5, 6*4(sp)
-    sw t6, 7*4(sp)
-    sw a0, 8*4(sp)
-    sw a1, 9*4(sp)
-    sw a2, 10*4(sp)
-    sw a3, 11*4(sp)
-    sw a4, 12*4(sp)
-    sw a5, 13*4(sp)
-    sw a6, 14*4(sp)
-    sw a7, 15*4(sp)
+    addi sp, sp, -16*REGBYTES
+
+    STORE ra, 0*REGBYTES(sp)
+    STORE t0, 1*REGBYTES(sp)
+    STORE t1, 2*REGBYTES(sp)
+    STORE t2, 3*REGBYTES(sp)
+    STORE t3, 4*REGBYTES(sp)
+    STORE t4, 5*REGBYTES(sp)
+    STORE t5, 6*REGBYTES(sp)
+    STORE t6, 7*REGBYTES(sp)
+    STORE a0, 8*REGBYTES(sp)
+    STORE a1, 9*REGBYTES(sp)
+    STORE a2, 10*REGBYTES(sp)
+    STORE a3, 11*REGBYTES(sp)
+    STORE a4, 12*REGBYTES(sp)
+    STORE a5, 13*REGBYTES(sp)
+    STORE a6, 14*REGBYTES(sp)
+    STORE a7, 15*REGBYTES(sp)
 
     jal ra, _start_trap_rust
 
-    lw ra, 0*4(sp)
-    lw t0, 1*4(sp)
-    lw t1, 2*4(sp)
-    lw t2, 3*4(sp)
-    lw t3, 4*4(sp)
-    lw t4, 5*4(sp)
-    lw t5, 6*4(sp)
-    lw t6, 7*4(sp)
-    lw a0, 8*4(sp)
-    lw a1, 9*4(sp)
-    lw a2, 10*4(sp)
-    lw a3, 11*4(sp)
-    lw a4, 12*4(sp)
-    lw a5, 13*4(sp)
-    lw a6, 14*4(sp)
-    lw a7, 15*4(sp)
-
-    addi sp, sp, 16*4
+    LOAD ra, 0*REGBYTES(sp)
+    LOAD t0, 1*REGBYTES(sp)
+    LOAD t1, 2*REGBYTES(sp)
+    LOAD t2, 3*REGBYTES(sp)
+    LOAD t3, 4*REGBYTES(sp)
+    LOAD t4, 5*REGBYTES(sp)
+    LOAD t5, 6*REGBYTES(sp)
+    LOAD t6, 7*REGBYTES(sp)
+    LOAD a0, 8*REGBYTES(sp)
+    LOAD a1, 9*REGBYTES(sp)
+    LOAD a2, 10*REGBYTES(sp)
+    LOAD a3, 11*REGBYTES(sp)
+    LOAD a4, 12*REGBYTES(sp)
+    LOAD a5, 13*REGBYTES(sp)
+    LOAD a6, 14*REGBYTES(sp)
+    LOAD a7, 15*REGBYTES(sp)
+
+    addi sp, sp, 16*REGBYTES
     mret
 
 

riscv-rt/asm.h

@@ -0,0 +1,15 @@
+#ifndef _RISCV_RT_ASM_H
+#define _RISCV_RT_ASM_H
+
+#if __riscv_xlen == 64
+# define STORE    sd
+# define LOAD     ld
+# define LOG_REGBYTES 3
+#else
+# define STORE    sw
+# define LOAD     lw
+# define LOG_REGBYTES 2
+#endif
+#define REGBYTES (1 << LOG_REGBYTES)
+
+#endif