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mark .init and .trap sections as executable

This is needed for lld, otherwise it will complain about section flag
mismatch:

    ld.lld: error: incompatible section flags for .text
    >>> target/riscv32imac-unknown-none/debug/deps/libriscv_rt-7850ee1a6233fbe9.rlib(riscv_rt-7850ee1a6233fbe9.4tmuw4s4crjeqbm5.rcgu.o):(.trap): 0x4
    >>> output section .text: 0x6
Dan Callaghan 6 年之前
父節點
當前提交
353894662c
共有 1 個文件被更改,包括 2 次插入2 次删除
  1. 2 2
      riscv-rt/src/lib.rs

+ 2 - 2
riscv-rt/src/lib.rs

@@ -205,7 +205,7 @@ extern "C" {
 /// pointer. Then it calls _start_rust.
 #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
 global_asm!(r#"
-.section .init
+.section .init, "ax"
 .globl _start
 _start:
   .cfi_startproc
@@ -295,7 +295,7 @@ macro_rules! entry {
 /// restores caller saved registers and then returns.
 #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
 global_asm!(r#"
-  .section .trap
+  .section .trap, "ax"
   .align 4
   .global _start_trap