Addressing review

README.md

@@ -1,35 +1,18 @@
-[![crates.io](https://img.shields.io/crates/d/riscv.svg)](https://crates.io/crates/riscv)
-[![crates.io](https://img.shields.io/crates/v/riscv.svg)](https://crates.io/crates/riscv)
-[![Build Status](https://travis-ci.org/rust-embedded/riscv.svg?branch=master)](https://travis-ci.org/rust-embedded/riscv)
+# RISC-V crates
 
-# `riscv`
+This repository contains various crates useful for writing Rust programs on RISC-V microcontrollers:
 
-> Low level access to RISC-V processors
+* [`riscv`]: CPU peripheral access and intrinsics
+* [`riscv-rt`]: Startup code and interrupt handling
 
-This project is developed and maintained by the [RISC-V team][team].
-
-## [Documentation](https://docs.rs/crate/riscv)
-
-## Minimum Supported Rust Version (MSRV)
-
-This crate is guaranteed to compile on stable Rust 1.60 and up. It *might*
-compile with older versions but that may change in any new patch release.
 
-## License
-
-Copyright 2019-2022 [RISC-V team][team]
+This project is developed and maintained by the [RISC-V team][team].
 
-Permission to use, copy, modify, and/or distribute this software for any purpose
-with or without fee is hereby granted, provided that the above copyright notice
-and this permission notice appear in all copies.
+### Contribution
 
-THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
-REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND
-FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
-INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
-OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
-TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
-THIS SOFTWARE.
+Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the
+work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any
+additional terms or conditions.
 
 ## Code of Conduct
 
@@ -37,5 +20,7 @@ Contribution to this crate is organized under the terms of the [Rust Code of
 Conduct][CoC], the maintainer of this crate, the [RISC-V team][team], promises
 to intervene to uphold that code of conduct.
 
-[CoC]: CODE_OF_CONDUCT.md
+[`riscv`]: https://crates.io/crates/riscv
+[`riscv-rt`]: https://crates.io/crates/riscv-rt
 [team]: https://github.com/rust-embedded/wg#the-risc-v-team
+[CoC]: CODE_OF_CONDUCT.md

riscv-rt/README.md

@@ -1,6 +1,5 @@
 [![crates.io](https://img.shields.io/crates/d/riscv-rt.svg)](https://crates.io/crates/riscv-rt)
 [![crates.io](https://img.shields.io/crates/v/riscv-rt.svg)](https://crates.io/crates/riscv-rt)
-[![Build Status](https://travis-ci.org/rust-embedded/riscv-rt.svg?branch=master)](https://travis-ci.org/rust-embedded/riscv-rt)
 
 # `riscv-rt`
 

riscv-rt/macros/Cargo.toml

@@ -9,7 +9,7 @@ documentation = "https://docs.rs/riscv-rt"
 keywords = ["riscv", "runtime", "startup"]
 license = "MIT OR Apache-2.0"
 name = "riscv-rt-macros"
-repository = "https://github.com/rust-embedded/riscv-rt"
+repository = "https://github.com/rust-embedded/riscv"
 version = "0.2.0"
 
 [lib]

riscv/README.md

@@ -1,6 +1,5 @@
 [![crates.io](https://img.shields.io/crates/d/riscv.svg)](https://crates.io/crates/riscv)
 [![crates.io](https://img.shields.io/crates/v/riscv.svg)](https://crates.io/crates/riscv)
-[![Build Status](https://travis-ci.org/rust-embedded/riscv.svg?branch=master)](https://travis-ci.org/rust-embedded/riscv)
 
 # `riscv`