|  | @@ -179,7 +179,7 @@
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				|  |  |  //!
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				|  |  |  //! [pdf]: http://infocenter.arm.com/help/topic/com.arm.doc.dui0471e/DUI0471E_developing_for_arm_processors.pdf
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				|  |  |  
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				|  |  | -#![cfg_attr(feature = "inline-asm", feature(llvm_asm))]
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				|  |  | +#![cfg_attr(feature = "inline-asm", feature(asm))]
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				|  |  |  #![deny(missing_docs)]
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				|  |  |  #![no_std]
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				|  |  |  
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				|  | @@ -210,11 +210,22 @@ pub unsafe fn syscall1(_nr: usize, _arg: usize) -> usize {
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				|  |  |          #[cfg(all(feature = "inline-asm", not(feature = "no-semihosting")))]
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				|  |  |          () => {
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				|  |  |              let mut nr = _nr;
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				|  |  | -            llvm_asm!("
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				|  |  | +            // The instructions below must always be uncompressed, otherwise
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				|  |  | +            // it will be treated as a regular break, hence the norvc option.
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				|  |  | +            //
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				|  |  | +            // See https://github.com/riscv/riscv-semihosting-spec for more
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				|  |  | +            // details.
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				|  |  | +            asm!("
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				|  |  | +                .option push
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				|  |  | +                .option norvc
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				|  |  |                  slli x0, x0, 0x1f
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				|  |  |                  ebreak
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				|  |  |                  srai x0, x0, 0x7
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				|  |  | -            " : "+{a0}"(nr) : "{a1}"(_arg) :: "volatile");
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				|  |  | +                .option pop
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				|  |  | +            ",
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				|  |  | +            inout("a0") nr,
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				|  |  | +            in("a1") _arg,
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				|  |  | +            );
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				|  |  |              nr
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				|  |  |          }
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				|  |  |  
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