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Fix RISC-V name

Vadim Kaushan %!s(int64=6) %!d(string=hai) anos
pai
achega
ac66a5a74e
Modificáronse 2 ficheiros con 2 adicións e 2 borrados
  1. 1 1
      riscv-rt/Cargo.toml
  2. 1 1
      riscv-rt/src/lib.rs

+ 1 - 1
riscv-rt/Cargo.toml

@@ -4,7 +4,7 @@ version = "0.3.0"
 repository = "https://github.com/rust-embedded/riscv-rt"
 authors = ["David Craven <david@craven.ch>"]
 categories = ["embedded", "no-std"]
-description = "Minimal runtime / startup for RISCV CPU's"
+description = "Minimal runtime / startup for RISC-V CPU's"
 keywords = ["riscv", "runtime", "startup"]
 license = "ISC"
 

+ 1 - 1
riscv-rt/src/lib.rs

@@ -1,4 +1,4 @@
-//! Minimal startup / runtime for RISCV CPU's
+//! Minimal startup / runtime for RISC-V CPU's
 //!
 //! # Features
 //!