Low level access to RISC-V processors

Román Cárdenas 2531e682f3 MSRV is now 1.75 1 年間 前
.github 2531e682f3 MSRV is now 1.75 1 年間 前
riscv 3384fc8b19 Prepare for releases 1 年間 前
riscv-pac 2531e682f3 MSRV is now 1.75 1 年間 前
riscv-peripheral 2531e682f3 MSRV is now 1.75 1 年間 前
riscv-rt 3384fc8b19 Prepare for releases 1 年間 前
riscv-semihosting 3384fc8b19 Prepare for releases 1 年間 前
.gitignore 4344b03e88 Remove bit_field dependency 1 年間 前
CODE_OF_CONDUCT.md 4bd6d68552 Update link (riscv to risc-v) 4 年 前
Cargo.toml b2183c696b Merge branch 'master' into add-peripheral 1 年間 前
README.md b2183c696b Merge branch 'master' into add-peripheral 1 年間 前

README.md

RISC-V crates

This repository contains various crates useful for writing Rust programs on RISC-V microcontrollers:

This project is developed and maintained by the RISC-V team.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.

Code of Conduct

Contribution to this crate is organized under the terms of the Rust Code of Conduct, the maintainer of this crate, the RISC-V team, promises to intervene to uphold that code of conduct.