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Low level access to RISC-V processors

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riscv
Román Cárdenas 6d720363c6 modified macro for documentation 1 year ago
.github 1459e8faee Create rust.yml 1 year ago
src 6d720363c6 modified macro for documentation 1 year ago
.gitignore 197f2fcd71 First version of PLIC and (A)CLINT 1 year ago
Cargo.toml 197f2fcd71 First version of PLIC and (A)CLINT 1 year ago
README.md 197f2fcd71 First version of PLIC and (A)CLINT 1 year ago

README.md

riscv-peripheral

Standard RISC-V targets for embedded systems written in Rust

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.61 and up. It might compile with older versions but that may change in any new patch release.