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Low level access to RISC-V processors

目录树: 82de9216f7
分支列表 标签列表
riscv
Román Cárdenas 82de9216f7 store waker 1 年之前
.github 82de9216f7 store waker 1 年之前
riscv 1e2f9862ef Additional updates to Rust 1.60.0 1 年之前
riscv-pac 36a264c358 riscv-peripheral crate 1 年之前
riscv-peripheral 82de9216f7 store waker 1 年之前
riscv-rt 1767d604da Merge remote branch 'purplethunder/master' 1 年之前
.gitignore 4344b03e88 Remove bit_field dependency 1 年之前
CODE_OF_CONDUCT.md 4bd6d68552 Update link (riscv to risc-v) 4 年之前
Cargo.toml 36a264c358 riscv-peripheral crate 1 年之前
README.md 36a264c358 riscv-peripheral crate 1 年之前

README.md

RISC-V crates

This repository contains various crates useful for writing Rust programs on RISC-V microcontrollers:

  • riscv: CPU registers access and intrinsics
  • riscv-pac: Common traits to be implemented by RISC-V PACs
  • riscv-peripheral: Interfaces for standard RISC-V peripherals
  • riscv-rt: Startup code and interrupt handling

This project is developed and maintained by the RISC-V team.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.

Code of Conduct

Contribution to this crate is organized under the terms of the Rust Code of Conduct, the maintainer of this crate, the RISC-V team, promises to intervene to uphold that code of conduct.