Low level access to RISC-V processors

Simon Sapin 89c97b4937 cargo:rerun-if-changed=build.rs is redundant %!s(int64=3) %!d(string=hai) anos
riscv-rt 89c97b4937 cargo:rerun-if-changed=build.rs is redundant %!s(int64=3) %!d(string=hai) anos