Low level access to RISC-V processors

Román Cárdenas Rodríguez b2183c696b Merge branch 'master' into add-peripheral		1 年之前
.github	b2183c696b Merge branch 'master' into add-peripheral	1 年之前
riscv	2d0f35216d lib: update dependency embedded-hal to 1.0.0	1 年之前
riscv-pac	36a264c358 riscv-peripheral crate	1 年之前
riscv-peripheral	5b012c0978 more flexible async implementation	1 年之前
riscv-rt	b8f0523d16 add links to Cargo.toml	1 年之前
riscv-semihosting	2d0f35216d lib: update dependency embedded-hal to 1.0.0	1 年之前
.gitignore	4344b03e88 Remove bit_field dependency	1 年之前
CODE_OF_CONDUCT.md	4bd6d68552 Update link (riscv to risc-v)	4 年之前
Cargo.toml	b2183c696b Merge branch 'master' into add-peripheral	1 年之前
README.md	b2183c696b Merge branch 'master' into add-peripheral	1 年之前

RISC-V crates

This repository contains various crates useful for writing Rust programs on RISC-V microcontrollers:

riscv: CPU registers access and intrinsics
riscv-pac: Common traits to be implemented by RISC-V PACs
riscv-peripheral: Interfaces for standard RISC-V peripherals
riscv-rt: Startup code and interrupt handling
riscv-semihosting: Semihosting for RISC-V processors

This project is developed and maintained by the RISC-V team.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.

Code of Conduct

Contribution to this crate is organized under the terms of the Rust Code of Conduct, the maintainer of this crate, the RISC-V team, promises to intervene to uphold that code of conduct.

README.md

RISC-V crates

Contribution

Code of Conduct