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- [package]
- name = "riscv"
- version = "0.7.0"
- rust-version = "1.59"
- repository = "https://github.com/rust-embedded/riscv"
- authors = ["The RISC-V Team <risc-v@teams.rust-embedded.org>"]
- categories = ["embedded", "hardware-support", "no-std"]
- description = "Low level access to RISC-V processors"
- keywords = ["riscv", "register", "peripheral"]
- license = "ISC"
- [package.metadata.docs.rs]
- default-target = "riscv64imac-unknown-none-elf"
- targets = [
- "riscv32i-unknown-none-elf", "riscv32imc-unknown-none-elf", "riscv32imac-unknown-none-elf",
- "riscv64imac-unknown-none-elf", "riscv64gc-unknown-none-elf",
- ]
- [dependencies]
- bare-metal = "1.0.0"
- bit_field = "0.10.0"
- embedded-hal = "0.2.6"
|
