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riscv-rt
Wladimir J. van der Laan e962e8c2ea Bump version from 0.6.0 to 0.6.1 6 lat temu
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.github 130686e45b A unified contributing experience. 7 lat temu
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CODE_OF_CONDUCT.md 73f1a1ebe7 Rename RISCV to RISC-V 6 lat temu
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asm.h 1839103f1c Add support for 64-bit registers in _start_trap 6 lat temu
assemble.sh 6ef7218873 Generate binaries for riscv64 targets 6 lat temu
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README.md

crates.io crates.io Build Status

riscv-rt

Minimal runtime / startup for RISC-V CPU's.

This project is developed and maintained by the RISC-V team.

Documentation

License

Copyright 2018 RISC-V team

Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above copyright notice and this permission notice appear in all copies.

THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.

Code of Conduct

Contribution to this crate is organized under the terms of the Rust Code of Conduct, the maintainer of this crate, the RISC-V team, promises to intervene to uphold that code of conduct.