refactor(prototyper): Decoupling device drivers from SBI implementation

prototyper/src/board.rs

@@ -1,26 +1,116 @@
-//! Board support, including peripheral and core drivers.
+use aclint::SifiveClint;
 use core::mem::MaybeUninit;
-use rustsbi::RustSBI;
-
-use crate::clint::ClintDevice;
-use crate::reset::TestDevice;
-use crate::console::ConsoleDevice;
-use crate::hsm::Hsm;
-use crate::rfence::RFence;
-
-pub(crate) static mut SBI: MaybeUninit<Board> = MaybeUninit::uninit();
-
-#[derive(RustSBI, Default)]
-#[rustsbi(dynamic)]
-pub struct Board<'a> {
-    #[rustsbi(console)]
-    pub uart16550: Option<ConsoleDevice<'a>>,
-    #[rustsbi(ipi, timer)]
-    pub clint: Option<ClintDevice<'a>>,
-    #[rustsbi(hsm)]
-    pub hsm: Option<Hsm>,
-    #[rustsbi(reset)]
-    pub sifive_test: Option<TestDevice<'a>>,
-    #[rustsbi(fence)]
-    pub rfence: Option<RFence>
+use core::ptr::null;
+use core::{
+    ptr::null_mut,
+    sync::atomic::{AtomicPtr, Ordering::Release},
+};
+use sifive_test_device::SifiveTestDevice;
+use spin::Mutex;
+use uart16550::Uart16550;
+
+use crate::sbi::console::ConsoleDevice;
+use crate::sbi::ipi::IpiDevice;
+use crate::sbi::reset::ResetDevice;
+use crate::sbi::SBI;
+
+pub(crate) static mut SBI_IMPL: MaybeUninit<SBI<'static, MachineConsole, SifiveClint, SifiveTestDevice>> =
+    MaybeUninit::uninit();
+
+/// Console Device: Uart16550
+#[doc(hidden)]
+pub enum MachineConsole {
+    Uart16550(*const Uart16550<u8>),
+}
+
+unsafe impl Send for MachineConsole {}
+unsafe impl Sync for MachineConsole {}
+
+impl ConsoleDevice for MachineConsole {
+    fn read(&self, buf: &mut [u8]) -> usize {
+        match self {
+            Self::Uart16550(uart16550) => unsafe { (**uart16550).read(buf) },
+        }
+    }
+
+    fn write(&self, buf: &[u8]) -> usize {
+        match self {
+            MachineConsole::Uart16550(uart16550) => unsafe { (**uart16550).write(buf) },
+        }
+    }
+}
+
+#[doc(hidden)]
+pub(crate) static UART: Mutex<MachineConsole> = Mutex::new(MachineConsole::Uart16550(null()));
+pub(crate) fn console_dev_init(base: usize) {
+    *UART.lock() = MachineConsole::Uart16550(base as _);
+}
+
+/// Ipi Device: Sifive Clint
+impl IpiDevice for SifiveClint {
+    #[inline(always)]
+    fn read_mtime(&self) -> u64 {
+        self.read_mtime()
+    }
+
+    #[inline(always)]
+    fn write_mtime(&self, val: u64) {
+        self.write_mtime(val)
+    }
+
+    #[inline(always)]
+    fn read_mtimecmp(&self, hart_idx: usize) -> u64 {
+        self.read_mtimecmp(hart_idx)
+    }
+
+    #[inline(always)]
+    fn write_mtimecmp(&self, hart_idx: usize, val: u64) {
+        self.write_mtimecmp(hart_idx, val)
+    }
+
+    #[inline(always)]
+    fn read_msip(&self, hart_idx: usize) -> bool {
+        self.read_msip(hart_idx)
+    }
+
+    #[inline(always)]
+    fn set_msip(&self, hart_idx: usize) {
+        self.set_msip(hart_idx)
+    }
+
+    #[inline(always)]
+    fn clear_msip(&self, hart_idx: usize) {
+        self.clear_msip(hart_idx)
+    }
+}
+
+#[doc(hidden)]
+pub(crate) static SIFIVECLINT: AtomicPtr<SifiveClint> = AtomicPtr::new(null_mut());
+pub(crate) fn ipi_dev_init(base: usize) {
+    SIFIVECLINT.store(base as _, Release);
+}
+
+
+/// Reset Device: SifiveTestDevice
+impl ResetDevice for SifiveTestDevice {
+    #[inline]
+    fn fail(&self, code: u16) -> ! {
+        self.fail(code)
+    }
+
+    #[inline]
+    fn pass(&self) -> ! {
+        self.pass()
+    }
+
+    #[inline]
+    fn reset(&self) -> ! {
+        self.reset()
+    }
+}
+
+#[doc(hidden)]
+pub(crate) static SIFIVETEST: AtomicPtr<SifiveTestDevice> = AtomicPtr::new(null_mut());
+pub fn reset_dev_init(base: usize) {
+    SIFIVETEST.store(base as _, Release);
 }

prototyper/src/clint.rs

@@ -1,159 +0,0 @@
-use aclint::SifiveClint;
-use core::{
-    ptr::null_mut,
-    sync::atomic::{
-        AtomicPtr,
-        Ordering::{Relaxed, Release},
-    },
-};
-use rustsbi::SbiRet;
-
-use crate::hsm::remote_hsm;
-use crate::riscv_spec::{current_hartid, stimecmp};
-use crate::trap_stack::ROOT_STACK;
-
-pub(crate) static SIFIVECLINT: AtomicPtr<SifiveClint> = AtomicPtr::new(null_mut());
-pub(crate) const IPI_TYPE_SSOFT: u8 = 1 << 0;
-pub(crate) const IPI_TYPE_FENCE: u8 = 1 << 1;
-
-pub(crate) fn init(base: usize) {
-    SIFIVECLINT.store(base as _, Release);
-}
-
-#[inline]
-pub fn clear() {
-    let hart_id = current_hartid();
-    loop {
-        if let Some(clint) = unsafe { SIFIVECLINT.load(Relaxed).as_ref() } {
-            clint.clear_msip(hart_id);
-            clint.write_mtimecmp(hart_id, u64::MAX);
-            break;
-        } else {
-            continue;
-        }
-    }
-}
-
-#[inline]
-pub fn clear_msip() {
-    loop {
-        if let Some(clint) = unsafe { SIFIVECLINT.load(Relaxed).as_ref() } {
-            clint.clear_msip(current_hartid());
-            break;
-        } else {
-            continue;
-        }
-    }
-}
-
-#[inline]
-pub fn set_msip(hart_id: usize) {
-    loop {
-        if let Some(clint) = unsafe { SIFIVECLINT.load(Relaxed).as_ref() } {
-            clint.set_msip(hart_id);
-            break;
-        } else {
-            continue;
-        }
-    }
-}
-
-pub struct ClintDevice<'a> {
-    pub clint: &'a AtomicPtr<SifiveClint>,
-    pub max_hart_id: usize,
-}
-
-impl<'a> ClintDevice<'a> {
-    pub fn new(clint: &'a AtomicPtr<SifiveClint>, max_hart_id: usize) -> Self {
-        Self { clint, max_hart_id }
-    }
-}
-
-impl<'a> ClintDevice<'a> {
-    #[inline]
-    pub fn get_time(&self) -> usize {
-        unsafe { (*self.clint.load(Relaxed)).read_mtime() as usize }
-    }
-
-    #[inline]
-    pub fn get_timeh(&self) -> usize {
-        unsafe { ((*self.clint.load(Relaxed)).read_mtime() >> 32) as usize }
-    }
-}
-
-impl<'a> rustsbi::Timer for ClintDevice<'a> {
-    #[inline]
-    fn set_timer(&self, stime_value: u64) {
-        unsafe {
-            // TODO: 添加CPU拓展探测机制，补充无Sstc拓展时的定时器设置
-            stimecmp::set(stime_value);
-            riscv::register::mie::set_mtimer();
-        }
-    }
-}
-
-impl<'a> rustsbi::Ipi for ClintDevice<'a> {
-    #[inline]
-    fn send_ipi(&self, hart_mask: rustsbi::HartMask) -> SbiRet {
-        for hart_id in 0..=self.max_hart_id {
-            if hart_mask.has_bit(hart_id) && remote_hsm(hart_id).unwrap().allow_ipi() {
-                let old_ipi_type = set_ipi_type(hart_id, crate::clint::IPI_TYPE_SSOFT);
-                if old_ipi_type == 0 {
-                    unsafe {
-                        (*self.clint.load(Relaxed)).set_msip(hart_id);
-                    }
-                }
-            }
-        }
-        SbiRet::success(0)
-    }
-}
-
-impl<'a> ClintDevice<'a> {
-    #[inline]
-    pub fn send_ipi_by_fence(
-        &self,
-        hart_mask: rustsbi::HartMask,
-        ctx: crate::rfence::RFenceCTX,
-    ) -> SbiRet {
-        for hart_id in 0..=self.max_hart_id {
-            if hart_mask.has_bit(hart_id) && remote_hsm(hart_id).unwrap().allow_ipi() {
-                crate::rfence::remote_rfence(hart_id).unwrap().set(ctx);
-                crate::rfence::local_rfence().add();
-                if hart_id == current_hartid() {
-                    continue;
-                }
-                let old_ipi_type = set_ipi_type(hart_id, crate::clint::IPI_TYPE_FENCE);
-                if old_ipi_type == 0 {
-                    unsafe {
-                        (*self.clint.load(Relaxed)).set_msip(hart_id);
-                    }
-                }
-            }
-        }
-        while crate::rfence::local_rfence().is_zero() == false {
-            crate::trap::rfence_signle_handler();
-        }
-        SbiRet::success(0)
-    }
-}
-
-pub fn set_ipi_type(hart_id: usize, event_id: u8) -> u8 {
-    unsafe {
-        ROOT_STACK
-            .get_unchecked_mut(hart_id)
-            .hart_context()
-            .ipi_type
-            .fetch_or(event_id, Relaxed)
-    }
-}
-
-pub fn get_and_reset_ipi_type() -> u8 {
-    unsafe {
-        ROOT_STACK
-            .get_unchecked_mut(current_hartid())
-            .hart_context()
-            .ipi_type
-            .swap(0, Relaxed)
-    }
-}

prototyper/src/console.rs

@@ -1,142 +0,0 @@
-use core::{fmt, ptr::null, str::FromStr};
-use log::{Level, LevelFilter};
-use rustsbi::{Console, Physical, SbiRet};
-use spin::Mutex;
-use uart16550::Uart16550;
-
-pub struct ConsoleDevice<'a> {
-    inner: &'a Mutex<MachineConsole>,
-}
-
-impl<'a> ConsoleDevice<'a> {
-    pub fn new(inner: &'a Mutex<MachineConsole>) -> Self {
-        Self { inner }
-    }
-}
-
-#[doc(hidden)]
-pub(crate) static CONSOLE: Mutex<MachineConsole> = Mutex::new(MachineConsole::Uart16550(null()));
-
-pub fn init(base: usize) {
-    *CONSOLE.lock() = MachineConsole::Uart16550(base as _);
-    log_init();
-}
-
-impl<'a> Console for ConsoleDevice<'a> {
-    #[inline]
-    fn write(&self, bytes: Physical<&[u8]>) -> SbiRet {
-        // TODO verify valid memory range for a `Physical` slice.
-        let start = bytes.phys_addr_lo();
-        let buf = unsafe { core::slice::from_raw_parts(start as *const u8, bytes.num_bytes()) };
-        let console = self.inner.lock();
-        let bytes_num: usize = match *console {
-            MachineConsole::Uart16550(uart16550) => unsafe { (*uart16550).write(buf) },
-        };
-        drop(console);
-        SbiRet::success(bytes_num)
-    }
-
-    #[inline]
-    fn read(&self, bytes: Physical<&mut [u8]>) -> SbiRet {
-        // TODO verify valid memory range for a `Physical` slice.
-        let start = bytes.phys_addr_lo();
-        let buf = unsafe { core::slice::from_raw_parts_mut(start as *mut u8, bytes.num_bytes()) };
-        let console = self.inner.lock();
-        let bytes_num: usize = match *console {
-            MachineConsole::Uart16550(uart16550) => unsafe { (*uart16550).read(buf) },
-        };
-        drop(console);
-        SbiRet::success(bytes_num)
-    }
-
-    #[inline]
-    fn write_byte(&self, byte: u8) -> SbiRet {
-        let console = self.inner.lock();
-        match *console {
-            MachineConsole::Uart16550(uart16550) => unsafe { (*uart16550).write(&[byte]) },
-        };
-        drop(console);
-        SbiRet::success(0)
-    }
-}
-
-impl<'a> ConsoleDevice<'a> {
-    #[inline]
-    pub fn putchar(&self, c: usize) -> usize {
-        print!("{}", c as u8 as char);
-        0
-    }
-
-    #[inline]
-    pub fn getchar(&self) -> usize {
-        let mut c = 0u8;
-        let console = self.inner.lock();
-        match *console {
-            MachineConsole::Uart16550(uart16550) => unsafe {
-                loop { if (*uart16550).read(core::slice::from_mut(&mut c)) == 1 { break }}
-            }
-        };
-        drop(console);
-        c as _
-    }
-}
-
-#[doc(hidden)]
-pub enum MachineConsole {
-    Uart16550(*const Uart16550<u8>),
-}
-
-impl fmt::Write for MachineConsole {
-    #[inline]
-    fn write_str(&mut self, s: &str) -> fmt::Result {
-        let mut bytes = s.as_bytes();
-        match self {
-            Self::Uart16550(uart16550) => {
-                while !bytes.is_empty() {
-                    let count = unsafe { &**uart16550 }.write(bytes);
-                    bytes = &bytes[count..];
-                }
-            }
-        }
-        Ok(())
-    }
-}
-
-unsafe impl Send for MachineConsole {}
-unsafe impl Sync for MachineConsole {}
-
-pub fn log_init() {
-    log::set_max_level(
-        option_env!("RUST_LOG")
-            .and_then(|s| LevelFilter::from_str(s).ok())
-            .unwrap_or(LevelFilter::Info),
-    );
-    log::set_logger(&Logger).unwrap();
-}
-
-struct Logger;
-
-impl log::Log for Logger {
-    #[inline]
-    fn enabled(&self, _metadata: &log::Metadata) -> bool {
-        true
-    }
-
-    #[inline]
-    fn log(&self, record: &log::Record) {
-        let color_code: u8 = match record.level() {
-            Level::Error => 31,
-            Level::Warn => 93,
-            Level::Info => 34,
-            Level::Debug => 32,
-            Level::Trace => 90,
-        };
-        println!(
-            "\x1b[{color_code}m[{:>5}] {}\x1b[0m",
-            record.level(),
-            record.args(),
-        );
-    }
-
-    fn flush(&self) {}
-}

prototyper/src/dynamic.rs

@@ -95,7 +95,8 @@ pub fn mpp_next_addr(info: &DynamicInfo) -> Result<(mstatus::MPP, usize), Dynami
         3 => mstatus::MPP::Machine,
         1 => mstatus::MPP::Supervisor,
         // pattern `_` avoids `unreachable!`` which introduces panic handler.
-        0 | _ => mstatus::MPP::User,
+        // pattern 0 and _
+        _ => mstatus::MPP::User,
     };
 
     Ok((mpp, info.next_addr))

prototyper/src/fail.rs

@@ -1,9 +1,11 @@
+use riscv::register::mstatus;
+use serde_device_tree::Dtb;
+
+use crate::sbi::reset;
 use crate::{
     dt::{self, ParseDeviceTreeError, Tree},
-    dynamic, reset,
+    dynamic,
 };
-use riscv::register::mstatus;
-use serde_device_tree::Dtb;
 
 #[cold]
 pub fn device_tree_format(err: dt::ParseDeviceTreeError) -> Dtb {

prototyper/src/macros.rs

@@ -4,7 +4,7 @@
 macro_rules! print {
     ($($arg:tt)*) => {
         use core::fmt::Write;
-        let mut console = $crate::console::CONSOLE.lock();
+        let console = unsafe { $crate::board::SBI_IMPL.assume_init_mut() }.console.as_mut().unwrap();
         console.write_fmt(core::format_args!($($arg)*)).unwrap();
         drop(console);
     }
@@ -15,9 +15,8 @@ macro_rules! println {
     () => ($crate::print!("\n"));
     ($($arg:tt)*) => {{
         use core::fmt::Write;
-        let mut console = $crate::console::CONSOLE.lock();
+        let console = unsafe { $crate::board::SBI_IMPL.assume_init_mut() }.console.as_mut().unwrap();
         console.write_fmt(core::format_args!($($arg)*)).unwrap();
         console.write_char('\n').unwrap();
-        drop(console);
     }}
 }

prototyper/src/main.rs

@@ -1,6 +1,7 @@
 #![feature(naked_functions)]
 #![no_std]
 #![no_main]
+#![allow(static_mut_refs)]
 
 #[macro_use]
 extern crate log;
@@ -8,41 +9,34 @@ extern crate log;
 mod macros;
 
 mod board;
-mod clint;
-mod console;
 mod dt;
 mod dynamic;
 mod fail;
-mod fifo;
-mod hart_context;
-mod hsm;
-mod reset;
-mod rfence;
 mod riscv_spec;
-mod trap;
-mod trap_stack;
+mod sbi;
 
-use clint::ClintDevice;
 use core::sync::atomic::{AtomicBool, Ordering};
 use core::{arch::asm, mem::MaybeUninit};
-use reset::TestDevice;
-use riscv::register::mstatus;
-
-use crate::board::{Board, SBI};
-use crate::clint::SIFIVECLINT;
-use crate::console::{ConsoleDevice, CONSOLE};
-use crate::hsm::{local_remote_hsm, Hsm};
-use crate::reset::RESET;
-use crate::rfence::RFence;
+
+use crate::board::{SBI_IMPL, SIFIVECLINT, SIFIVETEST, UART};
 use crate::riscv_spec::{current_hartid, menvcfg};
-use crate::trap::trap_vec;
-use crate::trap_stack::NUM_HART_MAX;
+use crate::sbi::console::SbiConsole;
+use crate::sbi::hart_context::NextStage;
+use crate::sbi::hsm::{local_remote_hsm, SbiHsm};
+use crate::sbi::ipi::{self, SbiIpi};
+use crate::sbi::logger;
+use crate::sbi::reset::SbiReset;
+use crate::sbi::rfence::SbiRFence;
+use crate::sbi::trap::{self, trap_vec};
+use crate::sbi::trap_stack::{self, NUM_HART_MAX};
+use crate::sbi::SBI;
 
 #[no_mangle]
 extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
     // parse dynamic information
     let info = dynamic::read_paddr(nonstandard_a2).unwrap_or_else(fail::no_dynamic_info_available);
     static GENESIS: AtomicBool = AtomicBool::new(true);
+    static SBI_READY: AtomicBool = AtomicBool::new(false);
 
     let is_boot_hart = if info.boot_hart == usize::MAX {
         GENESIS.swap(false, Ordering::AcqRel)
@@ -61,9 +55,23 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
             serde_device_tree::from_raw_mut(&dtb).unwrap_or_else(fail::device_tree_deserialize);
 
         // TODO: The device base address needs to be parsed from FDT
-        reset::init(0x100000);
-        console::init(0x10000000);
-        clint::init(0x2000000);
+        // 1. Init device
+        board::reset_dev_init(0x100000);
+        board::console_dev_init(0x10000000);
+        board::ipi_dev_init(0x2000000);
+        // 2. Init SBI
+        unsafe {
+            SBI_IMPL = MaybeUninit::new(SBI {
+                console: Some(SbiConsole::new(&UART)),
+                ipi: Some(SbiIpi::new(&SIFIVECLINT, NUM_HART_MAX)),
+                hsm: Some(SbiHsm),
+                reset: Some(SbiReset::new(&SIFIVETEST)),
+                rfence: Some(SbiRFence),
+            });
+        }
+        SBI_READY.swap(true, Ordering::AcqRel);
+        // 3. Init Logger
+        logger::Logger::init();
 
         info!("RustSBI version {}", rustsbi::VERSION);
         rustsbi::LOGO.lines().for_each(|line| info!("{}", line));
@@ -80,16 +88,6 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
                 .unwrap_or("<unspecified>")
         );
 
-        // Init SBI
-        unsafe {
-            SBI = MaybeUninit::new(Board {
-                uart16550: Some(ConsoleDevice::new(&CONSOLE)),
-                clint: Some(ClintDevice::new(&SIFIVECLINT, NUM_HART_MAX)),
-                hsm: Some(Hsm),
-                sifive_test: Some(TestDevice::new(&RESET)),
-                rfence: Some(RFence),
-            });
-        }
 
         // TODO: PMP configuration needs to be obtained through the memory range in the device tree
         use riscv::register::*;
@@ -128,9 +126,12 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
 
         // 设置陷入栈
         trap_stack::prepare_for_trap();
+
+        // waiting for sbi ready
+        while !SBI_READY.load(Ordering::Relaxed) {}
     }
 
-    clint::clear();
+    ipi::clear_all();
     unsafe {
         asm!("csrw mideleg,    {}", in(reg) !0);
         asm!("csrw medeleg,    {}", in(reg) !0);
@@ -142,6 +143,7 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
             menvcfg::STCE | menvcfg::CBIE_INVALIDATE | menvcfg::CBCFE | menvcfg::CBZE,
         );
         mtvec::write(trap_vec as _, mtvec::TrapMode::Vectored);
+        
     }
 }
 
@@ -164,25 +166,15 @@ unsafe extern "C" fn start() -> ! {
         "3:",
         "   j       3b", // TODO multi hart preempt for runtime init
         "4:",
-        // clear bss segment
+        // 3. clear bss segment
         "   la      t0, sbss
             la      t1, ebss
         1:  bgeu    t0, t1, 2f
             sd      zero, 0(t0)
             addi    t0, t0, 8
             j       1b",
-        // prepare data segment
-        "   la      t3, sidata
-            la      t4, sdata
-            la      t5, edata
-        1:  bgeu    t4, t5, 2f
-            ld      t6, 0(t3)
-            sd      t6, 0(t4)
-            addi    t3, t3, 8
-            addi    t4, t4, 8
-            j       1b",
         "2:",
-         // 3. Prepare stack for each hart
+         // 4. Prepare stack for each hart
         "   call    {locate_stack}",
         "   call    {main}",
         "   csrw    mscratch, sp",
@@ -190,18 +182,11 @@ unsafe extern "C" fn start() -> ! {
         magic = const dynamic::MAGIC,
         locate_stack = sym trap_stack::locate,
         main         = sym rust_main,
-        hart_boot         = sym trap::msoft,
+        hart_boot    = sym trap::msoft,
         options(noreturn)
     )
 }
 
-#[derive(Debug)]
-pub struct NextStage {
-    start_addr: usize,
-    opaque: usize,
-    next_mode: mstatus::MPP,
-}
-
 #[panic_handler]
 fn panic(info: &core::panic::PanicInfo) -> ! {
     use riscv::register::*;

prototyper/src/reset.rs

@@ -1,67 +0,0 @@
-use core::{
-    ptr::null_mut,
-    sync::atomic::{
-        AtomicPtr,
-        Ordering::{Relaxed, Release},
-    },
-};
-use rustsbi::SbiRet;
-use sifive_test_device::SifiveTestDevice;
-
-pub(crate) static RESET: AtomicPtr<SifiveTestDevice> = AtomicPtr::new(null_mut());
-
-pub fn init(base: usize) {
-    RESET.store(base as _, Release);
-}
-
-pub fn fail() -> ! {
-    let sifive_test = RESET.load(Relaxed);
-    if sifive_test.is_null() {
-        trace!("test fail, begin dead loop");
-        loop {
-            core::hint::spin_loop()
-        }
-    } else {
-        trace!("test fail, invoke process exit procedure on SiFive Test device");
-        unsafe { (*sifive_test).fail(0) }
-    }
-}
-
-
-pub struct TestDevice<'a> {
-    pub sifive_test: &'a AtomicPtr<SifiveTestDevice>,
-}
-
-impl<'a> TestDevice<'a> {
-    pub fn new(sifive_test: &'a AtomicPtr<SifiveTestDevice>) -> Self {
-        Self { sifive_test }
-    }
-}
-
-impl<'a> rustsbi::Reset for TestDevice<'a> {
-    #[inline]
-    fn system_reset(&self, reset_type: u32, reset_reason: u32) -> SbiRet {
-        use rustsbi::spec::srst::{
-            RESET_REASON_NO_REASON, RESET_REASON_SYSTEM_FAILURE, RESET_TYPE_COLD_REBOOT,
-            RESET_TYPE_SHUTDOWN, RESET_TYPE_WARM_REBOOT,
-        };
-        match reset_type {
-            RESET_TYPE_SHUTDOWN => match reset_reason {
-                RESET_REASON_NO_REASON => unsafe {
-                    (*self.sifive_test.load(Relaxed)).pass();
-                },
-                RESET_REASON_SYSTEM_FAILURE => unsafe {
-                    (*self.sifive_test.load(Relaxed)).fail(u16::MAX);
-                },
-                value => unsafe {
-                    (*self.sifive_test.load(Relaxed)).fail(value as _);
-                },
-            },
-            RESET_TYPE_COLD_REBOOT | RESET_TYPE_WARM_REBOOT => unsafe {
-                (*self.sifive_test.load(Relaxed)).reset();
-            },
-
-            _ => SbiRet::invalid_param(),
-        }
-    }
-}

prototyper/src/sbi/console.rs

@@ -0,0 +1,87 @@
+use core::fmt::{self, Write};
+use rustsbi::{Console, Physical, SbiRet};
+use spin::Mutex;
+use crate::board::SBI_IMPL;
+
+///////////////////////////////////// NEW CODE /////////////////////////////////////////////////
+pub trait ConsoleDevice {
+    fn read(&self, buf: &mut [u8]) -> usize;
+    fn write(&self, buf: &[u8]) -> usize;
+}
+
+pub struct SbiConsole<'a, T: ConsoleDevice> {
+    inner: &'a Mutex<T>,
+}
+
+impl<'a, T: ConsoleDevice> SbiConsole<'a, T> {
+    pub fn new(inner: &'a Mutex<T>) -> Self {
+        Self { inner }
+    }
+
+    #[inline]
+    pub fn putchar(&mut self, c: usize) -> usize {
+        self.write_char(c as u8 as char).unwrap();
+        0
+    }
+
+    #[inline]
+    pub fn getchar(&self) -> usize {
+        let mut c = 0u8;
+        let console = self.inner.lock();
+        loop {
+            if console.read(core::slice::from_mut(&mut c)) == 1 {break;}
+        }
+        c as _
+    }
+}
+
+impl<'a, T: ConsoleDevice> Console for SbiConsole<'a, T> {
+    #[inline]
+    fn write(&self, bytes: Physical<&[u8]>) -> SbiRet {
+        // TODO verify valid memory range for a `Physical` slice.
+        let start = bytes.phys_addr_lo();
+        let buf = unsafe { core::slice::from_raw_parts(start as *const u8, bytes.num_bytes()) };
+        let bytes_num: usize = self.inner.lock().write(buf);
+        SbiRet::success(bytes_num)
+    }
+
+    #[inline]
+    fn read(&self, bytes: Physical<&mut [u8]>) -> SbiRet {
+        // TODO verify valid memory range for a `Physical` slice.
+        let start = bytes.phys_addr_lo();
+        let buf = unsafe { core::slice::from_raw_parts_mut(start as *mut u8, bytes.num_bytes()) };
+        let bytes_num = self.inner.lock().read(buf);
+        SbiRet::success(bytes_num)
+    }
+
+    #[inline]
+    fn write_byte(&self, byte: u8) -> SbiRet {
+        self.inner.lock().write(&[byte]);
+        SbiRet::success(0)
+    }
+}
+
+
+impl<'a, T: ConsoleDevice> fmt::Write for SbiConsole<'a, T> {
+    #[inline]
+    fn write_str(&mut self, s: &str) -> fmt::Result {
+        let mut bytes = s.as_bytes();
+        let console = self.inner.lock();
+        while !bytes.is_empty() {
+            let count = console.write(bytes);
+            bytes = &bytes[count..];
+        }
+        Ok(())
+    }
+}
+
+
+#[inline]
+pub fn putchar(c: usize) -> usize {
+    unsafe { SBI_IMPL.assume_init_mut() }.console.as_mut().unwrap().putchar(c)
+}
+
+#[inline]
+pub fn getchar() -> usize {
+    unsafe { SBI_IMPL.assume_init_mut() }.console.as_mut().unwrap().getchar()
+}

prototyper/src/fifo.rs → prototyper/src/sbi/fifo.rs

@@ -3,8 +3,8 @@ use core::mem::MaybeUninit;
 const FIFO_SIZE: usize = 16;
 
 pub enum FifoError {
-    EmptyFifo,
-    NoChange,
+    Empty,
+    Full,
 }
 
 pub struct Fifo<T: Copy + Clone> {
@@ -25,15 +25,15 @@ impl<T: Copy + Clone> Fifo<T> {
         }
     }
     pub fn is_full(&self) -> bool {
-        return self.avil == self.size;
+        self.avil == self.size
     }
     pub fn is_empty(&self) -> bool {
-        return self.avil == 0;
+        self.avil == 0
     }
 
     pub fn push(&mut self, new_element: T) -> Result<(), FifoError> {
         if self.is_full() {
-            return Err(FifoError::NoChange);
+            return Err(FifoError::Full);
         }
         self.data[self.tail].write(new_element);
         self.tail += 1;
@@ -47,7 +47,7 @@ impl<T: Copy + Clone> Fifo<T> {
 
     pub fn pop(&mut self) -> Result<T, FifoError> {
         if self.is_empty() {
-            return Err(FifoError::EmptyFifo);
+            return Err(FifoError::Empty);
         }
         let raw_head = self.tail as isize - self.avil as isize;
         let head = if raw_head < 0 {

prototyper/src/hart_context.rs → prototyper/src/sbi/hart_context.rs

@@ -1,14 +1,13 @@
 use core::ptr::NonNull;
 use fast_trap::FlowContext;
+use riscv::register::mstatus;
 
-use crate::hsm::HsmCell;
-use crate::rfence::RFenceCell;
-use crate::NextStage;
+use crate::sbi::hsm::HsmCell;
+use crate::sbi::rfence::RFenceCell;
 use core::sync::atomic::AtomicU8;
 
-/// 硬件线程上下文。
 pub(crate) struct HartContext {
-    /// 陷入上下文。
+    /// trap context
     trap: FlowContext,
     pub hsm: HsmCell<NextStage>,
     pub rfence: RFenceCell,
@@ -27,3 +26,11 @@ impl HartContext {
         unsafe { NonNull::new_unchecked(&mut self.trap) }
     }
 }
+
+/// Next Stage boot info
+#[derive(Debug)]
+pub struct NextStage {
+    pub start_addr: usize,
+    pub opaque: usize,
+    pub next_mode: mstatus::MPP,
+}

prototyper/src/hsm.rs → prototyper/src/sbi/hsm.rs

@@ -6,10 +6,10 @@ use core::{
 use rustsbi::{spec::hsm::hart_state, SbiRet};
 use riscv::register::mstatus::MPP;
 
-use crate::NextStage;
-use crate::trap_stack::ROOT_STACK;
+use crate::board::SBI_IMPL;
 use crate::riscv_spec::current_hartid;
-use crate::clint;
+use crate::sbi::hart_context::NextStage;
+use crate::sbi::trap_stack::ROOT_STACK;
 
 const HART_STATE_START_PENDING_EXT: usize = usize::MAX;
 
@@ -181,14 +181,14 @@ pub(crate) fn remote_hsm(hart_id: usize) -> Option<RemoteHsmCell<'static, NextSt
 
 
 /// HSM 
-pub(crate) struct Hsm;
+pub(crate) struct SbiHsm;
 
-impl rustsbi::Hsm for Hsm {
+impl rustsbi::Hsm for SbiHsm {
     fn hart_start(&self, hartid: usize, start_addr: usize, opaque: usize) -> SbiRet {
         match remote_hsm(hartid) {
             Some(remote) => {
                 if remote.start(NextStage { start_addr, opaque, next_mode: MPP::Supervisor }) {
-                    clint::set_msip(hartid);
+                    unsafe { SBI_IMPL.assume_init_ref() }.ipi.as_ref().unwrap().set_msip(hartid);
                     SbiRet::success(0)
                 } else {
                     SbiRet::already_started()
@@ -201,7 +201,7 @@ impl rustsbi::Hsm for Hsm {
     #[inline]
     fn hart_stop(&self) -> SbiRet {
         local_hsm().stop();
-        clint::clear_msip();
+        unsafe { SBI_IMPL.assume_init_ref() }.ipi.as_ref().unwrap().clear_msip(current_hartid());
         unsafe { riscv::register::mie::clear_msoft(); }
         riscv::asm::wfi();
         SbiRet::success(0)
@@ -219,7 +219,7 @@ impl rustsbi::Hsm for Hsm {
         use rustsbi::spec::hsm::suspend_type::{NON_RETENTIVE, RETENTIVE};
         if matches!(suspend_type, NON_RETENTIVE | RETENTIVE) {
             local_hsm().suspend();
-            clint::clear_msip();
+            unsafe { SBI_IMPL.assume_init_ref() }.ipi.as_ref().unwrap().clear_msip(current_hartid());
             unsafe { riscv::register::mie::set_msoft(); }
             riscv::asm::wfi();
             local_hsm().resume();

prototyper/src/sbi/ipi.rs

@@ -0,0 +1,169 @@
+use core::sync::atomic::{AtomicPtr, Ordering::Relaxed};
+use rustsbi::SbiRet;
+
+use crate::board::SBI_IMPL;
+use crate::riscv_spec::{current_hartid, stimecmp};
+use crate::sbi::hsm::remote_hsm;
+use crate::sbi::rfence;
+use crate::sbi::trap;
+use crate::sbi::trap_stack::ROOT_STACK;
+
+pub(crate) const IPI_TYPE_SSOFT: u8 = 1 << 0;
+pub(crate) const IPI_TYPE_FENCE: u8 = 1 << 1;
+
+#[allow(unused)]
+pub trait IpiDevice {
+    fn read_mtime(&self) -> u64;
+    fn write_mtime(&self, val: u64);
+    fn read_mtimecmp(&self, hart_idx: usize) -> u64;
+    fn write_mtimecmp(&self, hart_idx: usize, val: u64);
+    fn read_msip(&self, hart_idx: usize) -> bool;
+    fn set_msip(&self, hart_idx: usize);
+    fn clear_msip(&self, hart_idx: usize);
+}
+
+pub struct SbiIpi<'a, T: IpiDevice> {
+    pub ipi_dev: &'a AtomicPtr<T>,
+    pub max_hart_id: usize,
+}
+
+impl<'a, T: IpiDevice> rustsbi::Timer for SbiIpi<'a, T> {
+    #[inline]
+    fn set_timer(&self, stime_value: u64) {
+        unsafe {
+            // TODO: 添加CPU拓展探测机制，补充无Sstc拓展时的定时器设置
+            stimecmp::set(stime_value);
+            riscv::register::mie::set_mtimer();
+        }
+    }
+}
+
+impl<'a, T: IpiDevice> rustsbi::Ipi for SbiIpi<'a, T> {
+    #[inline]
+    fn send_ipi(&self, hart_mask: rustsbi::HartMask) -> SbiRet {
+        for hart_id in 0..=self.max_hart_id {
+            if hart_mask.has_bit(hart_id) && remote_hsm(hart_id).unwrap().allow_ipi() {
+                let old_ipi_type = set_ipi_type(hart_id, IPI_TYPE_SSOFT);
+                if old_ipi_type == 0 {
+                    unsafe {
+                        (*self.ipi_dev.load(Relaxed)).set_msip(hart_id);
+                    }
+                }
+            }
+        }
+        SbiRet::success(0)
+    }
+}
+
+impl<'a, T: IpiDevice> SbiIpi<'a, T> {
+    pub fn new(ipi_dev: &'a AtomicPtr<T>, max_hart_id: usize) -> Self {
+        Self {
+            ipi_dev,
+            max_hart_id,
+        }
+    }
+
+    pub fn send_ipi_by_fence(
+        &self,
+        hart_mask: rustsbi::HartMask,
+        ctx: rfence::RFenceCTX,
+    ) -> SbiRet {
+        for hart_id in 0..=self.max_hart_id {
+            if hart_mask.has_bit(hart_id) && remote_hsm(hart_id).unwrap().allow_ipi() {
+                rfence::remote_rfence(hart_id).unwrap().set(ctx);
+                rfence::local_rfence().unwrap().add();
+                if hart_id == current_hartid() {
+                    continue;
+                }
+                let old_ipi_type = set_ipi_type(hart_id, IPI_TYPE_FENCE);
+                if old_ipi_type == 0 {
+                    unsafe {
+                        (*self.ipi_dev.load(Relaxed)).set_msip(hart_id);
+                    }
+                }
+            }
+        }
+        while !rfence::local_rfence().unwrap().is_sync() {
+            trap::rfence_signle_handler();
+        }
+        SbiRet::success(0)
+    }
+
+    #[inline]
+    pub fn get_time(&self) -> usize {
+        unsafe { (*self.ipi_dev.load(Relaxed)).read_mtime() as usize }
+    }
+
+    #[inline]
+    pub fn get_timeh(&self) -> usize {
+        unsafe { ((*self.ipi_dev.load(Relaxed)).read_mtime() >> 32) as usize }
+    }
+
+    #[inline]
+    pub fn set_msip(&self, hart_idx: usize) {
+        unsafe { (*self.ipi_dev.load(Relaxed)).set_msip(hart_idx) }
+    }
+
+    #[inline]
+    pub fn clear_msip(&self, hart_idx: usize) {
+        unsafe { (*self.ipi_dev.load(Relaxed)).clear_msip(hart_idx) }
+    }
+
+    #[inline]
+    pub fn write_mtimecmp(&self, hart_idx: usize, val: u64) {
+        unsafe { (*self.ipi_dev.load(Relaxed)).write_mtimecmp(hart_idx, val) }
+    }
+
+    #[inline]
+    pub fn clear(&self) {
+        let hart_id = current_hartid();
+        unsafe {
+            (*self.ipi_dev.load(Relaxed)).clear_msip(hart_id);
+            (*self.ipi_dev.load(Relaxed)).write_mtimecmp(hart_id, u64::MAX);
+        }
+    }
+}
+
+pub fn set_ipi_type(hart_id: usize, event_id: u8) -> u8 {
+    unsafe {
+        ROOT_STACK
+            .get_unchecked_mut(hart_id)
+            .hart_context()
+            .ipi_type
+            .fetch_or(event_id, Relaxed)
+    }
+}
+
+pub fn get_and_reset_ipi_type() -> u8 {
+    unsafe {
+        ROOT_STACK
+            .get_unchecked_mut(current_hartid())
+            .hart_context()
+            .ipi_type
+            .swap(0, Relaxed)
+    }
+}
+
+pub fn clear_msip() {
+    unsafe { SBI_IMPL.assume_init_ref() }
+        .ipi
+        .as_ref()
+        .unwrap()
+        .clear_msip(current_hartid())
+}
+
+pub fn clear_mtime() {
+    unsafe { SBI_IMPL.assume_init_ref() }
+        .ipi
+        .as_ref()
+        .unwrap()
+        .write_mtimecmp(current_hartid(), u64::MAX)
+}
+
+pub fn clear_all() {
+    unsafe { SBI_IMPL.assume_init_ref() }
+        .ipi
+        .as_ref()
+        .unwrap()
+        .clear();
+}

prototyper/src/sbi/logger.rs

@@ -0,0 +1,39 @@
+use core::str::FromStr;
+use log::{Level, LevelFilter};
+
+pub struct Logger;
+
+impl Logger {
+    pub fn init() {
+        log::set_max_level(
+            option_env!("RUST_LOG")
+                .and_then(|s| LevelFilter::from_str(s).ok())
+                .unwrap_or(LevelFilter::Info),
+        );
+        log::set_logger(&Logger).unwrap();
+    }
+}
+
+impl log::Log for Logger {
+    #[inline]
+    fn enabled(&self, _metadata: &log::Metadata) -> bool {
+        true
+    }
+
+    #[inline]
+    fn log(&self, record: &log::Record) {
+        let color_code: u8 = match record.level() {
+            Level::Error => 31,
+            Level::Warn => 93,
+            Level::Info => 34,
+            Level::Debug => 32,
+            Level::Trace => 90,
+        };
+        println!(
+            "\x1b[{color_code}m[{:>5}] {}\x1b[0m",
+            record.level(),
+            record.args(),
+        );
+    }
+    fn flush(&self) {}
+}

prototyper/src/sbi/mod.rs

@@ -0,0 +1,35 @@
+use rustsbi::RustSBI;
+
+pub mod console;
+pub mod rfence;
+pub mod ipi;
+pub mod hsm;
+pub mod reset;
+
+pub mod fifo;
+pub mod logger;
+pub mod hart_context;
+pub mod trap;
+pub mod trap_stack;
+
+use console::{SbiConsole, ConsoleDevice};
+use ipi::{SbiIpi, IpiDevice};
+use reset::{SbiReset, ResetDevice};
+use hsm::SbiHsm;
+use rfence::SbiRFence;
+
+
+#[derive(RustSBI, Default)]
+#[rustsbi(dynamic)]
+pub struct SBI<'a, C: ConsoleDevice, I: IpiDevice, R: ResetDevice> {
+    #[rustsbi(console)]
+    pub console: Option<SbiConsole<'a, C>>,
+    #[rustsbi(ipi, timer)]
+    pub ipi: Option<SbiIpi<'a, I>>,
+    #[rustsbi(hsm)]
+    pub hsm: Option<SbiHsm>,
+    #[rustsbi(reset)]
+    pub reset: Option<SbiReset<'a, R>>,
+    #[rustsbi(fence)]
+    pub rfence: Option<SbiRFence>
+}

prototyper/src/sbi/reset.rs

@@ -0,0 +1,65 @@
+use core::sync::atomic::{AtomicPtr, Ordering::Relaxed};
+use rustsbi::SbiRet;
+
+use crate::board::SBI_IMPL;
+
+pub trait ResetDevice {
+    fn fail(&self, code: u16) -> !;
+    fn pass(&self) -> !;
+    fn reset(&self) -> !;
+}
+
+pub struct SbiReset<'a, T: ResetDevice> {
+    pub reset_dev: &'a AtomicPtr<T>,
+}
+
+impl<'a, T: ResetDevice> SbiReset<'a, T> {
+    pub fn new(reset_dev: &'a AtomicPtr<T>) -> Self {
+        Self { reset_dev }
+    }
+
+    pub fn fail(&self) -> ! {
+        let reset_dev = self.reset_dev.load(Relaxed);
+        if reset_dev.is_null() {
+            trace!("test fail, begin dead loop");
+            loop {
+                core::hint::spin_loop()
+            }
+        } else {
+            trace!("Test fail, invoke process exit procedure on Reset device");
+            unsafe { (*reset_dev).fail(0) }
+        }
+    }
+}
+
+impl<'a, T: ResetDevice> rustsbi::Reset for SbiReset<'a, T> {
+    #[inline]
+    fn system_reset(&self, reset_type: u32, reset_reason: u32) -> SbiRet {
+        use rustsbi::spec::srst::{
+            RESET_REASON_NO_REASON, RESET_REASON_SYSTEM_FAILURE, RESET_TYPE_COLD_REBOOT,
+            RESET_TYPE_SHUTDOWN, RESET_TYPE_WARM_REBOOT,
+        };
+        match reset_type {
+            RESET_TYPE_SHUTDOWN => match reset_reason {
+                RESET_REASON_NO_REASON => unsafe {
+                    (*self.reset_dev.load(Relaxed)).pass();
+                },
+                RESET_REASON_SYSTEM_FAILURE => unsafe {
+                    (*self.reset_dev.load(Relaxed)).fail(u16::MAX);
+                },
+                value => unsafe {
+                    (*self.reset_dev.load(Relaxed)).fail(value as _);
+                },
+            },
+            RESET_TYPE_COLD_REBOOT | RESET_TYPE_WARM_REBOOT => unsafe {
+                (*self.reset_dev.load(Relaxed)).reset();
+            },
+
+            _ => SbiRet::invalid_param(),
+        }
+    }
+}
+
+pub fn fail() -> ! {
+    unsafe { SBI_IMPL.assume_init_ref() }.reset.as_ref().unwrap().fail()
+}

prototyper/src/rfence.rs → prototyper/src/sbi/rfence.rs

@@ -1,10 +1,11 @@
 use rustsbi::{HartMask, SbiRet};
 use spin::Mutex;
 
-use crate::board::SBI;
-use crate::fifo::{Fifo, FifoError};
+use crate::board::SBI_IMPL;
+use crate::sbi::fifo::{Fifo, FifoError};
 use crate::riscv_spec::current_hartid;
-use crate::trap_stack::ROOT_STACK;
+use crate::sbi::trap_stack::ROOT_STACK;
+use crate::sbi::trap;
 
 use core::sync::atomic::{AtomicU32, Ordering};
 
@@ -15,7 +16,7 @@ pub(crate) struct RFenceCell {
 
 #[repr(C)]
 #[derive(Clone, Copy, Debug)]
-pub(crate) struct RFenceCTX {
+pub struct RFenceCTX {
     pub start_addr: usize,
     pub size: usize,
     pub asid: usize,
@@ -25,7 +26,7 @@ pub(crate) struct RFenceCTX {
 
 #[allow(unused)]
 #[derive(Clone, Copy, Debug)]
-pub(crate) enum RFenceType {
+pub enum RFenceType {
     FenceI,
     SFenceVma,
     SFenceVmaAsid,
@@ -44,7 +45,7 @@ impl RFenceCell {
     }
 
     #[inline]
-    pub unsafe fn local(&self) -> LocalRFenceCell<'_> {
+    pub fn local(&self) -> LocalRFenceCell<'_> {
         LocalRFenceCell(self)
     }
 
@@ -65,13 +66,11 @@ pub struct LocalRFenceCell<'a>(&'a RFenceCell);
 pub struct RemoteRFenceCell<'a>(&'a RFenceCell);
 
 /// 获取当前hart的rfence上下文
-pub(crate) fn local_rfence() -> LocalRFenceCell<'static> {
+pub(crate) fn local_rfence() -> Option<LocalRFenceCell<'static>> {
     unsafe {
         ROOT_STACK
-            .get_unchecked_mut(current_hartid())
-            .hart_context()
-            .rfence
-            .local()
+            .get_mut(current_hartid())
+            .map(|x| x.hart_context().rfence.local())
     }
 }
 
@@ -86,7 +85,7 @@ pub(crate) fn remote_rfence(hart_id: usize) -> Option<RemoteRFenceCell<'static>>
 
 #[allow(unused)]
 impl LocalRFenceCell<'_> {
-    pub fn is_zero(&self) -> bool {
+    pub fn is_sync(&self) -> bool {
         self.0.wait_sync_count.load(Ordering::Relaxed) == 0
     }
     pub fn add(&self) {
@@ -105,9 +104,9 @@ impl LocalRFenceCell<'_> {
     pub fn set(&self, ctx: RFenceCTX) {
         loop {
             match self.0.queue.lock().push((ctx, current_hartid())) {
-                Ok(_) => break (),
-                Err(FifoError::NoChange) => {
-                    crate::trap::rfence_signle_handler();
+                Ok(_) => break,
+                Err(FifoError::Full) => {
+                    trap::rfence_signle_handler();
                     continue;
                 }
                 _ => panic!("Unable to push fence ops to fifo"),
@@ -122,9 +121,9 @@ impl RemoteRFenceCell<'_> {
         // TODO: maybe deadlock
         loop {
             match self.0.queue.lock().push((ctx, current_hartid())) {
-                Ok(_) => break (),
-                Err(FifoError::NoChange) => {
-                    crate::trap::rfence_signle_handler();
+                Ok(_) => break,
+                Err(FifoError::Full) => {
+                    trap::rfence_signle_handler();
                     continue;
                 }
                 _ => panic!("Unable to push fence ops to fifo"),
@@ -138,11 +137,11 @@ impl RemoteRFenceCell<'_> {
 }
 
 /// RFENCE
-pub(crate) struct RFence;
+pub(crate) struct SbiRFence;
 
 fn remote_fence_process(rfence_ctx: RFenceCTX, hart_mask: HartMask) -> SbiRet {
-    let sbi_ret = unsafe { SBI.assume_init_mut() }
-        .clint
+    let sbi_ret = unsafe { SBI_IMPL.assume_init_mut() }
+        .ipi
         .as_ref()
         .unwrap()
         .send_ipi_by_fence(hart_mask, rfence_ctx);
@@ -150,7 +149,7 @@ fn remote_fence_process(rfence_ctx: RFenceCTX, hart_mask: HartMask) -> SbiRet {
     sbi_ret
 }
 
-impl rustsbi::Fence for RFence {
+impl rustsbi::Fence for SbiRFence {
     fn remote_fence_i(&self, hart_mask: HartMask) -> SbiRet {
         remote_fence_process(
             RFenceCTX {

prototyper/src/trap.rs → prototyper/src/sbi/trap.rs

@@ -1,4 +1,3 @@
-use aclint::SifiveClint as Clint;
 use core::arch::asm;
 use fast_trap::{trap_entry, FastContext, FastResult};
 use riscv::register::{
@@ -7,11 +6,12 @@ use riscv::register::{
 };
 use rustsbi::RustSBI;
 
-use crate::board::SBI;
-use crate::clint::{self, SIFIVECLINT};
-use crate::hsm::local_hsm;
-use crate::rfence::{local_rfence, RFenceType};
+use crate::board::SBI_IMPL;
 use crate::riscv_spec::{current_hartid, CSR_TIME, CSR_TIMEH};
+use crate::sbi::rfence::{self, local_rfence, RFenceType};
+use crate::sbi::hsm::local_hsm;
+use crate::sbi::ipi;
+use crate::sbi::console;
 
 const PAGE_SIZE: usize = 4096;
 // TODO: `TLB_FLUSH_LIMIT` is a platform-dependent parameter
@@ -63,12 +63,7 @@ unsafe extern "C" fn mtimer() {
             sd    a2, 3*8(sp)
         ",
         // 清除 mtimecmp
-        "   la    a0, {clint_ptr}
-            ld    a0, (a0)
-            csrr  a1, mhartid
-            addi  a2, zero, -1
-            call  {set_mtimecmp}
-        ",
+        "    call  {clear_mtime}",
         // 设置 stip
         "   li    a0, {mip_stip}
             csrrs zero, mip, a0
@@ -86,10 +81,8 @@ unsafe extern "C" fn mtimer() {
         "   csrrw sp, mscratch, sp",
         // 返回
         "   mret",
-        mip_stip     = const 1 << 5,
-        clint_ptr    =   sym SIFIVECLINT,
-        //                   Clint::write_mtimecmp_naked(&self, hart_idx, val)
-        set_mtimecmp =   sym Clint::write_mtimecmp_naked,
+        mip_stip    = const 1 << 5,
+        clear_mtime = sym ipi::clear_mtime,
         options(noreturn)
     )
 }
@@ -193,7 +186,7 @@ pub extern "C" fn msoft_hanlder(ctx: &mut SupervisorContext) {
     match local_hsm().start() {
         // HSM Start
         Ok(next_stage) => {
-            clint::clear_msip();
+            ipi::clear_msip();
             unsafe {
                 mstatus::set_mpie();
                 mstatus::set_mpp(next_stage.next_mode);
@@ -203,7 +196,7 @@ pub extern "C" fn msoft_hanlder(ctx: &mut SupervisorContext) {
             boot(ctx, next_stage.start_addr, next_stage.opaque);
         }
         Err(rustsbi::spec::hsm::HART_STOP) => {
-            clint::clear_msip();
+            ipi::clear_msip();
             unsafe {
                 mie::set_msoft();
             }
@@ -217,12 +210,11 @@ pub extern "C" fn msoft_hanlder(ctx: &mut SupervisorContext) {
 }
 
 pub fn rfence_signle_handler() {
-    let rfence_context = local_rfence().get();
-    match rfence_context {
-        Some((ctx, id)) => match ctx.op {
+    let rfence_context = local_rfence().unwrap().get();
+        if let Some((ctx, id)) = rfence_context { match ctx.op {
             RFenceType::FenceI => unsafe {
                 asm!("fence.i");
-                crate::rfence::remote_rfence(id).unwrap().sub();
+                rfence::remote_rfence(id).unwrap().sub();
             },
             RFenceType::SFenceVma => {
                 // If the flush size is greater than the maximum limit then simply flush all
@@ -241,7 +233,7 @@ pub fn rfence_signle_handler() {
                         }
                     }
                 }
-                crate::rfence::remote_rfence(id).unwrap().sub();
+                rfence::remote_rfence(id).unwrap().sub();
             }
             RFenceType::SFenceVmaAsid => {
                 let asid = ctx.asid;
@@ -261,32 +253,31 @@ pub fn rfence_signle_handler() {
                         }
                     }
                 }
-                crate::rfence::remote_rfence(id).unwrap().sub();
+                rfence::remote_rfence(id).unwrap().sub();
             }
             rfencetype => {
                 error!("Unsupported RFence Type: {:?}!", rfencetype);
             }
-        },
-        None => {}
+        }
     }
 }
 
 pub fn rfence_handler() {
-    while local_rfence().is_empty() == false {
+    while !local_rfence().unwrap().is_empty() {
         rfence_signle_handler();
     }
 }
 
 pub fn msoft_ipi_handler() {
-    use crate::clint::get_and_reset_ipi_type;
-    clint::clear_msip();
+    use ipi::get_and_reset_ipi_type;
+    ipi::clear_msip();
     let ipi_type = get_and_reset_ipi_type();
-    if (ipi_type & crate::clint::IPI_TYPE_SSOFT) != 0 {
+    if (ipi_type & ipi::IPI_TYPE_SSOFT) != 0 {
         unsafe {
             riscv::register::mip::set_ssoft();
         }
     }
-    if (ipi_type & crate::clint::IPI_TYPE_FENCE) != 0 {
+    if (ipi_type & ipi::IPI_TYPE_FENCE) != 0 {
         rfence_handler();
     }
 }
@@ -317,7 +308,7 @@ pub extern "C" fn fast_handler(
         // SBI call
         T::Exception(E::SupervisorEnvCall) => {
             use sbi_spec::{base, hsm, legacy};
-            let mut ret = unsafe { SBI.assume_init_ref() }.handle_ecall(
+            let mut ret = unsafe { SBI_IMPL.assume_init_ref() }.handle_ecall(
                 a7,
                 a6,
                 [ctx.a0(), a1, a2, a3, a4, a5],
@@ -344,19 +335,11 @@ pub extern "C" fn fast_handler(
             } else {
                 match a7 {
                     legacy::LEGACY_CONSOLE_PUTCHAR => {
-                        ret.error = unsafe { SBI.assume_init_ref() }
-                            .uart16550
-                            .as_ref()
-                            .unwrap()
-                            .putchar(ctx.a0());
+                        ret.error = console::putchar(ctx.a0());
                         ret.value = a1;
                     }
                     legacy::LEGACY_CONSOLE_GETCHAR => {
-                        ret.error = unsafe { SBI.assume_init_ref() }
-                            .uart16550
-                            .as_ref()
-                            .unwrap()
-                            .getchar();
+                        ret.error = console::getchar();
                         ret.value = a1;
                     }
                     _ => {}
@@ -427,8 +410,8 @@ fn illegal_instruction_handler(ctx: &mut FastContext) -> bool {
                     "Unsupported CSR rd: {}",
                     csr.rd()
                 );
-                ctx.regs().a[(csr.rd() - 10) as usize] = unsafe { SBI.assume_init_ref() }
-                    .clint
+                ctx.regs().a[(csr.rd() - 10) as usize] = unsafe { SBI_IMPL.assume_init_ref() }
+                    .ipi
                     .as_ref()
                     .unwrap()
                     .get_time();
@@ -439,8 +422,8 @@ fn illegal_instruction_handler(ctx: &mut FastContext) -> bool {
                     "Unsupported CSR rd: {}",
                     csr.rd()
                 );
-                ctx.regs().a[(csr.rd() - 10) as usize] = unsafe { SBI.assume_init_ref() }
-                    .clint
+                ctx.regs().a[(csr.rd() - 10) as usize] = unsafe { SBI_IMPL.assume_init_ref() }
+                    .ipi
                     .as_ref()
                     .unwrap()
                     .get_timeh();

prototyper/src/trap_stack.rs → prototyper/src/sbi/trap_stack.rs

@@ -1,8 +1,8 @@
 use core::mem::forget;
 use fast_trap::FreeTrapStack;
 
-use crate::hart_context::HartContext;
-use crate::trap::fast_handler;
+use crate::sbi::hart_context::HartContext;
+use crate::sbi::trap::fast_handler;
 use crate::riscv_spec::current_hartid;
 
 const LEN_STACK_PER_HART: usize = 16 * 1024;

rust-toolchain.toml

@@ -1,5 +1,5 @@
 [toolchain]
 channel = "nightly-2024-09-21"
-components = ["rustfmt", "llvm-tools-preview"]
+components = ["rustfmt", "llvm-tools-preview", "clippy"]
 targets = ["riscv64imac-unknown-none-elf"]
 profile = "minimal"