lib: adds feature `sbi_2_0` and gate pmu read_hi

.github/workflows/rust.yml

@@ -49,16 +49,26 @@ jobs:
         uses: Swatinem/rust-cache@v2
         with:
           key: ${{ matrix.TARGET }}
-      - name: Check (no default features)
+      - name: Check (no default features, SBI 1.0.0)
         uses: actions-rs/cargo@v1
         with:
           command: check
           args: --target ${{ matrix.TARGET }} --no-default-features --verbose
-      - name: Check (machine)
+      - name: Check (no default features, SBI 2.0-rc1)
+        uses: actions-rs/cargo@v1
+        with:
+          command: check
+          args: --features "sbi_2_0" --target ${{ matrix.TARGET }} --no-default-features --verbose
+      - name: Check (machine, SBI 1.0.0)
         uses: actions-rs/cargo@v1
         with:
           command: check
           args: --target ${{ matrix.TARGET }} --features "machine" --verbose
+      - name: Check (machine, SBI 2.0-rc1)
+        uses: actions-rs/cargo@v1
+        with:
+          command: check
+          args: --features "sbi_2_0" --target ${{ matrix.TARGET }} --features "machine" --verbose
 
   check-nightly:
     name: Cargo check (nightly)
@@ -79,16 +89,26 @@ jobs:
         uses: Swatinem/rust-cache@v2
         with:
           key: ${{ matrix.TARGET }}
-      - name: Check (singleton)
+      - name: Check (singleton, SBI 1.0.0)
         uses: actions-rs/cargo@v1
         with:
           command: check
           args: --features "singleton" --target ${{ matrix.TARGET }} --verbose
-      - name: Check (legacy)
+      - name: Check (singleton, SBI 2.0-rc1)
+        uses: actions-rs/cargo@v1
+        with:
+          command: check
+          args: --features "singleton,sbi_2_0" --target ${{ matrix.TARGET }} --verbose
+      - name: Check (legacy, SBI 1.0.0)
         uses: actions-rs/cargo@v1
         with:
           command: check
           args: --features "legacy" --target ${{ matrix.TARGET }} --verbose
+      - name: Check (legacy, SBI 2.0-rc1)
+        uses: actions-rs/cargo@v1
+        with:
+          command: check
+          args: --features "legacy,sbi_2_0" --target ${{ matrix.TARGET }} --verbose
 
   tests:
     name: Run tests
@@ -108,13 +128,23 @@ jobs:
         uses: actions-rs/cargo@v1
         with:
           command: clippy
-      - name: Run tests (no default features)
+      - name: Run tests (no default features, SBI 1.0.0)
         uses: actions-rs/cargo@v1
         with:
           command: test
           args: --no-default-features --verbose
-      - name: Run tests (machine)
+      - name: Run tests (no default features, SBI 2.0-rc1)
+        uses: actions-rs/cargo@v1
+        with:
+          command: test
+          args: --features "sbi_2_0" --no-default-features --verbose
+      - name: Run tests (machine, SBI 1.0.0)
         uses: actions-rs/cargo@v1
         with:
           command: test
           args: --features "machine" --verbose
+      - name: Run tests (machine, SBI 2.0-rc1)
+        uses: actions-rs/cargo@v1
+        with:
+          command: test
+          args: --features "machine,sbi_2_0" --verbose

CHANGELOG.md

@@ -13,6 +13,7 @@ Bump RISC-V SBI specification version to 2.0-rc1.
 
 - pmu: counter_fw_read_hi function in SBI 2.0-rc1
 - lib: memory address parameters and DBCN extension
+- lib: adds feature `sbi_2_0` and gate pmu read_hi
 
 ### Modified
 

Cargo.toml

@@ -21,6 +21,10 @@ riscv = { version = "0.10.1", optional = true }
 
 [features]
 default = ["machine"]
+# Enable RISC-V SBI 2.0-rc1 extensions, i.e. the DBCN extension
+# It will add a generic parameter to RustSBI instance structure.
+# FIXME: remove this feature (and from CI workflow) on rustsbi 0.4.0 and adds this generic parameter permanently onto RustSBI.
+sbi_2_0 = []
 # Run RustSBI on machine mode
 # This feature enables to use RISC-V primitives on current machine mode environment
 # If you are developing a cross-architecture virtual machine, consider disabling this feature

src/ecall/pmu.rs

@@ -21,6 +21,7 @@ pub fn handle_ecall(
         PMU_COUNTER_START => counter_start(param0, param1, param2, param3 as _),
         PMU_COUNTER_STOP => counter_stop(param0, param1, param2),
         PMU_COUNTER_FW_READ => counter_fw_read(param0),
+        #[cfg(feature = "sbi_2_0")]
         PMU_COUNTER_FW_READ_HI => counter_fw_read_hi(param0),
         _ => SbiRet::not_supported(),
     }
@@ -49,6 +50,7 @@ pub fn handle_ecall(
         PMU_COUNTER_START => counter_start(param0, param1, param2, concat_u32(param4, param3)),
         PMU_COUNTER_STOP => counter_stop(param0, param1, param2),
         PMU_COUNTER_FW_READ => counter_fw_read(param0),
+        #[cfg(feature = "sbi_2_0")]
         PMU_COUNTER_FW_READ_HI => counter_fw_read_hi(param0),
         _ => SbiRet::not_supported(),
     }

src/instance.rs

@@ -236,6 +236,7 @@ impl<T: Timer, I: Ipi, R: Fence, H: Hsm, S: Reset, P: Pmu> RustSBI<T, I, R, H, S
                         }
                         spec::pmu::PMU_COUNTER_STOP => pmu.counter_stop(param0, param1, param2),
                         spec::pmu::PMU_COUNTER_FW_READ => pmu.counter_fw_read(param0),
+                        #[cfg(feature = "sbi_2_0")]
                         spec::pmu::PMU_COUNTER_FW_READ_HI => pmu.counter_fw_read(param0),
                         _ => SbiRet::not_supported(),
                     }
@@ -262,6 +263,7 @@ impl<T: Timer, I: Ipi, R: Fence, H: Hsm, S: Reset, P: Pmu> RustSBI<T, I, R, H, S
                         }
                         spec::pmu::PMU_COUNTER_STOP => pmu.counter_stop(param0, param1, param2),
                         spec::pmu::PMU_COUNTER_FW_READ => pmu.counter_fw_read(param0),
+                        #[cfg(feature = "sbi_2_0")]
                         spec::pmu::PMU_COUNTER_FW_READ_HI => pmu.counter_fw_read(param0),
                         _ => SbiRet::not_supported(),
                     }
@@ -555,6 +557,7 @@ impl Pmu for Infallible {
         unreachable!()
     }
 
+    #[cfg(feature = "sbi_2_0")]
     fn counter_fw_read_hi(&self, _: usize) -> SbiRet {
         unreachable!()
     }

src/lib.rs

@@ -572,7 +572,12 @@ pub const LOGO: &str = r".______       __    __      _______.___________.  _____
 | _| `._____| \______/ |_______/       |__|  |_______/    |______/ |__|";
 
 // RustSBI supports RISC-V SBI specification 2.0-rc1
-const SBI_SPEC_MAJOR: usize = 2;
+const SBI_SPEC_MAJOR: usize = match () {
+    #[cfg(feature = "sbi_2_0")]
+    () => 2,
+    #[cfg(not(feature = "sbi_2_0"))]
+    () => 1,
+};
 const SBI_SPEC_MINOR: usize = 0;
 
 /// RustSBI implementation ID: 4

src/pmu.rs

@@ -209,6 +209,7 @@ pub trait Pmu: Send + Sync {
     /// |:--------------------------|:----------------------------------------------
     /// | `SbiRet::success()`       | firmware counter read successfully.
     /// | `SbiRet::invalid_param()` | `counter_idx` points to a hardware counter or an invalid counter.
+    #[cfg(feature = "sbi_2_0")]
     fn counter_fw_read_hi(&self, counter_idx: usize) -> SbiRet {
         match () {
             #[cfg(not(target_pointer_width = "32"))]
@@ -281,6 +282,7 @@ impl<T: Pmu> Pmu for &T {
     fn counter_fw_read(&self, counter_idx: usize) -> SbiRet {
         T::counter_fw_read(self, counter_idx)
     }
+    #[cfg(feature = "sbi_2_0")]
     #[inline]
     fn counter_fw_read_hi(&self, counter_idx: usize) -> SbiRet {
         T::counter_fw_read_hi(self, counter_idx)
@@ -389,7 +391,7 @@ pub(crate) fn counter_fw_read(counter_idx: usize) -> SbiRet {
     SbiRet::not_supported()
 }
 
-#[cfg(feature = "singleton")]
+#[cfg(all(feature = "singleton", feature = "sbi_2_0"))]
 #[inline]
 pub(crate) fn counter_fw_read_hi(counter_idx: usize) -> SbiRet {
     if let Some(obj) = PMU.get() {