lib: upgrade `riscv` dependency to version 0.12.0

Signed-off-by: Zhouqi Jiang <luojia@hust.edu.cn>

Cargo.toml

@@ -18,7 +18,7 @@ exclude = ["/.github"]
 
 [dependencies]
 sbi-spec = { version = "0.0.7", path = "sbi-spec" }
-riscv = { version = "0.11.1", optional = true }
+riscv = { version = "0.12.0", optional = true, default-features = false }
 sbi-rt = { version = "0.0.3", features = ["integer-impls"], optional = true, path = "sbi-rt" }
 rustsbi-macros = { version = "0.0.2", path = "macros" }
 

sbi-testing/Cargo.toml

@@ -20,7 +20,7 @@ targets = ["riscv32imac-unknown-none-elf", "riscv64imac-unknown-none-elf"]
 [dependencies]
 sbi-rt = { version = "0.0.3", path = "../sbi-rt" }
 sbi-spec = { version = "0.0.7", path = "../sbi-spec" }
-riscv = "0.11.1"
+riscv = { version = "0.12.0", default-features = false }
 log = { version = "0.4", package = "log", optional = true }
 
 [features]

sbi-testing/src/spi.rs

@@ -1,10 +1,12 @@
-//! Inter-processor interrupt extension test suite.
+//! Inter-processor interrupt extension test suite.
 
 use crate::thread::Thread;
-use riscv::register::{
-    scause::Interrupt,
-    scause::{self, Trap},
-    sie,
+use riscv::{
+    interrupt::supervisor::{Exception, Interrupt},
+    register::{
+        scause::{self, Trap},
+        sie,
+    },
 };
 use sbi::HartMask;
 
@@ -18,7 +20,7 @@ pub enum Case {
     /// Test process for an inter-processor interrupt has been received.
     SendIpi,
     /// Test failed for unexpected trap occurred upon tests.
-    UnexpectedTrap(Trap),
+    UnexpectedTrap(Trap<usize, usize>),
     /// All test cases on inter-processor interrupt extension has passed.
     Pass,
 }
@@ -45,12 +47,13 @@ pub fn test(hart_id: usize, mut f: impl FnMut(Case)) {
         sie::set_ssoft();
         thread.execute();
     }
-    match scause::read().cause() {
-        Trap::Interrupt(Interrupt::SupervisorSoft) => {
+    let trap = scause::read().cause();
+    match trap.try_into::<Interrupt, Exception>() {
+        Ok(Trap::Interrupt(Interrupt::SupervisorSoft)) => {
             f(Case::SendIpi);
             f(Case::Pass);
         }
-        trap => {
+        _ => {
             f(Case::UnexpectedTrap(trap));
         }
     }

sbi-testing/src/time.rs

@@ -1,7 +1,13 @@
 //! Timer programmer extension test suite.
 
 use crate::thread::Thread;
-use riscv::register::scause::{self, Trap};
+use riscv::{
+    interrupt::supervisor::{Exception, Interrupt},
+    register::{
+        scause::{self, Trap},
+        sie, time,
+    },
+};
 
 /// Timer programmer extension test cases.
 #[derive(Clone, Debug)]
@@ -29,15 +35,13 @@ pub enum Case {
     /// Test process for timer has been set.
     SetTimer,
     /// Test failed for unexpected trap during timer test.
-    UnexpectedTrap(Trap),
+    UnexpectedTrap(Trap<usize, usize>),
     /// All test cases on timer extension has passed.
     Pass,
 }
 
 /// Test timer extension.
 pub fn test(delay: u64, mut f: impl FnMut(Case)) {
-    use riscv::register::{scause::Interrupt, sie, time};
-
     if sbi::probe_extension(sbi::Timer).is_unavailable() {
         f(Case::NotExist);
         return;
@@ -84,13 +88,14 @@ pub fn test(delay: u64, mut f: impl FnMut(Case)) {
         sie::set_stimer();
         thread.execute();
     }
-    match scause::read().cause() {
-        Trap::Interrupt(Interrupt::SupervisorTimer) => {
+    let trap = scause::read().cause();
+    match trap.try_into::<Interrupt, Exception>() {
+        Ok(Trap::Interrupt(Interrupt::SupervisorTimer)) => {
             sbi::set_timer(u64::MAX);
             f(Case::SetTimer);
             f(Case::Pass);
         }
-        trap => {
+        _ => {
             f(Case::UnexpectedTrap(trap));
         }
     }