feat(prototyper): add memory range to SBI and set pmp for it

Signed-off-by: Woshiluo Luo <woshiluo.luo@outlook.com>

prototyper/src/dt.rs

@@ -11,6 +11,8 @@ pub struct Tree<'a> {
     pub model: Option<StrSeq<'a>>,
     /// Chosen node containing boot parameters.
     pub chosen: Chosen<'a>,
+    /// Memory information.
+    pub memory: NodeSeq<'a>,
     /// CPU information.
     pub cpus: Cpus<'a>,
     /// System-on-chip components.
@@ -62,6 +64,13 @@ pub struct Device<'a> {
     pub reg: Reg<'a>,
 }
 
+/// Memory range.
+#[derive(Deserialize)]
+#[serde(rename_all = "kebab-case")]
+pub struct Memory<'a> {
+    pub reg: Reg<'a>,
+}
+
 /// Errors that can occur during device tree parsing.
 pub enum ParseDeviceTreeError {
     /// Invalid device tree format.

prototyper/src/main.rs

@@ -45,18 +45,16 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
     let boot_hart_info = platform::get_boot_hart(opaque, nonstandard_a2);
     // boot hart task entry.
     if boot_hart_info.is_boot_hart {
-        let fdt_addr = boot_hart_info.fdt_address;
-
         // 1. Init FDT
-        // parse the device tree.
-        // TODO: shoule remove `fail:device_tree_format`.
+        // parse the device tree
+        // TODO: shoule remove `fail:device_tree_format`
+        let fdt_addr = boot_hart_info.fdt_address;
         let dtb = dt::parse_device_tree(fdt_addr).unwrap_or_else(fail::device_tree_format);
         let dtb = dtb.share();
 
         // TODO: should remove `fail:device_tree_deserialize`.
         let tree =
             serde_device_tree::from_raw_mut(&dtb).unwrap_or_else(fail::device_tree_deserialize);
-
         // 2. Init device
         // TODO: The device base address should be find in a better way.
         let console_base = tree.soc.serial.unwrap().iter().next().unwrap();
@@ -77,6 +75,17 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
         board::ipi_dev_init(usize::from_str_radix(ipi_base_address, 16).unwrap());
 
         // 3. Init the SBI implementation
+        // TODO: More than one memory node or range?
+        let memory_reg = tree
+            .memory
+            .iter()
+            .next()
+            .unwrap()
+            .deserialize::<dt::Memory>()
+            .reg;
+        let memory_range = memory_reg.iter().next().unwrap().0;
+
+        // 3. Init SBI
         unsafe {
             SBI_IMPL = MaybeUninit::new(SBI {
                 console: Some(SbiConsole::new(&UART)),
@@ -84,6 +93,7 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
                 hsm: Some(SbiHsm),
                 reset: Some(SbiReset::new(&SIFIVETEST)),
                 rfence: Some(SbiRFence),
+                memory_range,
             });
         }
 
@@ -114,7 +124,7 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
                 .unwrap_or("<unspecified>")
         );
 
-        platform::set_pmp();
+        platform::set_pmp(&unsafe { SBI_IMPL.assume_init_ref() }.memory_range);
 
         // Get boot information and prepare for kernel entry.
         let boot_info = platform::get_boot_info(nonstandard_a2);
@@ -142,7 +152,7 @@ extern "C" fn rust_main(_hart_id: usize, opaque: usize, nonstandard_a2: usize) {
             core::hint::spin_loop()
         }
 
-        platform::set_pmp();
+        platform::set_pmp(&unsafe { SBI_IMPL.assume_init_ref() }.memory_range);
     }
 
     // Clear all pending IPIs.

prototyper/src/platform/mod.rs

@@ -4,6 +4,7 @@ pub mod dynamic;
 pub mod payload;
 
 use core::arch::asm;
+use core::ops::Range;
 use riscv::register::mstatus;
 
 pub struct BootInfo {
@@ -21,9 +22,13 @@ pub use dynamic::{get_boot_hart, get_boot_info};
 #[cfg(feature = "payload")]
 pub use payload::{get_boot_hart, get_boot_info};
 
-pub fn set_pmp() {
-    // TODO: PMP configuration needs to be obtained through the memory range in the device tree
+pub fn set_pmp(memory_range: &Range<usize>) {
     unsafe {
+        // [0..memory_range.start] RW
+        // [memory_range.start..sbi_start] RWX
+        // [sbi_start..sbi_end] NONE
+        // [sbi_end..memory_range.end] RWX
+        // [memory_range.end..INF] RW
         use riscv::register::*;
         let mut sbi_start_address: usize;
         let mut sbi_end_address: usize;
@@ -31,11 +36,15 @@ pub fn set_pmp() {
         asm!("la {}, sbi_end", out(reg) sbi_end_address, options(nomem));
         pmpcfg0::set_pmp(0, Range::OFF, Permission::NONE, false);
         pmpaddr0::write(0);
-        pmpcfg0::set_pmp(1, Range::TOR, Permission::RWX, false);
-        pmpaddr1::write(sbi_start_address >> 2);
-        pmpcfg0::set_pmp(2, Range::TOR, Permission::NONE, false);
-        pmpaddr2::write(sbi_end_address >> 2);
-        pmpcfg0::set_pmp(3, Range::TOR, Permission::RWX, false);
-        pmpaddr3::write(usize::MAX >> 2);
+        pmpcfg0::set_pmp(1, Range::TOR, Permission::RW, false);
+        pmpaddr1::write(memory_range.start >> 2);
+        pmpcfg0::set_pmp(2, Range::TOR, Permission::RWX, false);
+        pmpaddr2::write(sbi_start_address >> 2);
+        pmpcfg0::set_pmp(3, Range::TOR, Permission::NONE, false);
+        pmpaddr3::write(sbi_end_address >> 2);
+        pmpcfg0::set_pmp(4, Range::TOR, Permission::RWX, false);
+        pmpaddr4::write(memory_range.end >> 2);
+        pmpcfg0::set_pmp(5, Range::TOR, Permission::RW, false);
+        pmpaddr5::write(usize::MAX >> 2);
     }
 }

prototyper/src/sbi/mod.rs

@@ -14,6 +14,7 @@ pub mod trap;
 pub mod trap_stack;
 
 use console::{ConsoleDevice, SbiConsole};
+use core::ops::Range;
 use hsm::SbiHsm;
 use ipi::{IpiDevice, SbiIpi};
 use reset::{ResetDevice, SbiReset};
@@ -32,4 +33,5 @@ pub struct SBI<'a, C: ConsoleDevice, I: IpiDevice, R: ResetDevice> {
     pub reset: Option<SbiReset<'a, R>>,
     #[rustsbi(fence)]
     pub rfence: Option<SbiRFence>,
+    pub memory_range: Range<usize>,
 }