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@@ -211,6 +211,15 @@ fn main() -> ! {
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medeleg::set_instruction_misaligned();
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medeleg::set_breakpoint();
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medeleg::set_user_env_call();
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+ /* MMU Exception Delegation
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+ /* Page Faults are *Reserved* in 1.9.1 version */
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+ - medeleg::set_instruction_page_fault();
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+ - medeleg::set_load_page_fault();
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+ - medeleg::set_store_page_fault();
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+ /* Actually, in 1.9.1 they are merged into more general exceptions */
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+ + medeleg::set_instruction_fault();
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+ + medeleg::set_load_fault();
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+ + medeleg::set_store_fault(); */
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medeleg::set_instruction_fault();
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medeleg::set_load_fault();
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medeleg::set_store_fault();
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@@ -370,11 +379,18 @@ extern "C" fn start_trap_rust(trap_frame: &mut TrapFrame) {
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}
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}
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Trap::Interrupt(Interrupt::MachineExternal) => {
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+ // to make UARTHS interrupt soft delegation work; ref: pull request #1
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+ // PLIC target0(Always Hart0-M-Interrupt) acquire
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let irq_id = unsafe { (0x0c20_0004 as *const u32).read_volatile() };
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+ // read from UARTHS RXFIFO
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let ch: u8 = unsafe { (0x3800_0004 as *const u32).read_volatile() & 0xFF } as u8;
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+ // black magic @_@, soft delegation won't success without it!
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print!("{}", 0 as char);
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+ // PLIC complete
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unsafe { (0x0c20_0004 as *mut u32).write_volatile(irq_id); }
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+ // communicate with delegated interrupt with stval CSR
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unsafe { llvm_asm!("csrw stval, $0" :: "r"(ch as usize) :: "volatile"); }
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+ // soft delegate to S Mode soft interrupt
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unsafe { mip::set_ssoft(); }
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}
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Trap::Exception(Exception::IllegalInstruction) => {
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luojia65