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crate: update dependency `sbi-spec` to v0.0.6

use `Physical` struct from `sbi-spec` crate; remove `memory_range` module.
luojia65 2 years ago
parent
commit
9ba09fc16c
6 changed files with 8 additions and 83 deletions
  1. 1 0
      CHANGELOG.md
  2. 1 1
      Cargo.toml
  3. 1 2
      src/console.rs
  4. 5 4
      src/instance.rs
  5. 0 2
      src/lib.rs
  6. 0 74
      src/memory_range.rs

+ 1 - 0
CHANGELOG.md

@@ -13,6 +13,7 @@ to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
 - run on provided `MachineInfo` by default; bare metal M-mode environment should gate `machine`
 - doc: grammar tweaks in hsm module
+- update dependency `sbi-spec` to v0.0.6, use `Physical` struct from `sbi-spec` crate.
 
 ### Removed
 

+ 1 - 1
Cargo.toml

@@ -17,7 +17,7 @@ edition = "2021"
 exclude = ["/.github"]
 
 [dependencies]
-sbi-spec = "0.0.5"
+sbi-spec = "0.0.6"
 riscv = { version = "0.10.1", optional = true }
 
 [features]

+ 1 - 2
src/console.rs

@@ -1,5 +1,4 @@
-use crate::memory_range::Physical;
-use spec::binary::SbiRet;
+use spec::binary::{Physical, SbiRet};
 
 /// Debug Console Extension
 ///

+ 5 - 4
src/instance.rs

@@ -1,10 +1,11 @@
 use crate::{
-    spec::binary::SbiRet, Console, Fence, HartMask, Hsm, Ipi, Physical, Pmu, Reset, Timer,
-    IMPL_ID_RUSTSBI, RUSTSBI_VERSION, SBI_SPEC_MAJOR, SBI_SPEC_MINOR,
+    spec::binary::SbiRet, Console, Fence, HartMask, Hsm, Ipi, Pmu, Reset, Timer, IMPL_ID_RUSTSBI,
+    RUSTSBI_VERSION, SBI_SPEC_MAJOR, SBI_SPEC_MINOR,
 };
 use core::convert::Infallible;
 #[cfg(feature = "machine")]
 use riscv::register::{marchid, mimpid, mvendorid};
+use spec::binary::Physical;
 
 /// RustSBI instance including standard extensions
 ///
@@ -612,11 +613,11 @@ impl Pmu for Infallible {
 }
 
 impl Console for Infallible {
-    fn write(&self, _: crate::Physical<&[u8]>) -> SbiRet {
+    fn write(&self, _: Physical<&[u8]>) -> SbiRet {
         unreachable!()
     }
 
-    fn read(&self, _: crate::Physical<&mut [u8]>) -> SbiRet {
+    fn read(&self, _: Physical<&mut [u8]>) -> SbiRet {
         unreachable!()
     }
 

+ 0 - 2
src/lib.rs

@@ -507,7 +507,6 @@ mod hart_mask;
 mod hsm;
 mod instance;
 mod ipi;
-mod memory_range;
 mod pmu;
 mod reset;
 mod rfence;
@@ -545,7 +544,6 @@ pub use hart_mask::HartMask;
 pub use hsm::Hsm;
 pub use instance::{Builder, RustSBI};
 pub use ipi::Ipi;
-pub use memory_range::Physical;
 pub use pmu::Pmu;
 pub use reset::Reset;
 pub use rfence::Rfence as Fence;

+ 0 - 74
src/memory_range.rs

@@ -1,74 +0,0 @@
-//! Shared memory physical address range parameter
-
-use core::marker::PhantomData;
-
-/// Shared memory physical address range with type annotation
-///
-/// This is a wrapper around a kind of pointer to represent that its value is
-/// indexed on physical address space.
-///
-/// This structure cannot be dereferenced directly with physical addresses,
-/// because on RISC-V systems the physical address space could be larger than the
-/// virtual ones. Hence, this structure describes physical memory range by
-/// two `usize` values: the upper `phys_addr_hi` and lower `phys_addr_lo`.
-///
-/// # Requirements
-///
-/// If an SBI function needs to pass a shared memory physical address range to
-/// the SBI implementation (or higher privilege mode), then this physical memory
-/// address range MUST satisfy the following requirements:
-///
-/// * The SBI implementation MUST check that the supervisor-mode software is
-///   allowed to access the specified physical memory range with the access
-///   type requested (read and/or write).
-/// * The SBI implementation MUST access the specified physical memory range
-///   using the PMA attributes.
-/// * The data in the shared memory MUST follow little-endian byte ordering.
-///
-/// *NOTE:* If the supervisor-mode software accesses the same physical memory
-/// range using a memory type different than the PMA, then a loss of coherence
-/// or unexpected memory ordering may occur. The invoking software should
-/// follow the rules and sequences defined in the RISC-V Svpbmt specification
-/// to prevent the loss of coherence and memory ordering.
-///
-/// It is recommended that a memory physical address passed to an SBI function
-/// should use at least two `usize` parameters to support platforms
-/// which have memory physical addresses wider than `XLEN` bits.
-#[derive(Clone, Copy)]
-pub struct Physical<P> {
-    num_bytes: usize,
-    phys_addr_lo: usize,
-    phys_addr_hi: usize,
-    _marker: PhantomData<P>,
-}
-
-impl<P> Physical<P> {
-    /// Create a physical memory range by length and physical address.
-    #[inline]
-    pub const fn new(num_bytes: usize, phys_addr_lo: usize, phys_addr_hi: usize) -> Self {
-        Self {
-            num_bytes,
-            phys_addr_lo,
-            phys_addr_hi,
-            _marker: core::marker::PhantomData,
-        }
-    }
-
-    /// Returns length of the physical address range.
-    #[inline]
-    pub const fn num_bytes(&self) -> usize {
-        self.num_bytes
-    }
-
-    /// Returns low part of physical address range.
-    #[inline]
-    pub const fn phys_addr_lo(&self) -> usize {
-        self.phys_addr_lo
-    }
-
-    /// Returns high part of physical address range.
-    #[inline]
-    pub const fn phys_addr_hi(&self) -> usize {
-        self.phys_addr_hi
-    }
-}