refactor(prototyper): move expected_trap to early_trap

Signed-off-by: Woshiluo Luo <woshiluo.luo@outlook.com>

prototyper/src/macros.rs

@@ -30,6 +30,7 @@ macro_rules! has_csr {
     ($($x: expr)*) => {{
             use core::arch::asm;
             use riscv::register::mtvec;
+            use crate::sbi::early_trap::expected_trap;
             let res: usize;
             unsafe {
                 // Backup old mtvec

prototyper/src/sbi/early_trap.rs

@@ -0,0 +1,20 @@
+use core::arch::asm;
+
+/// When you expected some insts will cause trap, use this.
+/// If trap happend, a0 will set to 1, otherwise will be 0.
+///
+/// This function will change a0 and a1 and will NOT change them back.
+#[naked]
+#[repr(align(16))]
+pub(crate) unsafe extern "C" fn expected_trap() {
+    asm!(
+        "add a0, zero, zero",
+        "add a1, zero, zero",
+        "csrr a1, mepc",
+        "addi a1, a1, 4",
+        "csrw mepc, a1",
+        "addi a0, zero, 1",
+        "mret",
+        options(noreturn)
+    )
+}

prototyper/src/sbi/extensions.rs

@@ -1,7 +1,6 @@
 use serde_device_tree::buildin::NodeSeq;
 
 use crate::riscv_spec::current_hartid;
-use crate::sbi::trap::expected_trap;
 use crate::sbi::trap_stack::ROOT_STACK;
 
 pub struct HartFeatures {

prototyper/src/sbi/mod.rs

@@ -6,6 +6,7 @@ pub mod ipi;
 pub mod reset;
 pub mod rfence;
 
+pub mod early_trap;
 pub mod extensions;
 pub mod fifo;
 pub mod hart_context;

prototyper/src/sbi/trap.rs

@@ -45,25 +45,6 @@ pub(crate) unsafe extern "C" fn trap_vec() {
     )
 }
 
-/// When you expected some insts will cause trap, use this.
-/// If trap happend, a0 will set to 1, otherwise will be 0.
-///
-/// This function will change a0 and a1 and will NOT change them back.
-#[naked]
-#[repr(align(16))]
-pub(crate) unsafe extern "C" fn expected_trap() {
-    asm!(
-        "add a0, zero, zero",
-        "add a1, zero, zero",
-        "csrr a1, mepc",
-        "addi a1, a1, 4",
-        "csrw mepc, a1",
-        "addi a0, zero, 1",
-        "mret",
-        options(noreturn)
-    )
-}
-
 /// Machine timer interrupt handler.
 /// Saves context, clears mtimecmp, sets STIP bit, and restores context.
 ///