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@@ -2,21 +2,11 @@
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//!
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//! # What is RISC-V SBI?
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//!
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-//! RISC-V SBI is short for RISC-V Supervisor Binary Interface. The SBI allows supervisor-mode (S-mode or VS-mode) software
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-//! to be portable across all RISC-V implementations by defining an abstraction for platform (or hypervisor) specific functionality.
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+//! RISC-V SBI is short for RISC-V Supervisor Binary Interface. SBI acts as a bootloader environment to your operating system kernel.
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+//! A SBI implementation will bootstrap your kernel, and provide an environment when your kernel is running.
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//!
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-//! Or in another word, SBI is a bootloader environment to your operating system kernel.
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-//! SBI implementation will bootstrap, and provide an environment to support your kernel.
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-//!
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-//! ## Why should there be SBI
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-//!
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-//! The design of the SBI follows the general RISC-V philosophy of having a small core along with a set of optional modular extensions.
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-//!
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-//! The higher privilege software providing SBI interface to the supervisor-mode software is referred to as a SBI implemenation
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-//! or Supervisor Execution Environment (SEE).
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-//!
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-//! A SBI implementation (or SEE) can be platform runtime firmware executing in machine-mode (M-mode),
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-//! or it can be some hypervisor executing in hypervisor-mode (HS-mode).
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+//! More generally, The SBI allows supervisor-mode (S-mode or VS-mode) software to be portable across
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+//! all RISC-V implementations by defining an abstraction for platform (or hypervisor) specific functionality.
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//!
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//! # How to use RustSBI in your supervisor software
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//!
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