doc: add periods and small document fixes

Signed-off-by: Zhouqi Jiang <[email protected]>

src/console.rs

@@ -1,6 +1,6 @@
 use spec::binary::{Physical, SbiRet};
 
-/// Debug Console Extension
+/// Debug Console extension.
 ///
 /// The debug console extension defines a generic mechanism for debugging
 /// and boot-time early prints from supervisor-mode software.

src/cppc.rs

@@ -1,6 +1,6 @@
 use sbi_spec::binary::SbiRet;
 
-/// CPPC Extension
+/// SBI CPPC support extension.
 ///
 /// ACPI defines the Collaborative Processor Performance Control (CPPC) mechanism,
 /// which is an abstract and flexible mechanism for the supervisor-mode
@@ -46,7 +46,7 @@ use sbi_spec::binary::SbiRet;
 /// | 0x80000000              | TransitionLatency                     | 32        | Read-only    | Provides the maximum (worst-case) performance state transition latency in nanoseconds.
 /// | 0x80000001 - 0xFFFFFFFF |                                       |           |              | Reserved for future use.   
 ///
-pub trait Cppc: Send + Sync {
+pub trait Cppc {
     /// Probe whether the CPPC register as specified by the `reg_id` parameter
     /// is implemented or not by the platform.
     ///

src/hart_mask.rs

@@ -1,4 +1,4 @@
-/// Hart mask structure reference
+/// Hart mask structure in SBI function calls.
 #[derive(Debug, Clone)]
 pub struct HartMask {
     inner: BitVector,

src/hsm.rs

@@ -1,6 +1,6 @@
 use sbi_spec::binary::SbiRet;
 
-/// Hart State Management Extension
+/// Hart State Management extension.
 ///
 /// The Hart State Management (HSM) Extension introduces a set hart states and a set of functions
 /// which allow the supervisor-mode software to request a hart state change.
@@ -42,7 +42,7 @@ use sbi_spec::binary::SbiRet;
 /// - Always prefer most recent suspend state requested for higher topology group
 ///
 /// Ref: [Section 8, RISC-V Supervisor Binary Interface Specification](https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc#8-hart-state-management-extension-eid-0x48534d-hsm)
-pub trait Hsm: Send + Sync {
+pub trait Hsm {
     /// Request the SBI implementation to start executing the given hart at specified address in supervisor-mode.
     ///
     /// This call is asynchronous - more specifically, the `hart_start()` may return before target hart

src/ipi.rs

@@ -1,8 +1,8 @@
 use crate::hart_mask::HartMask;
 use sbi_spec::binary::SbiRet;
 
-/// Inter-processor interrupt support
-pub trait Ipi: Send + Sync {
+/// Inter-processor interrupt support.
+pub trait Ipi {
     /// Send an inter-processor interrupt to all the harts defined in `hart_mask`.
     ///
     /// Inter-processor interrupts manifest at the receiving harts as the supervisor software interrupts.

src/lib.rs

@@ -519,7 +519,7 @@ mod susp;
 mod timer;
 mod traits;
 
-/// The RustSBI logo without blank lines on the beginning
+/// The RustSBI logo without blank lines on the beginning.
 pub const LOGO: &str = r".______       __    __      _______.___________.  _______..______   __
 |   _  \     |  |  |  |    /       |           | /       ||   _  \ |  |
 |  |_)  |    |  |  |  |   |   (----`---|  |----`|   (----`|  |_)  ||  |
@@ -542,7 +542,7 @@ const RUSTSBI_VERSION_PATCH: usize = (env!("CARGO_PKG_VERSION_PATCH").as_bytes()
 const RUSTSBI_VERSION: usize =
     (RUSTSBI_VERSION_MAJOR << 16) + (RUSTSBI_VERSION_MINOR << 8) + RUSTSBI_VERSION_PATCH;
 
-/// RustSBI version as a string
+/// RustSBI version as a string.
 pub const VERSION: &str = env!("CARGO_PKG_VERSION");
 
 pub extern crate sbi_spec as spec;

src/nacl.rs

@@ -3,7 +3,7 @@ use spec::{
     nacl::shmem_size::NATIVE,
 };
 
-/// Nested Acceleration Extension
+/// Nested Acceleration extension.
 ///
 /// Nested virtualization is the ability of a hypervisor to run another hypervisor
 /// as a guest. RISC-V nested virtualization requires an L0 hypervisor (running
@@ -23,7 +23,7 @@ use spec::{
 /// extension if the underlying platform has the RISC-V H-extension implemented
 /// in hardware.
 
-pub trait Nacl: Send + Sync {
+pub trait Nacl {
     /// Probe nested acceleration feature.
     ///
     /// Probe a nested acceleration feature. This is a mandatory function of the

src/pmu.rs

@@ -1,6 +1,6 @@
 use sbi_spec::binary::SbiRet;
 
-/// Performance Monitoring Unit Extension
+/// Performance Monitoring Unit extension.
 ///
 /// The RISC-V hardware performance counters such as `mcycle`, `minstret`, and `mhpmcounterX` CSRs
 /// are accessible as read-only from supervisor-mode using `cycle`, `instret`, and `hpmcounterX` CSRs.
@@ -35,7 +35,7 @@ use sbi_spec::binary::SbiRet;
 /// event_idx[19:16] = type;
 /// event_idx[15:0] = code;
 /// ```
-pub trait Pmu: Send + Sync {
+pub trait Pmu {
     /// Returns the number of counters (both hardware and firmware).
     ///
     /// The value is returned in `SbiRet.value`; this call always returns `SbiRet::success()`.

src/reset.rs

@@ -1,6 +1,6 @@
 use sbi_spec::binary::SbiRet;
 
-/// System Reset Extension
+/// System Reset extension.
 ///
 /// Provides a function that allow the supervisor software to request system-level reboot or shutdown.
 ///
@@ -8,7 +8,7 @@ use sbi_spec::binary::SbiRet;
 /// could be machine mode firmware or hypervisor.
 ///
 /// Ref: [Section 9, RISC-V Supervisor Binary Interface Specification](https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc#9-system-reset-extension-eid-0x53525354-srst)
-pub trait Reset: Send + Sync {
+pub trait Reset {
     /// Reset the system based on provided `reset_type` and `reset_reason`.
     ///
     /// This is a synchronous call and does not return if it succeeds.

src/rfence.rs

@@ -1,12 +1,12 @@
 use crate::hart_mask::HartMask;
 use sbi_spec::binary::SbiRet;
 
-/// Remote fence support
+/// Remote Fence support extension.
 ///
 /// The remote fence function acts as a full TLB flush if
 /// - `start_addr` and `size` are both 0, or
 /// - `size` is equal to `usize::MAX`.
-pub trait Rfence: Send + Sync {
+pub trait Rfence {
     /// Instructs remote harts to execute `FENCE.I` instruction.
     ///
     /// # Return value

src/sta.rs

@@ -1,6 +1,6 @@
 use sbi_spec::binary::{SbiRet, SharedPtr};
 
-/// Steal-time Accounting Extension
+/// Steal-time Accounting extension.
 ///
 /// SBI implementations may encounter situations where virtual harts are ready to
 /// run, but must be withheld from running. These situations may be, for example,
@@ -14,7 +14,7 @@ use sbi_spec::binary::{SbiRet, SharedPtr};
 /// mechanism in which an SBI implementation provides steal-time and preemption
 /// information, for each virtual hart, to supervisor-mode software.
 
-pub trait Sta: Send + Sync {
+pub trait Sta {
     /// Set Steal-time Shared Memory Address.
     ///
     /// Set the shared memory physical base address for steal-time accounting of the

src/susp.rs

@@ -1,6 +1,6 @@
 use sbi_spec::binary::SbiRet;
 
-/// System Suspend Extension
+/// System Suspend extension.
 ///
 /// The system suspend extension defines a set of system-level sleep states and a
 /// function which allows the supervisor-mode software to request that the system
@@ -24,7 +24,7 @@ use sbi_spec::binary::SbiRet;
 /// types and per-type wake up devices in their hardware descriptions. The
 /// `SUSPEND_TO_RAM` sleep type is the one exception, and its presence is implied
 /// by that of the extension.
-pub trait Susp: Send + Sync {
+pub trait Susp {
     /// Request the SBI implementation to put the system transitions to a sleep state.
     ///
     /// A return from a `system_suspend()` call implies an error and an error code

src/timer.rs

@@ -1,5 +1,5 @@
-/// Timer programmer support
-pub trait Timer: Send + Sync {
+/// Timer programmer support extension.
+pub trait Timer {
     /// Programs the clock for next event after `stime_value` time.
     ///
     /// `stime_value` is in absolute time. This function must clear the pending timer interrupt bit as well.

src/traits.rs

@@ -3,13 +3,13 @@ use crate::HartMask;
 use riscv::register::{marchid, mimpid, mvendorid};
 use spec::binary::{Physical, SbiRet, SharedPtr};
 
-/// RustSBI trait including standard extensions.
+/// RustSBI environment call handler.
 pub trait RustSBI {
     /// Handle supervisor environment call with given parameters and return the `SbiRet` result.
     fn handle_ecall(&self, extension: usize, function: usize, param: [usize; 6]) -> SbiRet;
 }
 
-/// Machine environment information for an SBI environment.
+/// Machine environment information.
 ///
 /// This trait is useful to build an SBI environment when RustSBI is not run directly on RISC-V machine mode.
 pub trait EnvInfo {