lib.rs 12 KB

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  1. //! RISC-V SBI Specification structure and constant definitions.
  2. //!
  3. //! This crate adapts to RISC-V SBI Specification verion 2.0-rc7.
  4. //! It provides structures in Rust semantics and best practices to simplify
  5. //! designs of RISC-V SBI ecosystem, both implementation and applications.
  6. //!
  7. //! You may find it convenient to use this library in a vast range of packages,
  8. //! from operating system kernels, hypervisors, to SBI bare metal implementations.
  9. //! This crate is `no_std` compatible and does not need dymanic memory allocation,
  10. //! which make it suitable for embedded development.
  11. //!
  12. //! Although this library is dedicated to RISC-V architecture, it does not limit
  13. //! which build target the dependents should compile into. For example, you are
  14. //! developing a RISC-V emulator on platforms other than RISC-V, the emulator
  15. //! designed on other platforms can still make use of `sbi-spec` structures to
  16. //! provide necessary features the emulated RISC-V environment would make use of.
  17. #![no_std]
  18. #![deny(missing_docs, unsafe_code, unstable_features)]
  19. // §3
  20. pub mod binary;
  21. // §4
  22. pub mod base;
  23. // §5
  24. #[cfg(feature = "legacy")]
  25. pub mod legacy;
  26. // §6
  27. pub mod time;
  28. // §7
  29. pub mod spi;
  30. // §8
  31. pub mod rfnc;
  32. // §9
  33. pub mod hsm;
  34. // §10
  35. pub mod srst;
  36. // §11
  37. pub mod pmu;
  38. // §12
  39. pub mod dbcn;
  40. // §13
  41. pub mod susp;
  42. // §14
  43. pub mod cppc;
  44. // §15
  45. pub mod nacl;
  46. // §16
  47. pub mod sta;
  48. /// Converts SBI EID from str.
  49. const fn eid_from_str(name: &str) -> i32 {
  50. match *name.as_bytes() {
  51. [a] => i32::from_be_bytes([0, 0, 0, a]),
  52. [a, b] => i32::from_be_bytes([0, 0, a, b]),
  53. [a, b, c] => i32::from_be_bytes([0, a, b, c]),
  54. [a, b, c, d] => i32::from_be_bytes([a, b, c, d]),
  55. _ => unreachable!(),
  56. }
  57. }
  58. /// Checks during compilation, and provides an item list for developers.
  59. #[cfg(test)]
  60. mod tests {
  61. use static_assertions::{
  62. assert_eq_align, assert_eq_size, assert_fields, assert_impl_all, const_assert_eq,
  63. };
  64. // §3
  65. #[test]
  66. fn test_binary() {
  67. use crate::binary::*;
  68. assert_eq_align!(SbiRet, usize);
  69. assert_eq_size!(SbiRet, [usize; 2]);
  70. assert_fields!(SbiRet: error);
  71. assert_fields!(SbiRet: value);
  72. assert_impl_all!(SbiRet: Copy, Clone, PartialEq, Eq, core::fmt::Debug);
  73. const_assert_eq!(0, RET_SUCCESS as isize);
  74. const_assert_eq!(-1, RET_ERR_FAILED as isize);
  75. const_assert_eq!(-2, RET_ERR_NOT_SUPPORTED as isize);
  76. const_assert_eq!(-3, RET_ERR_INVALID_PARAM as isize);
  77. const_assert_eq!(-4, RET_ERR_DENIED as isize);
  78. const_assert_eq!(-5, RET_ERR_INVALID_ADDRESS as isize);
  79. const_assert_eq!(-6, RET_ERR_ALREADY_AVAILABLE as isize);
  80. const_assert_eq!(-7, RET_ERR_ALREADY_STARTED as isize);
  81. const_assert_eq!(-8, RET_ERR_ALREADY_STOPPED as isize);
  82. const_assert_eq!(-9, RET_ERR_NO_SHMEM as isize);
  83. }
  84. // §4
  85. #[test]
  86. fn test_base() {
  87. use crate::base::*;
  88. const_assert_eq!(0x10, EID_BASE);
  89. const_assert_eq!(0, GET_SBI_SPEC_VERSION);
  90. const_assert_eq!(1, GET_SBI_IMPL_ID);
  91. const_assert_eq!(2, GET_SBI_IMPL_VERSION);
  92. const_assert_eq!(3, PROBE_EXTENSION);
  93. const_assert_eq!(4, GET_MVENDORID);
  94. const_assert_eq!(5, GET_MARCHID);
  95. const_assert_eq!(6, GET_MIMPID);
  96. const_assert_eq!(0, impl_id::BBL);
  97. const_assert_eq!(1, impl_id::OPEN_SBI);
  98. const_assert_eq!(2, impl_id::XVISOR);
  99. const_assert_eq!(3, impl_id::KVM);
  100. const_assert_eq!(4, impl_id::RUST_SBI);
  101. const_assert_eq!(5, impl_id::DIOSIX);
  102. const_assert_eq!(6, impl_id::COFFER);
  103. }
  104. // §5
  105. #[cfg(feature = "legacy")]
  106. #[test]
  107. fn test_legacy() {
  108. use crate::legacy::*;
  109. const_assert_eq!(0, LEGACY_SET_TIMER);
  110. const_assert_eq!(1, LEGACY_CONSOLE_PUTCHAR);
  111. const_assert_eq!(2, LEGACY_CONSOLE_GETCHAR);
  112. const_assert_eq!(3, LEGACY_CLEAR_IPI);
  113. const_assert_eq!(4, LEGACY_SEND_IPI);
  114. const_assert_eq!(5, LEGACY_REMOTE_FENCE_I);
  115. const_assert_eq!(6, LEGACY_REMOTE_SFENCE_VMA);
  116. const_assert_eq!(7, LEGACY_REMOTE_SFENCE_VMA_ASID);
  117. const_assert_eq!(8, LEGACY_SHUTDOWN);
  118. }
  119. // §6
  120. #[test]
  121. fn test_time() {
  122. use crate::time::*;
  123. const_assert_eq!(0x54494D45, EID_TIME);
  124. const_assert_eq!(0, SET_TIMER);
  125. }
  126. // §7
  127. #[test]
  128. fn test_spi() {
  129. use crate::spi::*;
  130. const_assert_eq!(0x735049, EID_SPI);
  131. const_assert_eq!(0, SEND_IPI);
  132. }
  133. // §8
  134. #[test]
  135. fn test_rfnc() {
  136. use crate::rfnc::*;
  137. const_assert_eq!(0x52464E43, EID_RFNC);
  138. const_assert_eq!(0, REMOTE_FENCE_I);
  139. const_assert_eq!(1, REMOTE_SFENCE_VMA);
  140. const_assert_eq!(2, REMOTE_SFENCE_VMA_ASID);
  141. const_assert_eq!(3, REMOTE_HFENCE_GVMA_VMID);
  142. const_assert_eq!(4, REMOTE_HFENCE_GVMA);
  143. const_assert_eq!(5, REMOTE_HFENCE_VVMA_ASID);
  144. const_assert_eq!(6, REMOTE_HFENCE_VVMA);
  145. }
  146. // §9
  147. #[test]
  148. fn test_hsm() {
  149. use crate::hsm::*;
  150. const_assert_eq!(0x48534D, EID_HSM);
  151. const_assert_eq!(0, hart_state::STARTED);
  152. const_assert_eq!(1, hart_state::STOPPED);
  153. const_assert_eq!(2, hart_state::START_PENDING);
  154. const_assert_eq!(3, hart_state::STOP_PENDING);
  155. const_assert_eq!(4, hart_state::SUSPENDED);
  156. const_assert_eq!(5, hart_state::SUSPEND_PENDING);
  157. const_assert_eq!(6, hart_state::RESUME_PENDING);
  158. const_assert_eq!(0x0000_0000, suspend_type::RETENTIVE);
  159. const_assert_eq!(0x8000_0000, suspend_type::NON_RETENTIVE);
  160. const_assert_eq!(0, HART_START);
  161. const_assert_eq!(1, HART_STOP);
  162. const_assert_eq!(2, HART_GET_STATUS);
  163. const_assert_eq!(3, HART_SUSPEND);
  164. }
  165. // §10
  166. #[test]
  167. fn test_srst() {
  168. use crate::srst::*;
  169. const_assert_eq!(0x53525354, EID_SRST);
  170. const_assert_eq!(0, RESET_TYPE_SHUTDOWN);
  171. const_assert_eq!(1, RESET_TYPE_COLD_REBOOT);
  172. const_assert_eq!(2, RESET_TYPE_WARM_REBOOT);
  173. const_assert_eq!(0, RESET_REASON_NO_REASON);
  174. const_assert_eq!(1, RESET_REASON_SYSTEM_FAILURE);
  175. const_assert_eq!(0, SYSTEM_RESET);
  176. }
  177. // §11
  178. #[test]
  179. fn test_pmu() {
  180. use crate::pmu::*;
  181. const_assert_eq!(0x504D55, EID_PMU);
  182. const_assert_eq!(0, NUM_COUNTERS);
  183. const_assert_eq!(1, COUNTER_GET_INFO);
  184. const_assert_eq!(2, COUNTER_CONFIG_MATCHING);
  185. const_assert_eq!(3, COUNTER_START);
  186. const_assert_eq!(4, COUNTER_STOP);
  187. const_assert_eq!(5, COUNTER_FW_READ);
  188. const_assert_eq!(6, COUNTER_FW_READ_HI);
  189. const_assert_eq!(7, SNAPSHOT_SET_SHMEM);
  190. const_assert_eq!(0, event_type::HARDWARE_GENERAL);
  191. const_assert_eq!(1, event_type::HARDWARE_CACHE);
  192. const_assert_eq!(2, event_type::HARDWARE_RAW);
  193. const_assert_eq!(15, event_type::FIRMWARE);
  194. const_assert_eq!(0, hardware_event::NO_EVENT);
  195. const_assert_eq!(1, hardware_event::CPU_CYCLES);
  196. const_assert_eq!(2, hardware_event::INSTRUCTIONS);
  197. const_assert_eq!(3, hardware_event::CACHE_REFERENCES);
  198. const_assert_eq!(4, hardware_event::CACHE_MISSES);
  199. const_assert_eq!(5, hardware_event::BRANCH_INSTRUCTIONS);
  200. const_assert_eq!(6, hardware_event::BRANCH_MISSES);
  201. const_assert_eq!(7, hardware_event::BUS_CYCLES);
  202. const_assert_eq!(8, hardware_event::STALLED_CYCLES_FRONTEND);
  203. const_assert_eq!(9, hardware_event::STALLED_CYCLES_BACKEND);
  204. const_assert_eq!(10, hardware_event::REF_CPU_CYCLES);
  205. const_assert_eq!(0, cache_event::L1D);
  206. const_assert_eq!(1, cache_event::L1I);
  207. const_assert_eq!(2, cache_event::LL);
  208. const_assert_eq!(3, cache_event::DTLB);
  209. const_assert_eq!(4, cache_event::ITLB);
  210. const_assert_eq!(5, cache_event::BPU);
  211. const_assert_eq!(6, cache_event::NODE);
  212. const_assert_eq!(0, cache_operation::READ);
  213. const_assert_eq!(1, cache_operation::WRITE);
  214. const_assert_eq!(2, cache_operation::PREFETCH);
  215. const_assert_eq!(0, cache_result::ACCESS);
  216. const_assert_eq!(1, cache_result::MISS);
  217. const_assert_eq!(0, firmware_event::MISALIGNED_LOAD);
  218. const_assert_eq!(1, firmware_event::MISALIGNED_STORE);
  219. const_assert_eq!(2, firmware_event::ACCESS_LOAD);
  220. const_assert_eq!(3, firmware_event::ACCESS_STORE);
  221. const_assert_eq!(4, firmware_event::ILLEGAL_INSN);
  222. const_assert_eq!(5, firmware_event::SET_TIMER);
  223. const_assert_eq!(6, firmware_event::IPI_SENT);
  224. const_assert_eq!(7, firmware_event::IPI_RECEIVED);
  225. const_assert_eq!(8, firmware_event::FENCE_I_SENT);
  226. const_assert_eq!(9, firmware_event::FENCE_I_RECEIVED);
  227. const_assert_eq!(10, firmware_event::SFENCE_VMA_SENT);
  228. const_assert_eq!(11, firmware_event::SFENCE_VMA_RECEIVED);
  229. const_assert_eq!(12, firmware_event::SFENCE_VMA_ASID_SENT);
  230. const_assert_eq!(13, firmware_event::SFENCE_VMA_ASID_RECEIVED);
  231. const_assert_eq!(14, firmware_event::HFENCE_GVMA_SENT);
  232. const_assert_eq!(15, firmware_event::HFENCE_GVMA_RECEIVED);
  233. const_assert_eq!(16, firmware_event::HFENCE_GVMA_VMID_SENT);
  234. const_assert_eq!(17, firmware_event::HFENCE_GVMA_VMID_RECEIVED);
  235. const_assert_eq!(18, firmware_event::HFENCE_VVMA_SENT);
  236. const_assert_eq!(19, firmware_event::HFENCE_VVMA_RECEIVED);
  237. const_assert_eq!(20, firmware_event::HFENCE_VVMA_ASID_SENT);
  238. const_assert_eq!(21, firmware_event::HFENCE_VVMA_ASID_RECEIVED);
  239. const_assert_eq!(65535, firmware_event::PLATFORM);
  240. }
  241. // §12
  242. #[test]
  243. fn test_dbcn() {
  244. use crate::dbcn::*;
  245. const_assert_eq!(0x4442434E, EID_DBCN);
  246. const_assert_eq!(0, CONSOLE_WRITE);
  247. const_assert_eq!(1, CONSOLE_READ);
  248. const_assert_eq!(2, CONSOLE_WRITE_BYTE);
  249. }
  250. // §13
  251. #[test]
  252. fn test_susp() {
  253. use crate::susp::*;
  254. const_assert_eq!(0x53555350, EID_SUSP);
  255. const_assert_eq!(0, SUSPEND);
  256. }
  257. // §14
  258. #[test]
  259. fn test_cppc() {
  260. use crate::cppc::*;
  261. const_assert_eq!(0x43505043, EID_CPPC);
  262. const_assert_eq!(0, PROBE);
  263. const_assert_eq!(1, READ);
  264. const_assert_eq!(2, READ_HI);
  265. const_assert_eq!(3, WRITE);
  266. }
  267. // §15
  268. #[test]
  269. fn test_nacl() {
  270. use crate::nacl::*;
  271. const_assert_eq!(0x4E41434C, EID_NACL);
  272. const_assert_eq!(0, PROBE_FEATURE);
  273. const_assert_eq!(1, SET_SHMEM);
  274. const_assert_eq!(2, SYNC_CSR);
  275. const_assert_eq!(3, SYNC_HFENCE);
  276. const_assert_eq!(4, SYNC_SRET);
  277. const_assert_eq!(0, feature_id::SYNC_CSR);
  278. const_assert_eq!(1, feature_id::SYNC_HFENCE);
  279. const_assert_eq!(2, feature_id::SYNC_SRET);
  280. const_assert_eq!(3, feature_id::AUTOSWAP_CSR);
  281. const_assert_eq!(8192, shmem_size::RV32);
  282. const_assert_eq!(12288, shmem_size::RV64);
  283. const_assert_eq!(20480, shmem_size::RV128);
  284. match () {
  285. #[cfg(target_pointer_width = "32")]
  286. () => {
  287. const_assert_eq!(shmem_size::NATIVE, shmem_size::RV32);
  288. }
  289. #[cfg(target_pointer_width = "64")]
  290. () => {
  291. const_assert_eq!(shmem_size::NATIVE, shmem_size::RV64);
  292. }
  293. #[cfg(target_pointer_width = "128")]
  294. () => {
  295. const_assert_eq!(shmem_size::NATIVE, shmem_size::RV128);
  296. }
  297. }
  298. }
  299. // §16
  300. #[test]
  301. fn test_sta() {
  302. use crate::sta::*;
  303. const_assert_eq!(0x535441, EID_STA);
  304. const_assert_eq!(0, SET_SHMEM);
  305. }
  306. }