spi.rs 1.2 KB

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  1. //! Chapter 7. IPI Extension (EID #0x735049 "sPI: s-mode IPI")
  2. use crate::binary::sbi_call_2;
  3. use sbi_spec::{
  4. binary::{HartMask, SbiRet},
  5. spi::{EID_SPI, SEND_IPI},
  6. };
  7. /// Send an inter-processor interrupt to all harts defined in hart mask.
  8. ///
  9. /// Inter-processor interrupts manifest at the receiving harts as the supervisor software interrupts.
  10. ///
  11. /// # Return value
  12. ///
  13. /// The possible return error codes returned in `SbiRet.error` are shown in the table below:
  14. ///
  15. /// | Return code | Description
  16. /// |:--------------------------|:----------------------------------------------
  17. /// | `SbiRet::success()` | IPI was sent to all the targeted harts successfully.
  18. /// | `SbiRet::invalid_param()` | At least one hartid constructed from `hart_mask`, is not valid, i.e. either the hartid is not enabled by the platform or is not available to the supervisor.
  19. /// | `SbiRet::failed()` | The request failed for unspecified or unknown other reasons.
  20. ///
  21. /// This function is defined in RISC-V SBI Specification chapter 7.1.
  22. #[inline]
  23. #[doc(alias = "sbi_send_ipi")]
  24. pub fn send_ipi(hart_mask: HartMask) -> SbiRet {
  25. let (hart_mask, hart_mask_base) = hart_mask.into_inner();
  26. sbi_call_2(EID_SPI, SEND_IPI, hart_mask, hart_mask_base)
  27. }