lib.rs 15 KB

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  1. //! RISC-V SBI Specification structure and constant definitions.
  2. //!
  3. //! This crate adapts to RISC-V SBI Specification version 2.0 ratified.
  4. //! It provides structures in Rust semantics and best practices to simplify
  5. //! designs of RISC-V SBI ecosystem, both implementation and applications.
  6. //!
  7. //! You may find it convenient to use this library in a vast range of packages,
  8. //! from operating system kernels, hypervisors, to SBI bare metal implementations.
  9. //! This crate is `no_std` compatible and does not need dynamic memory allocation,
  10. //! which makes it suitable for embedded development.
  11. //!
  12. //! Although this library is dedicated to RISC-V architecture, it does not limit
  13. //! which build target the dependents should compile into.
  14. //! For example, when developing a RISC-V emulator on platforms other than RISC-V,
  15. //! the emulator designed on other platforms can still make use of `sbi-spec` structures,
  16. //! to provide the necessary features where the emulated RISC-V environment would make use of.
  17. #![no_std]
  18. #![deny(missing_docs, unstable_features)]
  19. // §3
  20. pub mod binary;
  21. // §4
  22. pub mod base;
  23. // §5
  24. #[cfg(feature = "legacy")]
  25. pub mod legacy;
  26. // §6
  27. pub mod time;
  28. // §7
  29. pub mod spi;
  30. // §8
  31. pub mod rfnc;
  32. // §9
  33. pub mod hsm;
  34. // §10
  35. pub mod srst;
  36. // §11
  37. pub mod pmu;
  38. // §12
  39. pub mod dbcn;
  40. // §13
  41. pub mod susp;
  42. // §14
  43. pub mod cppc;
  44. // §15
  45. pub mod nacl;
  46. // §16
  47. pub mod sta;
  48. // §17
  49. pub mod sse;
  50. // §18
  51. pub mod fwft;
  52. // §19
  53. pub mod dbtr;
  54. // §20
  55. pub mod mpxy;
  56. /// Converts SBI EID from str.
  57. const fn eid_from_str(name: &str) -> i32 {
  58. match *name.as_bytes() {
  59. [a] => i32::from_be_bytes([0, 0, 0, a]),
  60. [a, b] => i32::from_be_bytes([0, 0, a, b]),
  61. [a, b, c] => i32::from_be_bytes([0, a, b, c]),
  62. [a, b, c, d] => i32::from_be_bytes([a, b, c, d]),
  63. _ => unreachable!(),
  64. }
  65. }
  66. /// Checks during compilation, and provides an item list for developers.
  67. #[cfg(test)]
  68. mod tests {
  69. use static_assertions::{
  70. assert_eq_align, assert_eq_size, assert_fields, assert_impl_all, const_assert_eq,
  71. };
  72. // §3
  73. #[test]
  74. fn test_binary() {
  75. use crate::binary::*;
  76. assert_eq_align!(SbiRet, usize);
  77. assert_eq_size!(SbiRet, [usize; 2]);
  78. assert_fields!(SbiRet<usize>: error);
  79. assert_fields!(SbiRet<usize>: value);
  80. assert_impl_all!(SbiRet: Copy, Clone, PartialEq, Eq, core::fmt::Debug);
  81. const_assert_eq!(0, RET_SUCCESS as isize);
  82. const_assert_eq!(-1, RET_ERR_FAILED as isize);
  83. const_assert_eq!(-2, RET_ERR_NOT_SUPPORTED as isize);
  84. const_assert_eq!(-3, RET_ERR_INVALID_PARAM as isize);
  85. const_assert_eq!(-4, RET_ERR_DENIED as isize);
  86. const_assert_eq!(-5, RET_ERR_INVALID_ADDRESS as isize);
  87. const_assert_eq!(-6, RET_ERR_ALREADY_AVAILABLE as isize);
  88. const_assert_eq!(-7, RET_ERR_ALREADY_STARTED as isize);
  89. const_assert_eq!(-8, RET_ERR_ALREADY_STOPPED as isize);
  90. const_assert_eq!(-9, RET_ERR_NO_SHMEM as isize);
  91. const_assert_eq!(-10, RET_ERR_INVALID_STATE as isize);
  92. const_assert_eq!(-11, RET_ERR_BAD_RANGE as isize);
  93. const_assert_eq!(-12, RET_ERR_TIMEOUT as isize);
  94. const_assert_eq!(-13, RET_ERR_IO as isize);
  95. const_assert_eq!(-14, RET_ERR_DENIED_LOCKED as isize);
  96. }
  97. // §4
  98. #[test]
  99. fn test_base() {
  100. use crate::base::*;
  101. const_assert_eq!(0x10, EID_BASE);
  102. const_assert_eq!(0, GET_SBI_SPEC_VERSION);
  103. const_assert_eq!(1, GET_SBI_IMPL_ID);
  104. const_assert_eq!(2, GET_SBI_IMPL_VERSION);
  105. const_assert_eq!(3, PROBE_EXTENSION);
  106. const_assert_eq!(4, GET_MVENDORID);
  107. const_assert_eq!(5, GET_MARCHID);
  108. const_assert_eq!(6, GET_MIMPID);
  109. const_assert_eq!(0, impl_id::BBL);
  110. const_assert_eq!(1, impl_id::OPEN_SBI);
  111. const_assert_eq!(2, impl_id::XVISOR);
  112. const_assert_eq!(3, impl_id::KVM);
  113. const_assert_eq!(4, impl_id::RUST_SBI);
  114. const_assert_eq!(5, impl_id::DIOSIX);
  115. const_assert_eq!(6, impl_id::COFFER);
  116. const_assert_eq!(7, impl_id::XEN);
  117. const_assert_eq!(8, impl_id::POLARFIRE_HSS);
  118. const_assert_eq!(9, impl_id::COREBOOT);
  119. const_assert_eq!(10, impl_id::OREBOOT);
  120. }
  121. // §5
  122. #[cfg(feature = "legacy")]
  123. #[test]
  124. fn test_legacy() {
  125. use crate::legacy::*;
  126. const_assert_eq!(0, LEGACY_SET_TIMER);
  127. const_assert_eq!(1, LEGACY_CONSOLE_PUTCHAR);
  128. const_assert_eq!(2, LEGACY_CONSOLE_GETCHAR);
  129. const_assert_eq!(3, LEGACY_CLEAR_IPI);
  130. const_assert_eq!(4, LEGACY_SEND_IPI);
  131. const_assert_eq!(5, LEGACY_REMOTE_FENCE_I);
  132. const_assert_eq!(6, LEGACY_REMOTE_SFENCE_VMA);
  133. const_assert_eq!(7, LEGACY_REMOTE_SFENCE_VMA_ASID);
  134. const_assert_eq!(8, LEGACY_SHUTDOWN);
  135. }
  136. // §6
  137. #[test]
  138. fn test_time() {
  139. use crate::time::*;
  140. const_assert_eq!(0x54494D45, EID_TIME);
  141. const_assert_eq!(0, SET_TIMER);
  142. }
  143. // §7
  144. #[test]
  145. fn test_spi() {
  146. use crate::spi::*;
  147. const_assert_eq!(0x735049, EID_SPI);
  148. const_assert_eq!(0, SEND_IPI);
  149. }
  150. // §8
  151. #[test]
  152. fn test_rfnc() {
  153. use crate::rfnc::*;
  154. const_assert_eq!(0x52464E43, EID_RFNC);
  155. const_assert_eq!(0, REMOTE_FENCE_I);
  156. const_assert_eq!(1, REMOTE_SFENCE_VMA);
  157. const_assert_eq!(2, REMOTE_SFENCE_VMA_ASID);
  158. const_assert_eq!(3, REMOTE_HFENCE_GVMA_VMID);
  159. const_assert_eq!(4, REMOTE_HFENCE_GVMA);
  160. const_assert_eq!(5, REMOTE_HFENCE_VVMA_ASID);
  161. const_assert_eq!(6, REMOTE_HFENCE_VVMA);
  162. }
  163. // §9
  164. #[test]
  165. fn test_hsm() {
  166. use crate::hsm::*;
  167. const_assert_eq!(0x48534D, EID_HSM);
  168. const_assert_eq!(0, hart_state::STARTED);
  169. const_assert_eq!(1, hart_state::STOPPED);
  170. const_assert_eq!(2, hart_state::START_PENDING);
  171. const_assert_eq!(3, hart_state::STOP_PENDING);
  172. const_assert_eq!(4, hart_state::SUSPENDED);
  173. const_assert_eq!(5, hart_state::SUSPEND_PENDING);
  174. const_assert_eq!(6, hart_state::RESUME_PENDING);
  175. const_assert_eq!(0x0000_0000, suspend_type::RETENTIVE);
  176. const_assert_eq!(0x8000_0000, suspend_type::NON_RETENTIVE);
  177. const_assert_eq!(0, HART_START);
  178. const_assert_eq!(1, HART_STOP);
  179. const_assert_eq!(2, HART_GET_STATUS);
  180. const_assert_eq!(3, HART_SUSPEND);
  181. }
  182. // §10
  183. #[test]
  184. fn test_srst() {
  185. use crate::srst::*;
  186. const_assert_eq!(0x53525354, EID_SRST);
  187. const_assert_eq!(0, RESET_TYPE_SHUTDOWN);
  188. const_assert_eq!(1, RESET_TYPE_COLD_REBOOT);
  189. const_assert_eq!(2, RESET_TYPE_WARM_REBOOT);
  190. const_assert_eq!(0, RESET_REASON_NO_REASON);
  191. const_assert_eq!(1, RESET_REASON_SYSTEM_FAILURE);
  192. const_assert_eq!(0, SYSTEM_RESET);
  193. }
  194. // §11
  195. #[test]
  196. fn test_pmu() {
  197. use crate::pmu::*;
  198. const_assert_eq!(0x504D55, EID_PMU);
  199. const_assert_eq!(0, NUM_COUNTERS);
  200. const_assert_eq!(1, COUNTER_GET_INFO);
  201. const_assert_eq!(2, COUNTER_CONFIG_MATCHING);
  202. const_assert_eq!(3, COUNTER_START);
  203. const_assert_eq!(4, COUNTER_STOP);
  204. const_assert_eq!(5, COUNTER_FW_READ);
  205. const_assert_eq!(6, COUNTER_FW_READ_HI);
  206. const_assert_eq!(7, SNAPSHOT_SET_SHMEM);
  207. const_assert_eq!(0, event_type::HARDWARE_GENERAL);
  208. const_assert_eq!(1, event_type::HARDWARE_CACHE);
  209. const_assert_eq!(2, event_type::HARDWARE_RAW);
  210. const_assert_eq!(15, event_type::FIRMWARE);
  211. const_assert_eq!(0, hardware_event::NO_EVENT);
  212. const_assert_eq!(1, hardware_event::CPU_CYCLES);
  213. const_assert_eq!(2, hardware_event::INSTRUCTIONS);
  214. const_assert_eq!(3, hardware_event::CACHE_REFERENCES);
  215. const_assert_eq!(4, hardware_event::CACHE_MISSES);
  216. const_assert_eq!(5, hardware_event::BRANCH_INSTRUCTIONS);
  217. const_assert_eq!(6, hardware_event::BRANCH_MISSES);
  218. const_assert_eq!(7, hardware_event::BUS_CYCLES);
  219. const_assert_eq!(8, hardware_event::STALLED_CYCLES_FRONTEND);
  220. const_assert_eq!(9, hardware_event::STALLED_CYCLES_BACKEND);
  221. const_assert_eq!(10, hardware_event::REF_CPU_CYCLES);
  222. const_assert_eq!(0, cache_event::L1D);
  223. const_assert_eq!(1, cache_event::L1I);
  224. const_assert_eq!(2, cache_event::LL);
  225. const_assert_eq!(3, cache_event::DTLB);
  226. const_assert_eq!(4, cache_event::ITLB);
  227. const_assert_eq!(5, cache_event::BPU);
  228. const_assert_eq!(6, cache_event::NODE);
  229. const_assert_eq!(0, cache_operation::READ);
  230. const_assert_eq!(1, cache_operation::WRITE);
  231. const_assert_eq!(2, cache_operation::PREFETCH);
  232. const_assert_eq!(0, cache_result::ACCESS);
  233. const_assert_eq!(1, cache_result::MISS);
  234. const_assert_eq!(0, firmware_event::MISALIGNED_LOAD);
  235. const_assert_eq!(1, firmware_event::MISALIGNED_STORE);
  236. const_assert_eq!(2, firmware_event::ACCESS_LOAD);
  237. const_assert_eq!(3, firmware_event::ACCESS_STORE);
  238. const_assert_eq!(4, firmware_event::ILLEGAL_INSN);
  239. const_assert_eq!(5, firmware_event::SET_TIMER);
  240. const_assert_eq!(6, firmware_event::IPI_SENT);
  241. const_assert_eq!(7, firmware_event::IPI_RECEIVED);
  242. const_assert_eq!(8, firmware_event::FENCE_I_SENT);
  243. const_assert_eq!(9, firmware_event::FENCE_I_RECEIVED);
  244. const_assert_eq!(10, firmware_event::SFENCE_VMA_SENT);
  245. const_assert_eq!(11, firmware_event::SFENCE_VMA_RECEIVED);
  246. const_assert_eq!(12, firmware_event::SFENCE_VMA_ASID_SENT);
  247. const_assert_eq!(13, firmware_event::SFENCE_VMA_ASID_RECEIVED);
  248. const_assert_eq!(14, firmware_event::HFENCE_GVMA_SENT);
  249. const_assert_eq!(15, firmware_event::HFENCE_GVMA_RECEIVED);
  250. const_assert_eq!(16, firmware_event::HFENCE_GVMA_VMID_SENT);
  251. const_assert_eq!(17, firmware_event::HFENCE_GVMA_VMID_RECEIVED);
  252. const_assert_eq!(18, firmware_event::HFENCE_VVMA_SENT);
  253. const_assert_eq!(19, firmware_event::HFENCE_VVMA_RECEIVED);
  254. const_assert_eq!(20, firmware_event::HFENCE_VVMA_ASID_SENT);
  255. const_assert_eq!(21, firmware_event::HFENCE_VVMA_ASID_RECEIVED);
  256. const_assert_eq!(65535, firmware_event::PLATFORM);
  257. const_assert_eq!(4096, shmem_size::SIZE);
  258. const_assert_eq!(1, flags::CounterCfgFlags::SKIP_MATCH.bits());
  259. const_assert_eq!(2, flags::CounterCfgFlags::CLEAR_VALUE.bits());
  260. const_assert_eq!(4, flags::CounterCfgFlags::AUTO_START.bits());
  261. const_assert_eq!(8, flags::CounterCfgFlags::SET_VUINH.bits());
  262. const_assert_eq!(16, flags::CounterCfgFlags::SET_VSINH.bits());
  263. const_assert_eq!(32, flags::CounterCfgFlags::SET_UINH.bits());
  264. const_assert_eq!(64, flags::CounterCfgFlags::SET_SINH.bits());
  265. const_assert_eq!(128, flags::CounterCfgFlags::SET_MINH.bits());
  266. const_assert_eq!(1, flags::CounterStartFlags::INIT_VALUE.bits());
  267. const_assert_eq!(2, flags::CounterStartFlags::INIT_SNAPSHOT.bits());
  268. const_assert_eq!(1, flags::CounterStopFlags::RESET.bits());
  269. const_assert_eq!(2, flags::CounterStopFlags::TAKE_SNAPSHOT.bits());
  270. }
  271. // §12
  272. #[test]
  273. fn test_dbcn() {
  274. use crate::dbcn::*;
  275. const_assert_eq!(0x4442434E, EID_DBCN);
  276. const_assert_eq!(0, CONSOLE_WRITE);
  277. const_assert_eq!(1, CONSOLE_READ);
  278. const_assert_eq!(2, CONSOLE_WRITE_BYTE);
  279. }
  280. // §13
  281. #[test]
  282. fn test_susp() {
  283. use crate::susp::*;
  284. const_assert_eq!(0x53555350, EID_SUSP);
  285. const_assert_eq!(0, SUSPEND);
  286. }
  287. // §14
  288. #[test]
  289. fn test_cppc() {
  290. use crate::cppc::*;
  291. const_assert_eq!(0x43505043, EID_CPPC);
  292. const_assert_eq!(0, PROBE);
  293. const_assert_eq!(1, READ);
  294. const_assert_eq!(2, READ_HI);
  295. const_assert_eq!(3, WRITE);
  296. }
  297. // §15
  298. #[test]
  299. fn test_nacl() {
  300. use crate::nacl::*;
  301. const_assert_eq!(0x4E41434C, EID_NACL);
  302. const_assert_eq!(0, PROBE_FEATURE);
  303. const_assert_eq!(1, SET_SHMEM);
  304. const_assert_eq!(2, SYNC_CSR);
  305. const_assert_eq!(3, SYNC_HFENCE);
  306. const_assert_eq!(4, SYNC_SRET);
  307. const_assert_eq!(0, feature_id::SYNC_CSR);
  308. const_assert_eq!(1, feature_id::SYNC_HFENCE);
  309. const_assert_eq!(2, feature_id::SYNC_SRET);
  310. const_assert_eq!(3, feature_id::AUTOSWAP_CSR);
  311. const_assert_eq!(8192, shmem_size::RV32);
  312. const_assert_eq!(12288, shmem_size::RV64);
  313. const_assert_eq!(20480, shmem_size::RV128);
  314. match () {
  315. #[cfg(target_pointer_width = "32")]
  316. () => {
  317. const_assert_eq!(shmem_size::NATIVE, shmem_size::RV32);
  318. }
  319. #[cfg(target_pointer_width = "64")]
  320. () => {
  321. const_assert_eq!(shmem_size::NATIVE, shmem_size::RV64);
  322. }
  323. }
  324. // FIXME(2024-08-03): gate target pointer width at 128
  325. // Currently, values for `target_pointer_width` expected by Rustc compiler are only `16`, `32`, and `64`.
  326. // #[cfg(target_pointer_width = "128")]
  327. // () => {
  328. // const_assert_eq!(shmem_size::NATIVE, shmem_size::RV128);
  329. // }
  330. }
  331. // §16
  332. #[test]
  333. fn test_sta() {
  334. use crate::sta::*;
  335. const_assert_eq!(0x535441, EID_STA);
  336. const_assert_eq!(0, SET_SHMEM);
  337. }
  338. // §17
  339. #[test]
  340. fn test_sse() {
  341. use crate::sse::*;
  342. const_assert_eq!(0x535345, EID_SSE);
  343. const_assert_eq!(0, READ_ATTRS);
  344. const_assert_eq!(1, WRITE_ATTRS);
  345. const_assert_eq!(2, REGISTER);
  346. const_assert_eq!(3, UNREGISTER);
  347. const_assert_eq!(4, ENABLE);
  348. const_assert_eq!(5, DISABLE);
  349. const_assert_eq!(6, COMPLETE);
  350. const_assert_eq!(7, INJECT);
  351. const_assert_eq!(8, HART_UNMASK);
  352. const_assert_eq!(9, HART_MASK);
  353. }
  354. // §18
  355. #[test]
  356. fn test_fwft() {
  357. use crate::fwft::*;
  358. const_assert_eq!(0x46574654, EID_FWFT);
  359. const_assert_eq!(0, SET);
  360. const_assert_eq!(1, GET);
  361. }
  362. // §19
  363. #[test]
  364. fn test_dbtr() {
  365. use crate::dbtr::*;
  366. const_assert_eq!(0x44425452, EID_DBTR);
  367. const_assert_eq!(0, NUM_TRIGGERS);
  368. const_assert_eq!(1, SET_SHMEM);
  369. const_assert_eq!(2, READ_TRIGGERS);
  370. const_assert_eq!(3, INSTALL_TRIGGERS);
  371. const_assert_eq!(4, UPDATE_TRIGGERS);
  372. const_assert_eq!(5, UNINSTALL_TRIGGERS);
  373. const_assert_eq!(6, ENABLE_TRIGGERS);
  374. const_assert_eq!(7, DISABLE_TRIGGERS);
  375. }
  376. // §20
  377. #[test]
  378. fn test_mpxy() {
  379. use crate::mpxy::*;
  380. const_assert_eq!(0x4D505859, EID_MPXY);
  381. const_assert_eq!(0, GET_SHMEM_SIZE);
  382. const_assert_eq!(1, SET_SHMEM);
  383. const_assert_eq!(2, GET_CHANNEL_IDS);
  384. const_assert_eq!(3, READ_ATTRIBUTE);
  385. const_assert_eq!(4, WRITE_ATTRIBUTE);
  386. const_assert_eq!(5, SEND_MESSAGE_WITH_RESPONSE);
  387. const_assert_eq!(6, SEND_MESSAGE_WITHOUT_RESPONSE);
  388. const_assert_eq!(7, GET_NOTIFICATION_EVENTS);
  389. }
  390. }