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@@ -16,7 +16,7 @@ use crate::mm::mmio_buddy::{mmio_pool, MMIOSpaceGuard};
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use crate::mm::VirtAddr;
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use crate::mm::VirtAddr;
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use alloc::string::String;
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use alloc::string::String;
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-use alloc::sync::Arc;
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+use alloc::sync::{Arc, Weak};
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use alloc::vec::Vec;
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use alloc::vec::Vec;
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use alloc::{boxed::Box, collections::LinkedList};
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use alloc::{boxed::Box, collections::LinkedList};
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use bitflags::bitflags;
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use bitflags::bitflags;
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@@ -68,7 +68,7 @@ impl Debug for PciAddr {
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/// 添加了读写锁的链表,存储PCI设备结构体
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/// 添加了读写锁的链表,存储PCI设备结构体
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pub struct PciDeviceLinkedList {
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pub struct PciDeviceLinkedList {
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- list: RwLock<LinkedList<Box<dyn PciDeviceStructure>>>,
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+ list: RwLock<LinkedList<Arc<dyn PciDeviceStructure>>>,
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}
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}
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impl PciDeviceLinkedList {
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impl PciDeviceLinkedList {
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@@ -80,12 +80,12 @@ impl PciDeviceLinkedList {
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}
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}
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/// @brief 获取可读的linkedlist(读锁守卫)
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/// @brief 获取可读的linkedlist(读锁守卫)
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/// @return RwLockReadGuard<LinkedList<Box<dyn PciDeviceStructure>>> 读锁守卫
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/// @return RwLockReadGuard<LinkedList<Box<dyn PciDeviceStructure>>> 读锁守卫
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- pub fn read(&self) -> RwLockReadGuard<LinkedList<Box<dyn PciDeviceStructure>>> {
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+ pub fn read(&self) -> RwLockReadGuard<LinkedList<Arc<dyn PciDeviceStructure>>> {
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self.list.read()
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self.list.read()
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}
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}
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/// @brief 获取可写的linkedlist(写锁守卫)
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/// @brief 获取可写的linkedlist(写锁守卫)
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/// @return RwLockWriteGuard<LinkedList<Box<dyn PciDeviceStructure>>> 写锁守卫
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/// @return RwLockWriteGuard<LinkedList<Box<dyn PciDeviceStructure>>> 写锁守卫
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- pub fn write(&self) -> RwLockWriteGuard<LinkedList<Box<dyn PciDeviceStructure>>> {
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+ pub fn write(&self) -> RwLockWriteGuard<LinkedList<Arc<dyn PciDeviceStructure>>> {
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self.list.write()
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self.list.write()
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}
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}
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/// @brief 获取链表中PCI结构体数目
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/// @brief 获取链表中PCI结构体数目
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@@ -95,7 +95,7 @@ impl PciDeviceLinkedList {
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list.len()
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list.len()
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}
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}
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/// @brief 添加Pci设备结构体到链表中
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/// @brief 添加Pci设备结构体到链表中
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- pub fn add(&self, device: Box<dyn PciDeviceStructure>) {
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+ pub fn add(&self, device: Arc<dyn PciDeviceStructure>) {
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let mut list = self.list.write();
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let mut list = self.list.write();
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list.push_back(device);
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list.push_back(device);
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}
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}
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@@ -113,15 +113,14 @@ impl PciDeviceLinkedList {
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/// ## 返回值
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/// ## 返回值
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///
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///
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/// - 返回匹配的供应商ID的PCI设备结构的引用。
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/// - 返回匹配的供应商ID的PCI设备结构的引用。
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-pub fn get_pci_device_structures_mut_by_vendor_id<'a>(
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- list: &'a mut RwLockWriteGuard<'_, LinkedList<Box<dyn PciDeviceStructure>>>,
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+pub fn get_pci_device_structures_mut_by_vendor_id(
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+ list: &PciDeviceLinkedList,
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vendor_id: u16,
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vendor_id: u16,
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-) -> Vec<&'a mut Box<(dyn PciDeviceStructure)>> {
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- let mut result = Vec::new();
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- for box_pci_device_structure in list.iter_mut() {
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- let common_header = (*box_pci_device_structure).common_header();
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- if common_header.vendor_id == vendor_id {
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- result.push(box_pci_device_structure);
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+) -> Vec<Arc<(dyn PciDeviceStructure)>> {
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+ let mut result: Vec<Arc<(dyn PciDeviceStructure)>> = Vec::new();
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+ for box_pci_device_structure in list.write().iter() {
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+ if box_pci_device_structure.common_header().vendor_id == vendor_id {
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+ result.push(box_pci_device_structure.clone());
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}
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}
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}
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}
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result
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result
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@@ -140,16 +139,17 @@ pub fn get_pci_device_structures_mut_by_vendor_id<'a>(
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///
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///
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/// ## 返回值
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/// ## 返回值
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/// - 包含链表中所有满足条件的PCI结构体的可变引用的容器。
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/// - 包含链表中所有满足条件的PCI结构体的可变引用的容器。
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-pub fn get_pci_device_structure_mut<'a>(
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- list: &'a mut RwLockWriteGuard<'_, LinkedList<Box<dyn PciDeviceStructure>>>,
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+pub fn get_pci_device_structure_mut(
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+ list: &PciDeviceLinkedList,
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class_code: u8,
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class_code: u8,
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subclass: u8,
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subclass: u8,
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-) -> Vec<&'a mut Box<(dyn PciDeviceStructure)>> {
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+) -> Vec<Arc<dyn PciDeviceStructure>> {
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let mut result = Vec::new();
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let mut result = Vec::new();
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- for box_pci_device_structure in list.iter_mut() {
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- let common_header = (*box_pci_device_structure).common_header();
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- if (common_header.class_code == class_code) && (common_header.subclass == subclass) {
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- result.push(box_pci_device_structure);
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+ for box_pci_device_structure in list.write().iter() {
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+ if (box_pci_device_structure.common_header().class_code == class_code)
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+ && (box_pci_device_structure.common_header().subclass == subclass)
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+ {
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+ result.push(box_pci_device_structure.clone());
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}
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}
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}
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}
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result
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result
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@@ -317,7 +317,7 @@ pub trait PciDeviceStructure: Send + Sync {
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fn header_type(&self) -> HeaderType;
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fn header_type(&self) -> HeaderType;
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/// @brief 当其为standard设备时返回&Pci_Device_Structure_General_Device,其余情况返回None
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/// @brief 当其为standard设备时返回&Pci_Device_Structure_General_Device,其余情况返回None
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#[inline(always)]
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#[inline(always)]
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- fn as_standard_device(&self) -> Option<&PciDeviceStructureGeneralDevice> {
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+ fn as_standard_device(&self) -> Option<Arc<PciDeviceStructureGeneralDevice>> {
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None
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None
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}
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}
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/// @brief 当其为pci to pci bridge设备时返回&Pci_Device_Structure_Pci_to_Pci_Bridge,其余情况返回None
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/// @brief 当其为pci to pci bridge设备时返回&Pci_Device_Structure_Pci_to_Pci_Bridge,其余情况返回None
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@@ -333,21 +333,14 @@ pub trait PciDeviceStructure: Send + Sync {
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/// @brief 获取Pci设备共有的common_header
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/// @brief 获取Pci设备共有的common_header
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/// @return 返回其不可变引用
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/// @return 返回其不可变引用
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fn common_header(&self) -> &PciDeviceStructureHeader;
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fn common_header(&self) -> &PciDeviceStructureHeader;
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- /// @brief 当其为standard设备时返回&mut Pci_Device_Structure_General_Device,其余情况返回None
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- #[inline(always)]
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- fn as_standard_device_mut(&mut self) -> Option<&mut PciDeviceStructureGeneralDevice> {
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- None
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- }
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/// @brief 当其为pci to pci bridge设备时返回&mut Pci_Device_Structure_Pci_to_Pci_Bridge,其余情况返回None
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/// @brief 当其为pci to pci bridge设备时返回&mut Pci_Device_Structure_Pci_to_Pci_Bridge,其余情况返回None
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#[inline(always)]
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#[inline(always)]
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- fn as_pci_to_pci_bridge_device_mut(&mut self) -> Option<&mut PciDeviceStructurePciToPciBridge> {
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+ fn as_pci_to_pci_bridge_device_mut(&self) -> Option<&PciDeviceStructurePciToPciBridge> {
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None
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None
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}
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}
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/// @brief 当其为pci to cardbus bridge设备时返回&mut Pci_Device_Structure_Pci_to_Cardbus_Bridge,其余情况返回None
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/// @brief 当其为pci to cardbus bridge设备时返回&mut Pci_Device_Structure_Pci_to_Cardbus_Bridge,其余情况返回None
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#[inline(always)]
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#[inline(always)]
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- fn as_pci_to_carbus_bridge_device_mut(
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- &mut self,
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- ) -> Option<&mut PciDeviceStructurePciToCardbusBridge> {
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+ fn as_pci_to_carbus_bridge_device_mut(&self) -> Option<&PciDeviceStructurePciToCardbusBridge> {
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None
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None
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}
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}
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/// @brief 返回迭代器,遍历capabilities
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/// @brief 返回迭代器,遍历capabilities
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@@ -358,14 +351,14 @@ pub trait PciDeviceStructure: Send + Sync {
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fn status_command(&self) -> (Status, Command) {
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fn status_command(&self) -> (Status, Command) {
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let common_header = self.common_header();
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let common_header = self.common_header();
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let status = Status::from_bits_truncate(common_header.status);
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let status = Status::from_bits_truncate(common_header.status);
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- let command = Command::from_bits_truncate(common_header.command);
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+ let command = Command::from_bits_truncate(*common_header.command.read());
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(status, command)
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(status, command)
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}
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}
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/// @brief 设置Command寄存器的值
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/// @brief 设置Command寄存器的值
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- fn set_command(&mut self, command: Command) {
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+ fn set_command(&self, command: Command) {
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let common_header = self.common_header_mut();
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let common_header = self.common_header_mut();
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let command = command.bits();
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let command = command.bits();
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- common_header.command = command;
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+ *common_header.command.write() = command;
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pci_root_0().write_config(
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pci_root_0().write_config(
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common_header.bus_device_function,
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common_header.bus_device_function,
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STATUS_COMMAND_OFFSET.into(),
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STATUS_COMMAND_OFFSET.into(),
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@@ -374,22 +367,22 @@ pub trait PciDeviceStructure: Send + Sync {
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}
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}
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/// @brief 获取Pci设备共有的common_header
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/// @brief 获取Pci设备共有的common_header
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/// @return 返回其可变引用
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/// @return 返回其可变引用
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- fn common_header_mut(&mut self) -> &mut PciDeviceStructureHeader;
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+ fn common_header_mut(&self) -> &PciDeviceStructureHeader;
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/// @brief 读取standard设备的bar寄存器,映射后将结果加入结构体的standard_device_bar变量
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/// @brief 读取standard设备的bar寄存器,映射后将结果加入结构体的standard_device_bar变量
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/// @return 只有standard设备才返回成功或者错误,其余返回None
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/// @return 只有standard设备才返回成功或者错误,其余返回None
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#[inline(always)]
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#[inline(always)]
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- fn bar_ioremap(&mut self) -> Option<Result<u8, PciError>> {
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+ fn bar_ioremap(&self) -> Option<Result<u8, PciError>> {
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None
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None
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}
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}
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/// @brief 获取PCI设备的bar寄存器的引用
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/// @brief 获取PCI设备的bar寄存器的引用
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/// @return
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/// @return
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#[inline(always)]
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#[inline(always)]
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- fn bar(&mut self) -> Option<&PciStandardDeviceBar> {
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+ fn bar(&self) -> Option<&RwLock<PciStandardDeviceBar>> {
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None
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None
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}
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}
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/// @brief 通过设置该pci设备的command
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/// @brief 通过设置该pci设备的command
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- fn enable_master(&mut self) {
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+ fn enable_master(&self) {
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self.set_command(Command::IO_SPACE | Command::MEMORY_SPACE | Command::BUS_MASTER);
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self.set_command(Command::IO_SPACE | Command::MEMORY_SPACE | Command::BUS_MASTER);
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}
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}
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/// @brief 寻找设备的msix空间的offset
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/// @brief 寻找设备的msix空间的offset
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@@ -411,21 +404,21 @@ pub trait PciDeviceStructure: Send + Sync {
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None
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None
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}
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}
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/// @brief 返回结构体中的irq_type的可变引用
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/// @brief 返回结构体中的irq_type的可变引用
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- fn irq_type_mut(&mut self) -> Option<&mut IrqType>;
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+ fn irq_type_mut(&self) -> Option<&RwLock<IrqType>>;
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/// @brief 返回结构体中的irq_vector的可变引用
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/// @brief 返回结构体中的irq_vector的可变引用
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- fn irq_vector_mut(&mut self) -> Option<&mut Vec<IrqNumber>>;
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+ fn irq_vector_mut(&self) -> Option<&RwLock<Vec<IrqNumber>>>;
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}
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}
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/// Pci_Device_Structure_Header PCI设备结构体共有的头部
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/// Pci_Device_Structure_Header PCI设备结构体共有的头部
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-#[derive(Clone, Debug)]
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+#[derive(Debug)]
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pub struct PciDeviceStructureHeader {
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pub struct PciDeviceStructureHeader {
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// ==== busdevicefunction变量表示该结构体所处的位置
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// ==== busdevicefunction变量表示该结构体所处的位置
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pub bus_device_function: BusDeviceFunction,
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pub bus_device_function: BusDeviceFunction,
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pub vendor_id: u16, // 供应商ID 0xffff是一个无效值,在读取访问不存在的设备的配置空间寄存器时返回
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pub vendor_id: u16, // 供应商ID 0xffff是一个无效值,在读取访问不存在的设备的配置空间寄存器时返回
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pub device_id: u16, // 设备ID,标志特定设备
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pub device_id: u16, // 设备ID,标志特定设备
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- pub command: u16, // 提供对设备生成和响应pci周期的能力的控制 向该寄存器写入0时,设备与pci总线断开除配置空间访问以外的所有连接
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- pub status: u16, // 用于记录pci总线相关时间的状态信息寄存器
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- pub revision_id: u8, // 修订ID,指定特定设备的修订标志符
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+ pub command: RwLock<u16>, // 提供对设备生成和响应pci周期的能力的控制 向该寄存器写入0时,设备与pci总线断开除配置空间访问以外的所有连接
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+ pub status: u16, // 用于记录pci总线相关时间的状态信息寄存器
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+ pub revision_id: u8, // 修订ID,指定特定设备的修订标志符
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pub prog_if: u8, // 编程接口字节,一个只读寄存器,指定设备具有的寄存器级别的编程接口(如果有的话)
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pub prog_if: u8, // 编程接口字节,一个只读寄存器,指定设备具有的寄存器级别的编程接口(如果有的话)
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pub subclass: u8, // 子类。指定设备执行的特定功能的只读寄存器
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pub subclass: u8, // 子类。指定设备执行的特定功能的只读寄存器
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pub class_code: u8, // 类代码,一个只读寄存器,指定设备执行的功能类型
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pub class_code: u8, // 类代码,一个只读寄存器,指定设备执行的功能类型
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@@ -440,14 +433,14 @@ pub struct PciDeviceStructureHeader {
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}
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}
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/// Pci_Device_Structure_General_Device PCI标准设备结构体
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/// Pci_Device_Structure_General_Device PCI标准设备结构体
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-#[derive(Clone, Debug)]
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+#[derive(Debug)]
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pub struct PciDeviceStructureGeneralDevice {
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pub struct PciDeviceStructureGeneralDevice {
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pub common_header: PciDeviceStructureHeader,
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pub common_header: PciDeviceStructureHeader,
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// 中断结构体,包括legacy,msi,msix三种情况
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// 中断结构体,包括legacy,msi,msix三种情况
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- pub irq_type: IrqType,
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+ pub irq_type: RwLock<IrqType>,
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// 使用的中断号的vec集合
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// 使用的中断号的vec集合
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- pub irq_vector: Vec<IrqNumber>,
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- pub standard_device_bar: PciStandardDeviceBar,
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+ pub irq_vector: RwLock<Vec<IrqNumber>>,
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+ pub standard_device_bar: RwLock<PciStandardDeviceBar>,
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pub cardbus_cis_pointer: u32, // 指向卡信息结构,供在 CardBus 和 PCI 之间共享芯片的设备使用。
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pub cardbus_cis_pointer: u32, // 指向卡信息结构,供在 CardBus 和 PCI 之间共享芯片的设备使用。
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pub subsystem_vendor_id: u16,
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pub subsystem_vendor_id: u16,
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pub subsystem_id: u16,
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pub subsystem_id: u16,
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@@ -460,6 +453,7 @@ pub struct PciDeviceStructureGeneralDevice {
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pub interrupt_pin: u8, // 指定设备使用的中断引脚。其中值为0x1INTA#、0x2INTB#、0x3INTC#、0x4INTD#,0x0表示设备不使用中断引脚。
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pub interrupt_pin: u8, // 指定设备使用的中断引脚。其中值为0x1INTA#、0x2INTB#、0x3INTC#、0x4INTD#,0x0表示设备不使用中断引脚。
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pub min_grant: u8, // 一个只读寄存器,用于指定设备所需的突发周期长度(以 1/4 微秒为单位)(假设时钟速率为 33 MHz)
|
|
pub min_grant: u8, // 一个只读寄存器,用于指定设备所需的突发周期长度(以 1/4 微秒为单位)(假设时钟速率为 33 MHz)
|
|
pub max_latency: u8, // 一个只读寄存器,指定设备需要多长时间访问一次 PCI 总线(以 1/4 微秒为单位)。
|
|
pub max_latency: u8, // 一个只读寄存器,指定设备需要多长时间访问一次 PCI 总线(以 1/4 微秒为单位)。
|
|
|
|
+ pub self_ptr: RwLock<Weak<Self>>,
|
|
}
|
|
}
|
|
impl PciDeviceStructure for PciDeviceStructureGeneralDevice {
|
|
impl PciDeviceStructure for PciDeviceStructureGeneralDevice {
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
@@ -467,20 +461,16 @@ impl PciDeviceStructure for PciDeviceStructureGeneralDevice {
|
|
HeaderType::Standard
|
|
HeaderType::Standard
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn as_standard_device(&self) -> Option<&PciDeviceStructureGeneralDevice> {
|
|
|
|
- Some(self)
|
|
|
|
- }
|
|
|
|
- #[inline(always)]
|
|
|
|
- fn as_standard_device_mut(&mut self) -> Option<&mut PciDeviceStructureGeneralDevice> {
|
|
|
|
- Some(self)
|
|
|
|
|
|
+ fn as_standard_device(&self) -> Option<Arc<PciDeviceStructureGeneralDevice>> {
|
|
|
|
+ self.self_ptr.read().upgrade()
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
fn common_header(&self) -> &PciDeviceStructureHeader {
|
|
fn common_header(&self) -> &PciDeviceStructureHeader {
|
|
&self.common_header
|
|
&self.common_header
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn common_header_mut(&mut self) -> &mut PciDeviceStructureHeader {
|
|
|
|
- &mut self.common_header
|
|
|
|
|
|
+ fn common_header_mut(&self) -> &PciDeviceStructureHeader {
|
|
|
|
+ &self.common_header
|
|
}
|
|
}
|
|
fn capabilities(&self) -> Option<CapabilityIterator> {
|
|
fn capabilities(&self) -> Option<CapabilityIterator> {
|
|
Some(CapabilityIterator {
|
|
Some(CapabilityIterator {
|
|
@@ -488,37 +478,37 @@ impl PciDeviceStructure for PciDeviceStructureGeneralDevice {
|
|
next_capability_offset: Some(self.capabilities_pointer),
|
|
next_capability_offset: Some(self.capabilities_pointer),
|
|
})
|
|
})
|
|
}
|
|
}
|
|
- fn bar_ioremap(&mut self) -> Option<Result<u8, PciError>> {
|
|
|
|
|
|
+ fn bar_ioremap(&self) -> Option<Result<u8, PciError>> {
|
|
let common_header = &self.common_header;
|
|
let common_header = &self.common_header;
|
|
match pci_bar_init(common_header.bus_device_function) {
|
|
match pci_bar_init(common_header.bus_device_function) {
|
|
Ok(bar) => {
|
|
Ok(bar) => {
|
|
- self.standard_device_bar = bar;
|
|
|
|
|
|
+ *self.standard_device_bar.write() = bar;
|
|
Some(Ok(0))
|
|
Some(Ok(0))
|
|
}
|
|
}
|
|
Err(e) => Some(Err(e)),
|
|
Err(e) => Some(Err(e)),
|
|
}
|
|
}
|
|
}
|
|
}
|
|
- fn bar(&mut self) -> Option<&PciStandardDeviceBar> {
|
|
|
|
|
|
+ fn bar(&self) -> Option<&RwLock<PciStandardDeviceBar>> {
|
|
Some(&self.standard_device_bar)
|
|
Some(&self.standard_device_bar)
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn irq_type_mut(&mut self) -> Option<&mut IrqType> {
|
|
|
|
- Some(&mut self.irq_type)
|
|
|
|
|
|
+ fn irq_type_mut(&self) -> Option<&RwLock<IrqType>> {
|
|
|
|
+ Some(&self.irq_type)
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn irq_vector_mut(&mut self) -> Option<&mut Vec<IrqNumber>> {
|
|
|
|
- Some(&mut self.irq_vector)
|
|
|
|
|
|
+ fn irq_vector_mut(&self) -> Option<&RwLock<Vec<IrqNumber>>> {
|
|
|
|
+ Some(&self.irq_vector)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/// Pci_Device_Structure_Pci_to_Pci_Bridge pci-to-pci桥设备结构体
|
|
/// Pci_Device_Structure_Pci_to_Pci_Bridge pci-to-pci桥设备结构体
|
|
-#[derive(Clone, Debug)]
|
|
|
|
|
|
+#[derive(Debug)]
|
|
pub struct PciDeviceStructurePciToPciBridge {
|
|
pub struct PciDeviceStructurePciToPciBridge {
|
|
pub common_header: PciDeviceStructureHeader,
|
|
pub common_header: PciDeviceStructureHeader,
|
|
// 中断结构体,包括legacy,msi,msix三种情况
|
|
// 中断结构体,包括legacy,msi,msix三种情况
|
|
- pub irq_type: IrqType,
|
|
|
|
|
|
+ pub irq_type: RwLock<IrqType>,
|
|
// 使用的中断号的vec集合
|
|
// 使用的中断号的vec集合
|
|
- pub irq_vector: Vec<IrqNumber>,
|
|
|
|
|
|
+ pub irq_vector: RwLock<Vec<IrqNumber>>,
|
|
pub bar0: u32,
|
|
pub bar0: u32,
|
|
pub bar1: u32,
|
|
pub bar1: u32,
|
|
pub primary_bus_number: u8,
|
|
pub primary_bus_number: u8,
|
|
@@ -554,7 +544,7 @@ impl PciDeviceStructure for PciDeviceStructurePciToPciBridge {
|
|
Some(self)
|
|
Some(self)
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn as_pci_to_pci_bridge_device_mut(&mut self) -> Option<&mut PciDeviceStructurePciToPciBridge> {
|
|
|
|
|
|
+ fn as_pci_to_pci_bridge_device_mut(&self) -> Option<&PciDeviceStructurePciToPciBridge> {
|
|
Some(self)
|
|
Some(self)
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
@@ -562,20 +552,20 @@ impl PciDeviceStructure for PciDeviceStructurePciToPciBridge {
|
|
&self.common_header
|
|
&self.common_header
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn common_header_mut(&mut self) -> &mut PciDeviceStructureHeader {
|
|
|
|
- &mut self.common_header
|
|
|
|
|
|
+ fn common_header_mut(&self) -> &PciDeviceStructureHeader {
|
|
|
|
+ &self.common_header
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn irq_type_mut(&mut self) -> Option<&mut IrqType> {
|
|
|
|
- Some(&mut self.irq_type)
|
|
|
|
|
|
+ fn irq_type_mut(&self) -> Option<&RwLock<IrqType>> {
|
|
|
|
+ Some(&self.irq_type)
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn irq_vector_mut(&mut self) -> Option<&mut Vec<IrqNumber>> {
|
|
|
|
- Some(&mut self.irq_vector)
|
|
|
|
|
|
+ fn irq_vector_mut(&self) -> Option<&RwLock<Vec<IrqNumber>>> {
|
|
|
|
+ Some(&self.irq_vector)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/// Pci_Device_Structure_Pci_to_Cardbus_Bridge Pci_to_Cardbus桥设备结构体
|
|
/// Pci_Device_Structure_Pci_to_Cardbus_Bridge Pci_to_Cardbus桥设备结构体
|
|
-#[derive(Clone, Debug)]
|
|
|
|
|
|
+#[derive(Debug)]
|
|
pub struct PciDeviceStructurePciToCardbusBridge {
|
|
pub struct PciDeviceStructurePciToCardbusBridge {
|
|
pub common_header: PciDeviceStructureHeader,
|
|
pub common_header: PciDeviceStructureHeader,
|
|
pub cardbus_socket_ex_ca_base_address: u32,
|
|
pub cardbus_socket_ex_ca_base_address: u32,
|
|
@@ -611,9 +601,7 @@ impl PciDeviceStructure for PciDeviceStructurePciToCardbusBridge {
|
|
Some(self)
|
|
Some(self)
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn as_pci_to_carbus_bridge_device_mut(
|
|
|
|
- &mut self,
|
|
|
|
- ) -> Option<&mut PciDeviceStructurePciToCardbusBridge> {
|
|
|
|
|
|
+ fn as_pci_to_carbus_bridge_device_mut(&self) -> Option<&PciDeviceStructurePciToCardbusBridge> {
|
|
Some(self)
|
|
Some(self)
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
@@ -621,15 +609,15 @@ impl PciDeviceStructure for PciDeviceStructurePciToCardbusBridge {
|
|
&self.common_header
|
|
&self.common_header
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn common_header_mut(&mut self) -> &mut PciDeviceStructureHeader {
|
|
|
|
- &mut self.common_header
|
|
|
|
|
|
+ fn common_header_mut(&self) -> &PciDeviceStructureHeader {
|
|
|
|
+ &self.common_header
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn irq_type_mut(&mut self) -> Option<&mut IrqType> {
|
|
|
|
|
|
+ fn irq_type_mut(&self) -> Option<&RwLock<IrqType>> {
|
|
None
|
|
None
|
|
}
|
|
}
|
|
#[inline(always)]
|
|
#[inline(always)]
|
|
- fn irq_vector_mut(&mut self) -> Option<&mut Vec<IrqNumber>> {
|
|
|
|
|
|
+ fn irq_vector_mut(&self) -> Option<&RwLock<Vec<IrqNumber>>> {
|
|
None
|
|
None
|
|
}
|
|
}
|
|
}
|
|
}
|
|
@@ -684,14 +672,14 @@ pub fn capabilities_offset(bus_device_function: BusDeviceFunction) -> Option<u8>
|
|
fn pci_read_header(
|
|
fn pci_read_header(
|
|
bus_device_function: BusDeviceFunction,
|
|
bus_device_function: BusDeviceFunction,
|
|
add_to_list: bool,
|
|
add_to_list: bool,
|
|
-) -> Result<Box<dyn PciDeviceStructure>, PciError> {
|
|
|
|
|
|
+) -> Result<Arc<dyn PciDeviceStructure>, PciError> {
|
|
// 先读取公共header
|
|
// 先读取公共header
|
|
let result = pci_root_0().read_config(bus_device_function, 0x00);
|
|
let result = pci_root_0().read_config(bus_device_function, 0x00);
|
|
let vendor_id = result as u16;
|
|
let vendor_id = result as u16;
|
|
let device_id = (result >> 16) as u16;
|
|
let device_id = (result >> 16) as u16;
|
|
|
|
|
|
let result = pci_root_0().read_config(bus_device_function, 0x04);
|
|
let result = pci_root_0().read_config(bus_device_function, 0x04);
|
|
- let command = result as u16;
|
|
|
|
|
|
+ let command = RwLock::new(result as u16);
|
|
let status = (result >> 16) as u16;
|
|
let status = (result >> 16) as u16;
|
|
|
|
|
|
let result = pci_root_0().read_config(bus_device_function, 0x08);
|
|
let result = pci_root_0().read_config(bus_device_function, 0x08);
|
|
@@ -727,22 +715,22 @@ fn pci_read_header(
|
|
HeaderType::Standard => {
|
|
HeaderType::Standard => {
|
|
let general_device: PciDeviceStructureGeneralDevice =
|
|
let general_device: PciDeviceStructureGeneralDevice =
|
|
pci_read_general_device_header(header, &bus_device_function);
|
|
pci_read_general_device_header(header, &bus_device_function);
|
|
- let box_general_device = Box::new(general_device.clone());
|
|
|
|
- let box_general_device_clone = box_general_device.clone();
|
|
|
|
|
|
+ let box_general_device = Arc::new(general_device);
|
|
|
|
+ *box_general_device.self_ptr.write() = Arc::downgrade(&box_general_device);
|
|
if add_to_list {
|
|
if add_to_list {
|
|
- PCI_DEVICE_LINKEDLIST.add(box_general_device);
|
|
|
|
|
|
+ PCI_DEVICE_LINKEDLIST.add(box_general_device.clone());
|
|
//这里实际上不应该使用clone,因为raw是用于sysfs的结构,但是实际上pci设备是在PCI_DEVICE_LINKEDLIST链表上的,
|
|
//这里实际上不应该使用clone,因为raw是用于sysfs的结构,但是实际上pci设备是在PCI_DEVICE_LINKEDLIST链表上的,
|
|
//这就导致sysfs呈现的对pci设备的操控接口实际上操控的是pci设备描述符是一个副本
|
|
//这就导致sysfs呈现的对pci设备的操控接口实际上操控的是pci设备描述符是一个副本
|
|
//但是无奈这里没有使用Arc
|
|
//但是无奈这里没有使用Arc
|
|
//todo:修改pci设备描述符在静态链表中存在的方式,并修改这里的clone操作
|
|
//todo:修改pci设备描述符在静态链表中存在的方式,并修改这里的clone操作
|
|
- let raw = PciGeneralDevice::from(&general_device);
|
|
|
|
|
|
+ let raw = PciGeneralDevice::from(box_general_device.clone());
|
|
let _ = pci_device_manager().device_add(Arc::new(raw));
|
|
let _ = pci_device_manager().device_add(Arc::new(raw));
|
|
}
|
|
}
|
|
- Ok(box_general_device_clone)
|
|
|
|
|
|
+ Ok(box_general_device)
|
|
}
|
|
}
|
|
HeaderType::PciPciBridge => {
|
|
HeaderType::PciPciBridge => {
|
|
let pci_to_pci_bridge = pci_read_pci_to_pci_bridge_header(header, &bus_device_function);
|
|
let pci_to_pci_bridge = pci_read_pci_to_pci_bridge_header(header, &bus_device_function);
|
|
- let box_pci_to_pci_bridge = Box::new(pci_to_pci_bridge);
|
|
|
|
|
|
+ let box_pci_to_pci_bridge = Arc::new(pci_to_pci_bridge);
|
|
let box_pci_to_pci_bridge_clone = box_pci_to_pci_bridge.clone();
|
|
let box_pci_to_pci_bridge_clone = box_pci_to_pci_bridge.clone();
|
|
if add_to_list {
|
|
if add_to_list {
|
|
PCI_DEVICE_LINKEDLIST.add(box_pci_to_pci_bridge);
|
|
PCI_DEVICE_LINKEDLIST.add(box_pci_to_pci_bridge);
|
|
@@ -752,7 +740,7 @@ fn pci_read_header(
|
|
HeaderType::PciCardbusBridge => {
|
|
HeaderType::PciCardbusBridge => {
|
|
let pci_cardbus_bridge =
|
|
let pci_cardbus_bridge =
|
|
pci_read_pci_to_cardbus_bridge_header(header, &bus_device_function);
|
|
pci_read_pci_to_cardbus_bridge_header(header, &bus_device_function);
|
|
- let box_pci_cardbus_bridge = Box::new(pci_cardbus_bridge);
|
|
|
|
|
|
+ let box_pci_cardbus_bridge = Arc::new(pci_cardbus_bridge);
|
|
let box_pci_cardbus_bridge_clone = box_pci_cardbus_bridge.clone();
|
|
let box_pci_cardbus_bridge_clone = box_pci_cardbus_bridge.clone();
|
|
if add_to_list {
|
|
if add_to_list {
|
|
PCI_DEVICE_LINKEDLIST.add(box_pci_cardbus_bridge);
|
|
PCI_DEVICE_LINKEDLIST.add(box_pci_cardbus_bridge);
|
|
@@ -772,7 +760,7 @@ fn pci_read_general_device_header(
|
|
common_header: PciDeviceStructureHeader,
|
|
common_header: PciDeviceStructureHeader,
|
|
bus_device_function: &BusDeviceFunction,
|
|
bus_device_function: &BusDeviceFunction,
|
|
) -> PciDeviceStructureGeneralDevice {
|
|
) -> PciDeviceStructureGeneralDevice {
|
|
- let standard_device_bar = PciStandardDeviceBar::default();
|
|
|
|
|
|
+ let standard_device_bar = RwLock::new(PciStandardDeviceBar::default());
|
|
let cardbus_cis_pointer = pci_root_0().read_config(*bus_device_function, 0x28);
|
|
let cardbus_cis_pointer = pci_root_0().read_config(*bus_device_function, 0x28);
|
|
|
|
|
|
let result = pci_root_0().read_config(*bus_device_function, 0x2c);
|
|
let result = pci_root_0().read_config(*bus_device_function, 0x2c);
|
|
@@ -795,8 +783,8 @@ fn pci_read_general_device_header(
|
|
let max_latency = (result >> 24) as u8;
|
|
let max_latency = (result >> 24) as u8;
|
|
PciDeviceStructureGeneralDevice {
|
|
PciDeviceStructureGeneralDevice {
|
|
common_header,
|
|
common_header,
|
|
- irq_type: IrqType::Unused,
|
|
|
|
- irq_vector: Vec::new(),
|
|
|
|
|
|
+ irq_type: RwLock::new(IrqType::Unused),
|
|
|
|
+ irq_vector: RwLock::new(Vec::new()),
|
|
standard_device_bar,
|
|
standard_device_bar,
|
|
cardbus_cis_pointer,
|
|
cardbus_cis_pointer,
|
|
subsystem_vendor_id,
|
|
subsystem_vendor_id,
|
|
@@ -810,6 +798,7 @@ fn pci_read_general_device_header(
|
|
interrupt_pin,
|
|
interrupt_pin,
|
|
min_grant,
|
|
min_grant,
|
|
max_latency,
|
|
max_latency,
|
|
|
|
+ self_ptr: RwLock::new(Weak::new()),
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
@@ -865,8 +854,8 @@ fn pci_read_pci_to_pci_bridge_header(
|
|
let bridge_control = (result >> 16) as u16;
|
|
let bridge_control = (result >> 16) as u16;
|
|
PciDeviceStructurePciToPciBridge {
|
|
PciDeviceStructurePciToPciBridge {
|
|
common_header,
|
|
common_header,
|
|
- irq_type: IrqType::Unused,
|
|
|
|
- irq_vector: Vec::new(),
|
|
|
|
|
|
+ irq_type: RwLock::new(IrqType::Unused),
|
|
|
|
+ irq_vector: RwLock::new(Vec::new()),
|
|
bar0,
|
|
bar0,
|
|
bar1,
|
|
bar1,
|
|
primary_bus_number,
|
|
primary_bus_number,
|
|
@@ -1485,7 +1474,7 @@ pub struct ExternalCapabilityIterator<'a> {
|
|
pub bus_device_function: BusDeviceFunction,
|
|
pub bus_device_function: BusDeviceFunction,
|
|
pub next_capability_offset: Option<u16>,
|
|
pub next_capability_offset: Option<u16>,
|
|
}
|
|
}
|
|
-impl<'a> Iterator for ExternalCapabilityIterator<'a> {
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+impl Iterator for ExternalCapabilityIterator<'_> {
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type Item = ExternalCapabilityInfo;
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type Item = ExternalCapabilityInfo;
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fn next(&mut self) -> Option<Self::Item> {
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fn next(&mut self) -> Option<Self::Item> {
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let offset = self.next_capability_offset?;
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let offset = self.next_capability_offset?;
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