Do not set mideleg and medeleg (not supported on FE310) · 84042d706a - DragonOS Git Mirror

Do not set mideleg and medeleg (not supported on FE310)

Vadim Kaushan 5 years ago

parent

03f4eef93d

commit

84042d706a

1 changed files with 0 additions and 2 deletions

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							- 2
						
riscv-rt/asm.S
							 
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				@@ -13,8 +13,6 @@ _start:
			
				     .cfi_startproc
			
				     .cfi_undefined ra
			
				-    csrw mideleg, 0
			
				-    csrw medeleg, 0
			
				     csrw mie, 0
			
				     csrw mip, 0