Low level access to RISC-V processors

Román Cárdenas 147285e8a0 concise implementation of e-h 1 rok pred
.github 147285e8a0 concise implementation of e-h 1 rok pred
examples 012aa79db4 HAL implementations 1 rok pred
src 147285e8a0 concise implementation of e-h 1 rok pred
.gitignore 197f2fcd71 First version of PLIC and (A)CLINT 1 rok pred
Cargo.toml 012aa79db4 HAL implementations 1 rok pred
README.md 74490102ac Docs and CI actions 1 rok pred

README.md

riscv-peripheral

Standard RISC-V peripherals for embedded systems written in Rust

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.61 and up. It might compile with older versions but that may change in any new patch release.