Chien Wong 17185e9627 Add 'single-hart' changelog entry 1 year ago
..
.github 23387940ed Remove label-check from merge_group 1 year ago
examples 0abe2ab583 use core::arch::global_asm 1 year ago
macros 527ed05eae fix: avoid rust-analyzer snake case warning 2 years ago
src 1a22ec557b Fix setting incorrect sp if single-hart 1 year ago
.gitignore 19c30c6eca add .vscode to .gitignore 1 year ago
CHANGELOG.md 17185e9627 Add 'single-hart' changelog entry 1 year ago
CODE_OF_CONDUCT.md 73f1a1ebe7 Rename RISCV to RISC-V 5 years ago
Cargo.toml eef90a0f25 Implement r0 crate in assembly 1 year ago
README.md 5fcb5ef855 Update copyright years 2 years ago
build.rs 56125182b0 Fix: Add separate linkerscripts for rv32 and rv64 1 year ago
link-rv32.x 56125182b0 Fix: Add separate linkerscripts for rv32 and rv64 1 year ago
link-rv64.x 56125182b0 Fix: Add separate linkerscripts for rv32 and rv64 1 year ago

README.md

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riscv-rt

Minimal runtime / startup for RISC-V CPU's.

This project is developed and maintained by the RISC-V team.

Documentation

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.59 and up. It might compile with older versions but that may change in any new patch release.

License

Copyright 2018-2022 RISC-V team

Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above copyright notice and this permission notice appear in all copies.

THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.

Code of Conduct

Contribution to this crate is organized under the terms of the Rust Code of Conduct, the maintainer of this crate, the RISC-V team, promises to intervene to uphold that code of conduct.