Prepare for release v0.2.0

CHANGELOG.md

@@ -5,6 +5,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
 ## [Unreleased]
+
+## [0.2.0] - 2021-02-23
 ### Added
 - S-level Illegal instruction exception is now delegated into S-level software handler
 - Support RFENCE extension in RustSBI framework
@@ -13,6 +15,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 ### Modified
 - Function `rustsbi::ecall` now require 5 input parameters
 - Enhanced in-line code documents from SBI standard
+- Now IPI module requires to return an `SbiRet` value
 - Remove use of `global_asm` and `llvm_asm` in test kernel
 - Align to 4 bytes for interrupt handler on QEMU and test kernel
 - Update `riscv` crate dependency for QEMU platform
@@ -59,7 +62,8 @@ RustSBI is adapted to SBI standard with implementation number 4.
 - RISC-V Privileged Specification v1.11
 - Backward compatible to privileged spec v1.9.1
 
-[Unreleased]: https://github.com/luojia65/rustsbi/compare/v0.1.1...HEAD
+[Unreleased]: https://github.com/luojia65/rustsbi/compare/v0.2.0...HEAD
+[0.2.0]: https://github.com/luojia65/rustsbi/compare/v0.1.1...v0.2.0
 [0.1.1]: https://github.com/luojia65/rustsbi/compare/v0.1.0...v0.1.1
 [0.1.0]: https://github.com/luojia65/rustsbi/compare/v0.0.2...v0.1.0
 [0.0.2]: https://github.com/luojia65/rustsbi/releases/tag/v0.0.2

platform/k210/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "rustsbi-k210"
-version = "0.1.0"
+version = "0.2.0"
 authors = ["luojia65 <[email protected]>"]
 edition = "2018"
 publish = false

rustsbi/Cargo.toml

@@ -1,7 +1,7 @@
 [package]
 name = "rustsbi"
 description = "Minimal RISC-V's SBI implementation library in Rust"
-version = "0.1.1"
+version = "0.2.0"
 authors = ["luojia65 <[email protected]>"]
 repository = "https://github.com/luojia65/rustsbi"
 documentation = "https://docs.rs/rustsbi"