Commit History

Autor SHA1 Mensaxe Data
  Luo Jia / Zhouqi Jiang 9966a8e526 feat: enhance documentation and generic support for SBI masks (#102) hai 1 mes
  Luo Jia / Zhouqi Jiang 327053af8d feat(spec): add special constant V1_0 and V2_0 for structure `Version` (#101) hai 1 mes
  Luo Jia / Zhouqi Jiang 8448631133 fix: rearrange prototyper Cargo.toml dependencies, move RustSBI changelog file (#100) hai 1 mes
  Luo Jia / Zhouqi Jiang 7d75145fde Merge pull request #94 from luojia65/feat/sbiret-example hai 1 mes
  Zhouqi Jiang d01baa5ce7 refactor: merge upstream main into feat/sbi-example hai 1 mes
  Luo Jia / Zhouqi Jiang eb5a100f81 refactor: merge rustsbi repository and prototyper repository (#95) hai 1 mes
  guttatus 16edd45fa9 ci: add target package directive to compile rustsbi correctly hai 1 mes
  guttatus 72dac4c0a2 fix: remove target in rust-toolchain.toml hai 1 mes
  guttatus 90e674704b Merge pull request #1 from woshiluo/merge hai 1 mes
  Woshiluo Luo 98da449fe8 fix(xtask): wrong path hai 1 mes
  Woshiluo Luo d6332145d5 refactor: remove dotfiles in prototyper hai 1 mes
  Woshiluo Luo ada9050137 refactor: move xtask to root directory hai 1 mes
  Woshiluo Luo 330a60311a refactor: merged rustsbi/prototyper into main hai 1 mes
  Woshiluo Luo 8165359ac1 refactor: parpare for merged into rustsbi hai 1 mes
  Zhouqi Jiang 75857567c1 feat(spec): add an SBI version example for usage of the Version structure hai 1 mes
  Zhouqi Jiang d3035bc0b2 fix(spec): small fix on RV128I emulator example hai 1 mes
  Zhouqi Jiang b17aee8b9d feat(spec): add changelog entry for RV128I emulator example hai 1 mes
  Zhouqi Jiang bc38c1b533 feat(spec): add beq instruction for the example RV128I emulator hai 1 mes
  Zhouqi Jiang 395dcf5aae feat(spec): add an example of RV128I emulator to illustrate example of non-usize SbiRet hai 1 mes
  Woshiluo Luo 756705c3ff Merge prototyper hai 1 mes
  guttatus 5cb8f954a0 refactor: move the rustsbi library to the `library` directory hai 1 mes
  guttatus 192b67c89c Merge pull request #63 from woshiluo/patch-1 hai 1 mes
  guttatus 472f2bd23f Merge pull request #64 from woshiluo/bump-riscv hai 1 mes
  Luo Jia / Zhouqi Jiang 7a74de58f3 feat(spec): refactor `SbiRet` to be generic of register and introduce the `SbiRegister` trait (#93) hai 1 mes
  Woshiluo Luo 9b125f1d1b feat: bump `riscv` to 1.12.1 hai 1 mes
  Woshiluo Luo 3969141682 fix: use naked_asm for payload and fdt include hai 1 mes
  guttatus 82d4e5bf2f Merge pull request #62 from guttatus/ci hai 1 mes
  guttatus d9a01149ef feat: add ci and refactor code hai 1 mes
  guttatus 8cb5b2b535 Merge pull request #61 from guttatus/edition2024 hai 1 mes
  guttatus 00935acde4 feat: update rust edition to 2024 and change `asm!` to `naked_asm!` hai 1 mes