Commit History

Author SHA1 Message Date
  hasheddan 4b2e433309 Fix link to RISC-V team in wg repo 4 years ago
  bors[bot] 7358eda666 Merge #63 4 years ago
  bors[bot] 197386eb92 Merge #65 4 years ago
  luojia65 14991c3f18 Reformat documents in `mstatus` module 4 years ago
  luojia65 04794a7406 Use a different environment variable to run rustfmt check 4 years ago
  luojia65 e5b4e1f551 Cleanup code using `cargo fmt` 4 years ago
  luojia65 97f1347d4e Add supervisor privilege bits defined in 1.10 4 years ago
  luojia65 763068380f Fix documents on cycle and instret registers 4 years ago
  luojia65 fec65d8e37 Add write function for {u,s}{cause,tval} registers 4 years ago
  longfangsong c5c5621990 fix unescaped "[]"s in doc comment 4 years ago
  bors[bot] 4145e4aca0 Merge #57 4 years ago
  dkhayes117 1c6fd6c23c Change `user` to `supervisor` in mcounteren.rs comments 4 years ago
  dkhayes117 4be384d0cd More formatting :( 4 years ago
  dkhayes117 8a36b3e3d6 Cargo fmt 4 years ago
  dkhayes117 6878e5f774 Fix weird formatting in mod.rs 4 years ago
  dkhayes117 f273ef59b1 Run cargo fmt again in register directory 4 years ago
  dkhayes117 42fa92f501 Fix with Cargo fmt 4 years ago
  dkhayes117 282345f3de Fix Comments on user accesses: cycle.rs, cycleh.rs, instret.rs, and instreth.rs 4 years ago
  dkhayes117 ab0777651d Fix typos 4 years ago
  dkhayes117 d65aabb952 add cycle[h].rs, instret[h].rs, and mcounteren.rs modules 4 years ago
  bors[bot] 39ff09eefe Merge #53 4 years ago
  Nixon Enraght-Moony 4bd6d68552 Update link (riscv to risc-v) 4 years ago
  bors[bot] 6392fa9520 Merge #52 4 years ago
  luojia65 7309236b6e Use cargo fmt 4 years ago
  luojia65 b144dd1709 Uppercase doc comments for `medeleg` 4 years ago
  luojia65 db4a22c3c3 medeleg; small doc fix 4 years ago
  bors[bot] 4d16f14ab3 Merge #51 4 years ago
  Vadim Kaushan f844c17c3a Fix {S,U}tvec::trap_mode() functions to match Mtvec::trap_mode() 4 years ago
  bors[bot] 3b8b0ad3c0 Merge #50 4 years ago
  Vadim Kaushan 01148aab87 Fix CI 4 years ago